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drm/asahi: HACK: Disable compute preemption for now
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Possibly because we don't have support in the helper program, this is
broken and causes channel errors. Hack in high priority for now, which
works around it.

Use debug_flags 0x1000000000000 to re-enable for testing.

Signed-off-by: Asahi Lina <[email protected]>
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asahilina committed Sep 24, 2024
1 parent d025ffc commit 1bbe2a3
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Showing 3 changed files with 18 additions and 3 deletions.
2 changes: 1 addition & 1 deletion drivers/gpu/drm/asahi/fw/channels.rs
Original file line number Diff line number Diff line change
Expand Up @@ -113,7 +113,7 @@ impl TxChannelState for FwCtlChannelState {
}
}

#[derive(Debug, Copy, Clone, Default)]
#[derive(Debug, Copy, Clone, Default, PartialEq, Eq)]
#[repr(u32)]
pub(crate) enum PipeType {
#[default]
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9 changes: 8 additions & 1 deletion drivers/gpu/drm/asahi/fw/workqueue.rs
Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,14 @@ pub(crate) mod raw {

#[derive(Debug, Clone, Copy)]
#[repr(C)]
pub(crate) struct Priority(u32, u32, U64, u32, u32, u32);
pub(crate) struct Priority(
pub(crate) u32,
pub(crate) u32,
pub(crate) U64,
pub(crate) u32,
pub(crate) u32,
pub(crate) u32,
);

pub(crate) const PRIORITY: [Priority; 4] = [
Priority(0, 0, U64(0xffff_ffff_ffff_0000), 1, 0, 1),
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10 changes: 9 additions & 1 deletion drivers/gpu/drm/asahi/workqueue.rs
Original file line number Diff line number Diff line change
Expand Up @@ -662,6 +662,14 @@ impl WorkQueue::ver {
let gpu_buf = alloc.private.array_empty_tagged(0x2c18, b"GPBF")?;
let mut state = alloc.shared.new_default::<RingState>()?;
let ring = alloc.shared.array_empty(size as usize)?;
let mut prio = *raw::PRIORITY.get(priority as usize).ok_or(EINVAL)?;

if pipe_type == PipeType::Compute && !debug_enabled(DebugFlags::Debug0) {
// Hack to disable compute preemption until we fix it
prio.0 = 0;
prio.5 = 1;
}

let inner = WorkQueueInner::ver {
dev: dev.into(),
event_manager,
Expand Down Expand Up @@ -694,7 +702,7 @@ impl WorkQueue::ver {
gpu_rptr2: Default::default(),
gpu_rptr3: Default::default(),
event_id: AtomicI32::new(-1),
priority: *raw::PRIORITY.get(priority as usize).ok_or(EINVAL)?,
priority: prio,
unk_4c: -1,
uuid: id as u32,
unk_54: -1,
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