From 9371769d60ce64eaf7b96ff8a4a2bdc9394901f8 Mon Sep 17 00:00:00 2001 From: Spence Konde Date: Sat, 7 Nov 2020 21:09:11 -0500 Subject: [PATCH] #464 Add bold warning... --- avr/extras/ATtiny_1634.md | 2 +- avr/extras/ATtiny_43.md | 2 +- avr/extras/ATtiny_828.md | 2 +- avr/extras/ATtiny_x313.md | 2 +- avr/extras/ATtiny_x4.md | 2 +- avr/extras/ATtiny_x41.md | 2 +- avr/extras/ATtiny_x5.md | 2 +- avr/extras/ATtiny_x61.md | 2 +- avr/extras/ATtiny_x7.md | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/avr/extras/ATtiny_1634.md b/avr/extras/ATtiny_1634.md index d764f745..ba626b65 100644 --- a/avr/extras/ATtiny_1634.md +++ b/avr/extras/ATtiny_1634.md @@ -38,7 +38,7 @@ The internal oscillator is factory calibrated to +/- 10% or +/- 2% for the sligh Tone() uses Timer1. For best results, use pin 2 or 14 (PIN_PA6, PIN_PB3), as this will use the hardware output compare to generate the square wave instead of using interrupts. Any use of tone() will disable PWM on pins 2 and 14 ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. There is also a slave-only hardware TWI, however, the Wire.h library does not make use of this. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. There is also a slave-only hardware TWI, however, the Wire.h library does not make use of this. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is no hardware SPI peripheral. SPI functionality can be achieved with the hardware USI - as of version 1.1.3 of this core, this should be handled transparently via the SPI library. Take care to note that the USI does not have MISO/MOSI, it has DI/DO; when operating in master mode, DI is MISO, and DO is MOSI. When operating in slave mode, DI is MOSI and DO is MISO. The #defines for MISO and MOSI assume master mode (as this is much more common). diff --git a/avr/extras/ATtiny_43.md b/avr/extras/ATtiny_43.md index db265609..2b7cb8e5 100644 --- a/avr/extras/ATtiny_43.md +++ b/avr/extras/ATtiny_43.md @@ -23,7 +23,7 @@ The boost converter will start up as long as the battery voltage is 1.2v or high Tone() uses Timer1. For best results, use pin 5 or 6 (PIN_PB5, PIN_PB6) as this will use the hardware output compare to generate the square wave instead of using interrupts. Any use of tone() will take out PWM on pins 5 amd 6. ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is no hardware SPI peripheral. SPI functionality can be achieved with the hardware USI - as of version 1.1.3 of this core, this should be handled transparently via the SPI library. Take care to note that the USI does not have MISO/MOSI, it has DI/DO; when operating in master mode, DI is MISO, and DO is MOSI. When operating in slave mode, DI is MOSI and DO is MISO. The #defines for MISO and MOSI assume master mode (as this is much more common). diff --git a/avr/extras/ATtiny_828.md b/avr/extras/ATtiny_828.md index bd254fdc..a44025e5 100644 --- a/avr/extras/ATtiny_828.md +++ b/avr/extras/ATtiny_828.md @@ -36,7 +36,7 @@ The internal oscillator is factory calibrated to +/- 10% or +/- 2% for the sligh Tone() uses Timer1. For best results, use pin 21 or 22 (PIN_PC5, PIN_PC6), as this will use the hardware output compare to generate the square wave instead of using interrupts. Any use of tone() will disable PWM on pins 21 and 22. ### I2C Support -Slave I2C functionality is provided in hardware, but a software implementation must be used for master functionality. This is done automatically with the included version of the Wire.h library. +Slave I2C functionality is provided in hardware, but a software implementation must be used for master functionality. This is done automatically with the included version of the Wire.h library. **You must have external pullup resistors installed** in order for I2C functionality to work reliably. ### SPI Support There is full Hardware SPI support. diff --git a/avr/extras/ATtiny_x313.md b/avr/extras/ATtiny_x313.md index 08d151c8..8ebc0f37 100644 --- a/avr/extras/ATtiny_x313.md +++ b/avr/extras/ATtiny_x313.md @@ -22,7 +22,7 @@ Tone() uses Timer1. For best results, use pin 12, and 13, as this will use the h When an Arduino sketch runs, prior to Setup() being called, a hidden init() function is called to set up the hardware. One of the things it does is configure the timers. Timer0 (used for millis) is always configured, but on the x313 series, due to the extremely limited flash, it is optional whether to initialize Timer1. If Timer1 is not initialized, Tone() and PWM on pins 12 and 13 will not work. ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is no hardware SPI peripheral. SPI functionality can be achieved with the hardware USI - as of version 1.1.3 of this core, this should be handled transparently via the SPI library. Take care to note that the USI does not have MISO/MOSI, it has DI/DO; when operating in master mode, DI is MISO, and DO is MOSI. When operating in slave mode, DI is MOSI and DO is MISO. The #defines for MISO and MOSI assume master mode (as this is much more common). diff --git a/avr/extras/ATtiny_x4.md b/avr/extras/ATtiny_x4.md index 2d081d4c..00f7d1d0 100644 --- a/avr/extras/ATtiny_x4.md +++ b/avr/extras/ATtiny_x4.md @@ -50,7 +50,7 @@ Example of a "guard" against wrong pin mapping: Tone() uses Timer1. For best results, use pin 6 and 5 (4 and 5 with alternate pinout - PA6 and PA5), as this will use the hardware output compare to generate the square wave instead of using interrupts. ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is no hardware SPI peripheral. SPI functionality can be achieved with the hardware USI - as of version 1.1.3 of this core, this should be handled transparently via the SPI library. Take care to note that the USI does not have MISO/MOSI, it has DI/DO; when operating in master mode, DI is MISO, and DO is MOSI. When operating in slave mode, DI is MOSI and DO is MISO. The #defines for MISO and MOSI assume master mode (as this is much more common). diff --git a/avr/extras/ATtiny_x41.md b/avr/extras/ATtiny_x41.md index ace9b1f5..5968d54f 100644 --- a/avr/extras/ATtiny_x41.md +++ b/avr/extras/ATtiny_x41.md @@ -54,7 +54,7 @@ Example of a "guard" against wrong pin mapping: The standard Tone() function is supported on these parts. For best results, use PA5 (pin 5 on either pinout) or PA6 (pin 4 on counterclockwise, pin 6 on clockwise), as this will use hardware output compare to generate the square wave, instead of interrupts. ### I2C support -There is no I2C master functionality implemented in hardware. As of version 1.1.3, the included Wire.h library will use a software implementation to provide I2C master functionality, and the hardware I2C slave for slave functionality, and can be used as a drop-in replacement for Wire.h with the caveat that clock speed cannot be set. +There is no I2C master functionality implemented in hardware. As of version 1.1.3, the included Wire.h library will use a software implementation to provide I2C master functionality, and the hardware I2C slave for slave functionality, and can be used as a drop-in replacement for Wire.h with the caveat that clock speed cannot be set. **You must have external pullup resistors installed** in order for I2C functionality to work reliably. ### Advanced Differential ADC The ATtinyx41 family boasts one of the most advanced ADCs in the entire classic tinyAVR/megaAVR product line, with no fewer than 62 channels (counting single ended and differential pairs - admittedly, some of the differential pairs are of dubious usefulness, consisting of the same channel compared to itself; presumably this is meant as a way to adjust for differences between the positive and negative sides of the ADC), 8 reference options, and - for the differential pairs, selectable gain of 1x, 20x, or 100x - if you happen to need insane ADC capability in a small AVR, there is still, as of mid-2020, no other 8-bit AVR - to my knowledge - that can compete. See the table at the bottom of this page for a list of the channels; they can all be used with analogRead(). Of course, it can also just be used as an normal AVR where analogRead() happens to work on every pin, too. diff --git a/avr/extras/ATtiny_x5.md b/avr/extras/ATtiny_x5.md index 27bf6ec5..77a64f56 100644 --- a/avr/extras/ATtiny_x5.md +++ b/avr/extras/ATtiny_x5.md @@ -41,7 +41,7 @@ The ATtiny x5-family parts are equipped with a special high speed 8-bit timer, T Tone() uses Timer1. For best results, use pin 4 for tone - this will use Timer1's output compare unit to generate the tone, rather than generating an interrupt to toggle the pin. In this way, "tones" can be generated up into the MHz range. If Timer1 is set to use the PLL clock (provided this is done using the menu option, not manually), Tone will figure this out and output the requested frequency. With Timer1 running off the PLL @ 64MHz, tone() should be able to output a 32MHz signal on pin 4! If using SoftwareSerial or the builtin software serial "Serial", tone() will work on pin 4 (but not any other pins) while the software serial is active. Tone will disable PWM on pin 4, regardless of which pin is used for output. Starting in version 1.2.4, pin 1 will use hardware output compare for tone as well (but PWM on it will not be disabled when tone is in use on a different pin). ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire library included with this core. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is no hardware SPI peripheral. SPI functionality can be achieved with the hardware USI - as of version 1.1.3 of this core, this should be handled transparently via the SPI library. Take care to note that the USI does not have MISO/MOSI, it has DI/DO; when operating in master mode, DI is MISO, and DO is MOSI. When operating in slave mode, DI is MOSI and DO is MISO. The #defines for MISO and MOSI assume master mode (as this is much more common). diff --git a/avr/extras/ATtiny_x61.md b/avr/extras/ATtiny_x61.md index d4dd4c5c..0a0d5757 100644 --- a/avr/extras/ATtiny_x61.md +++ b/avr/extras/ATtiny_x61.md @@ -36,7 +36,7 @@ The ATtiny x61-family parts are equipped with a special high speed 8/10-bit time Tone() uses Timer1. For best results, use pin 6 for tone - this will use Timer1's output compare unit to generate the tone, rather than generating an interrupt to toggle the pin. In this way, tones can be generated up into the MHz range. If Timer1 is set to use the PLL clock (provided this is done using the menu option, not manually), Tone will figure this out and output the requested frequency. With Timer1 running off the PLL @ 64 MHz, tone() should be able to output a 32 MHz signal on pin 6! If using SoftwareSerial or the builtin software serial "Serial", tone() will only work on pin 6 while the software serial is actively transmitting or receiving. As only Timer1 is capable of hardware PWM on the x61 series, tone() will break all PWM functionality. ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire.h library included with this core. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire.h library included with this core. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is no hardware SPI peripheral. SPI functionality can be achieved with the hardware USI - as of version 1.1.3 of this core, this should be handled transparently via the SPI library. Take care to note that the USI does not have MISO/MOSI, it has DI/DO; when operating in master mode, DI is MISO, and DO is MOSI. When operating in slave mode, DI is MOSI and DO is MISO. The #defines for MISO and MOSI assume master mode (as this is much more common). diff --git a/avr/extras/ATtiny_x7.md b/avr/extras/ATtiny_x7.md index 16e8cd6f..98cc8504 100644 --- a/avr/extras/ATtiny_x7.md +++ b/avr/extras/ATtiny_x7.md @@ -47,7 +47,7 @@ The two channels of Timer1 can each output on one or more of 4 pins, albeit with Tone() uses Timer1. For best results, use a pin on port B - those will use the hardware output compare rather than an interrupt to generate the tone. Using tone() will disable all PWM pins except PIN_PA2. ### I2C Support -There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire.h library included with this core. +There is no hardware I2C peripheral. I2C functionality can be achieved with the hardware USI. As of version 1.1.3 this is handled transparently via the special version of the Wire.h library included with this core. **You must have external pullup resistors installed** in order for I2C functionality to work at all. ### SPI Support There is a hardware SPI port and the normal SPI library can be used.