From 27d4cef395f5977326f6bea846904d206803d25a Mon Sep 17 00:00:00 2001 From: Mike Vengerovich Date: Sun, 26 Nov 2023 21:22:34 +0200 Subject: [PATCH 1/5] + page deallocation (unmap in the same time) + clean saved state on restore --- src/cpu.c | 4 ++-- src/emm.c | 12 +++++++----- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/src/cpu.c b/src/cpu.c index d0dcdd3..61ed94f 100644 --- a/src/cpu.c +++ b/src/cpu.c @@ -828,7 +828,7 @@ static void custom_on_board_emm() { // DX = emm_handle uint8_t AL = CPU_AL; CPU_AX = map_unmap_emm_page(CPU_AL, CPU_BX, CPU_DX); - sprintf(tmp, "LIM40 FN %Xh res: phys page %Xh was mapped to %Xh log for %d EMM handler", + sprintf(tmp, "LIM40 FN %Xh res: phys page %d was mapped to %d logical for %d EMM handler", FN, AL, CPU_BX, CPU_DX); logMsg(tmp); if (CPU_AX) zf = 1; else zf = 0; return; @@ -837,7 +837,7 @@ static void custom_on_board_emm() { case 0x45: { uint16_t emm_handle = CPU_DX; CPU_AX = deallocate_emm_pages(emm_handle); - sprintf(tmp, "LIM40 FN %Xh res: %Xh - EMM handler dealloc", FN, emm_handle); logMsg(tmp); + sprintf(tmp, "LIM40 FN %Xh res: %Xh - EMM handler %d dealloc", FN, CPU_AX, emm_handle); logMsg(tmp); if (CPU_AX) zf = 1; else zf = 0; return; } diff --git a/src/emm.c b/src/emm.c index ae19f55..74ffa12 100644 --- a/src/emm.c +++ b/src/emm.c @@ -90,7 +90,7 @@ static emm_handler_t handlers[MAX_EMM_HANDLERS] = { 0 }; void init_emm() { emm_handler_t * h = &handlers[0]; h->handler_in_use = true; - h->pages_acllocated = 4; + h->pages_acllocated = 0; for (int i = 1; i < MAX_EMM_HANDLERS; ++i) { h = &handlers[i]; h->handler_in_use = false; @@ -272,11 +272,11 @@ uint16_t map_unmap_emm_page( uint16_t deallocate_emm_pages(uint16_t emm_handle) { if (emm_handle >= MAX_EMM_HANDLERS) { - return 0x83; // The manager couldn't find the specified EMM handle. + return 0x8300; // The manager couldn't find the specified EMM handle. } emm_handler_t * h = &handlers[emm_handle]; if (!h->handler_in_use) { - return 0x83; // The manager couldn't find the specified EMM handle. + return 0x8300; // The manager couldn't find the specified EMM handle. } for (int j = 0; j < MAX_SAVED_EMM_TABLES; ++j) { const emm_saved_table_t * st = &emm_saved_tables[j]; @@ -293,9 +293,10 @@ uint16_t deallocate_emm_pages(uint16_t emm_handle) { } } for (int i = 0; i < PHYSICAL_EMM_PAGES; ++i) { - const emm_record_t * di = &emm_desc_table[i]; + emm_record_t * di = &emm_desc_table[i]; if (di->handler == emm_handle) { - return 0x86 << 8; // The memory manager detected a save or restore page mapping context error. + // return 0x86 << 8; // The memory manager detected a save or restore page mapping context error. + di->handler = 0xFF; } } h->pages_acllocated = 0; @@ -330,6 +331,7 @@ uint16_t restore_emm_mapping(uint16_t ext_handler) { emm_saved_table_t * di = &emm_saved_tables[i]; if (di->ext_handler == ext_handler) { memcpy(emm_desc_table, di->table, sizeof emm_desc_table); + memset(di->table, 0, sizeof emm_desc_table); di->ext_handler = 0; return 0; } From b29c7d0998b352601e076706919619504c41195a Mon Sep 17 00:00:00 2001 From: Mike Vengerovich Date: Sun, 26 Nov 2023 22:46:54 +0200 Subject: [PATCH 2/5] investigation --- src/a20.c | 7 ++++--- src/emm.h | 4 ++-- src/ram_page.c | 8 ++++---- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/a20.c b/src/a20.c index fe369e0..25e1508 100644 --- a/src/a20.c +++ b/src/a20.c @@ -136,7 +136,8 @@ uint16_t readw86(uint32_t addr32); uint8_t read86(uint32_t addr32); void i15_87h(uint16_t words_to_move, uint32_t gdt_far) { - uint8_t prev_a20_enable = set_a20(1); // enable A20 line if not + bool prev_a20_enable = is_a20_enabled; // enable A20 line if not + is_a20_enabled = true; uint16_t source_segment_szb = readw86(gdt_far + 0x10); // (2*CX-1) or grater uint32_t linear_source_addr24 = read86(gdt_far + 0x14);; // 24 bit addrss of source linear_source_addr24 = (linear_source_addr24 << 8) + read86(gdt_far + 0x13); @@ -154,10 +155,10 @@ void i15_87h(uint16_t words_to_move, uint32_t gdt_far) { uint16_t d = readw86(linear_source_addr24 + offset); writew86(linear_dest_addr24 + offset, d); } - set_a20(prev_a20_enable); // restore prev. A20 line state + is_a20_enabled = prev_a20_enable; // restore prev. A20 line state } void i15_89h(uint8_t IDT1, uint8_t IDT2, uint32_t gdt_far) { - set_a20(1); + is_a20_enabled = true; // TODO: CPU_CR0 } diff --git a/src/emm.h b/src/emm.h index fa33853..8be2771 100644 --- a/src/emm.h +++ b/src/emm.h @@ -57,10 +57,10 @@ #pragma once #include -#define ON_BOARD_RAM_KB (1ul << 10) +#define ON_BOARD_RAM_KB (4ul << 10) #define BASE_X86_KB 1024ul #define TOTAL_XMM_KB (ON_BOARD_RAM_KB - BASE_X86_KB) -#define TOTAL_EMM_KB (1ul << 10) +#define TOTAL_EMM_KB (4ul << 10) #define EMM_LBA_SHIFT_KB ON_BOARD_RAM_KB #define TOTAL_EMM_PAGES (TOTAL_EMM_KB >> 4) #define TOTAL_VIRTUAL_MEMORY_KBS (ON_BOARD_RAM_KB + TOTAL_EMM_KB) diff --git a/src/ram_page.c b/src/ram_page.c index f39f019..941b0fd 100644 --- a/src/ram_page.c +++ b/src/ram_page.c @@ -171,10 +171,10 @@ FRESULT vram_seek(FIL* fp, uint32_t file_offset) { void read_vram_block(char* dst, uint32_t file_offset, uint32_t sz) { gpio_put(PICO_DEFAULT_LED_PIN, true); char tmp[40]; - if (file_offset >= 0x100000) { + //if (file_offset >= 0x100000) { sprintf(tmp, "Read pagefile 0x%X<-0x%X", dst, file_offset); logMsg(tmp); - } + //} FRESULT result = vram_seek(&file, file_offset); if (result != FR_OK) { return; @@ -191,10 +191,10 @@ void read_vram_block(char* dst, uint32_t file_offset, uint32_t sz) { void flush_vram_block(const char* src, uint32_t file_offset, uint32_t sz) { gpio_put(PICO_DEFAULT_LED_PIN, true); char tmp[40]; - if (file_offset >= 0x100000) { + //if (file_offset >= 0x100000) { sprintf(tmp, "Flush pagefile 0x%X->0x%X", src, file_offset); logMsg(tmp); - } + //} FRESULT result = vram_seek(&file, file_offset); if (result != FR_OK) { return; From 4b1bcdb0556f36c669518fdc0bd0c4a6844b7593 Mon Sep 17 00:00:00 2001 From: Mike Vengerovich Date: Sun, 26 Nov 2023 23:10:11 +0200 Subject: [PATCH 3/5] + more psram --- src/cpu.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/src/cpu.c b/src/cpu.c index 61ed94f..8363f94 100644 --- a/src/cpu.c +++ b/src/cpu.c @@ -178,17 +178,17 @@ void writew86(uint32_t addr32, uint16_t value) { __inline uint8_t read86(uint32_t addr32) { #if PICO_ON_DEVICE && SD_CARD_SWAP - if ((!PSRAM_AVAILABLE && addr32 < (640 << 10)) || PSRAM_AVAILABLE && addr32 < (RAM_SIZE << 10)) { + if ((!PSRAM_AVAILABLE && addr32 < (640 << 10)) || (PSRAM_AVAILABLE && addr32 < (RAM_SIZE << 10))) { #else if (addr32 < (RAM_SIZE << 10)) { #endif // https://docs.huihoo.com/gnu_linux/own_os/appendix-bios_memory_2.htm #if SD_CARD_SWAP - if (PSRAM_AVAILABLE || addr32 < 4096) { - // do not touch first 4kb - return RAM[addr32]; - } - return ram_page_read(addr32); + if (PSRAM_AVAILABLE || addr32 < 4096) { + // do not touch first 4kb + return RAM[addr32]; + } + return ram_page_read(addr32); #else return RAM[addr32]; #endif @@ -233,13 +233,11 @@ __inline uint8_t read86(uint32_t addr32) { addr32 -= 0xFA000UL; return BASICH[addr32]; } - else if (addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10)) { // Hihg mem #if SD_CARD_SWAP -// TODO: PSRAM_AVAILABLE ... if (get_a20_enabled()) { // char tmp[40]; sprintf(tmp, "HIMEM LBA: 0x%X", addr32); logMsg(tmp); - return ram_page_read(addr32); + return PSRAM_AVAILABLE ? psram_read8(&psram_spi, addr32) : ram_page_read(addr32); } return read86(addr32 - 0x100000UL); // FFFF:0010 -> 0000:0000 rolling address space for case A20 is turned off #endif @@ -254,15 +252,18 @@ __inline uint8_t read86(uint32_t addr32) { uint16_t readw86(uint32_t addr32) { #if PICO_ON_DEVICE - if (PSRAM_AVAILABLE && (addr32 > (RAM_SIZE << 10) && addr32 < (640 << 10))) { + if (PSRAM_AVAILABLE && (addr32 > (RAM_SIZE << 10) && addr32 < (640 << 10))) { // todo: w? return psram_read16(&psram_spi, addr32); } -#if SD_CARD_SWAP uint32_t w = (addr32 & 0xFFFFFFFE) == 0; + if (PSRAM_AVAILABLE && w && addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { + return psram_read16(&psram_spi, addr32); + } +#if SD_CARD_SWAP if (addr32 >= RAM_PAGE_SIZE && addr32 < (640 << 10) - 1 && w) { return ram_page_read16(addr32); } // TODO: ROM, VRAM, ... - if (get_a20_enabled() && addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10) && w) { + if (w && addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { return ram_page_read16(addr32); } #endif From 221dfd1c65fceece00c4df75bb0e49552cb8057b Mon Sep 17 00:00:00 2001 From: Mike Vengerovich Date: Mon, 27 Nov 2023 01:18:27 +0200 Subject: [PATCH 4/5] + 16-bit operations + psram smooth support --- src/cpu.c | 140 ++++++++++++++++++++++++++++++++++-------------------- 1 file changed, 88 insertions(+), 52 deletions(-) diff --git a/src/cpu.c b/src/cpu.c index 844032d..79831e2 100644 --- a/src/cpu.c +++ b/src/cpu.c @@ -101,7 +101,7 @@ void modregrm() { __inline void write86(uint32_t addr32, uint8_t value) { #if PICO_ON_DEVICE - if ((PSRAM_AVAILABLE && (addr32) < (RAM_SIZE << 10)) || addr32 < RAM_PAGE_SIZE) { + if ((PSRAM_AVAILABLE && (addr32) < (RAM_SIZE << 10)) || addr32 < RAM_PAGE_SIZE) { // Conventional in RAM size or first block // do not touch first page RAM[addr32] = value; return; @@ -109,89 +109,108 @@ __inline void write86(uint32_t addr32, uint8_t value) { #else if (addr32 < (RAM_SIZE << 10)) { RAM[addr32] = value; + return; } #endif - else if (((addr32) >= 0xB8000UL) && ((addr32) < 0xC0000UL)) { + if (((addr32) >= 0xB8000UL) && ((addr32) < 0xC0000UL)) { // video RAM range addr32 -= 0xB8000UL; VRAM[addr32] = value; // 16k for graphic mode!!! return; } - if (PSRAM_AVAILABLE && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { + if (PSRAM_AVAILABLE && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS uint32_t lba = get_logical_lba_for_physical_lba(addr32); if (lba >= (EMM_LBA_SHIFT_KB << 10)) { psram_write8(&psram_spi, lba, value); return; } + } else if ((addr32) >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10)) { // XMS + if (get_a20_enabled()) { // A20 line is ON + psram_write8(&psram_spi, addr32, value); + return; + } + write86(addr32 - 0x100000UL, value); // Rool back to low addressed + return; } +#if PICO_ON_DEVICE #if SD_CARD_SWAP - if ((addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { + if (addr32 >= RAM_PAGE_SIZE && addr32 < (640 << 10)) { // Conventional + ram_page_write(addr32, value); + return; + } + if ((addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS uint32_t lba = get_logical_lba_for_physical_lba(addr32); - // char tmp[40]; sprintf(tmp, " W LBA: 0x%X->0x%X", addr32, lba); logMsg(tmp); if (lba >= (EMM_LBA_SHIFT_KB << 10)) { ram_page_write(lba, value); return; } } -#endif - /*if (addr32 >= 0xD0000UL && addr32 < 0xD8000UL) { - addr32 -= 0xCC000UL; // TODO: why? - }*/ -#if SD_CARD_SWAP - else if ((addr32) > 0xFFFFFUL) { - if (addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10)) { // Hihg mem - if (get_a20_enabled()) { // A20 line is ON - // char tmp[40]; sprintf(tmp, "HIMEM W LBA: 0x%X", addr32); logMsg(tmp); + if ((addr32) >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10)) { // XMS + if (get_a20_enabled()) { // A20 line is ON ram_page_write(addr32, value); return; - } } - write86(addr32 - 0x100000UL, value); + write86(addr32 - 0x100000UL, value); // Rool back to low addressed return; + } #endif -#if PICO_ON_DEVICE - } else if (PSRAM_AVAILABLE) { + if (PSRAM_AVAILABLE) { // Conentional (out of RAM size) psram_write8(&psram_spi, addr32, value); - } -#if SD_CARD_SWAP - else { - ram_page_write(addr32, value); + return; } #endif -#endif + // { char tmp[40]; sprintf(tmp, "ADDR W: 0x%X not found", addr32); logMsg(tmp); } } void writew86(uint32_t addr32, uint16_t value) { bool w = (addr32 & 0xFFFFFFFE) == 0; #if PICO_ON_DEVICE - if (PSRAM_AVAILABLE && (addr32 > (RAM_SIZE << 10) && addr32 < (640 << 10))) { + if (PSRAM_AVAILABLE && (addr32 > (RAM_SIZE << 10) && addr32 < (640 << 10))) { // Conventional + psram_write16(&psram_spi, addr32, value); + return; + } + if (PSRAM_AVAILABLE && addr32 >= (BASE_X86_KB << 10) && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { // XMS psram_write16(&psram_spi, addr32, value); + return; + } + if (PSRAM_AVAILABLE && w && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS + uint32_t lba = get_logical_lba_for_physical_lba(addr32); + if (lba >= (EMM_LBA_SHIFT_KB << 10)) { + psram_write16(&psram_spi, lba, value); + return; + } } - else #if SD_CARD_SWAP - if (addr32 >= RAM_PAGE_SIZE && addr32 < (640 << 10) - 1 && w) { + if (w && addr32 >= RAM_PAGE_SIZE && addr32 < (640 << 10)) { // Conventional ram_page_write16(addr32, value); - } else if (w && addr32 >= (BASE_X86_KB << 10) && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { + return; + } + if (w && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS + uint32_t lba = get_logical_lba_for_physical_lba(addr32); + if (lba >= (EMM_LBA_SHIFT_KB << 10)) { + ram_page_write16(lba, value); + return; + } + } + if (w && addr32 >= (BASE_X86_KB << 10) && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { // XMS ram_page_write16(addr32, value); + return; } - else // TODO: ROM, VRAM, himiem, ems... #endif #endif - { - write86(addr32, (uint8_t)value); - write86(addr32 + 1, (uint8_t)(value >> 8)); - } + write86(addr32 , (uint8_t) value ); + write86(addr32 + 1, (uint8_t)(value >> 8)); } __inline uint8_t read86(uint32_t addr32) { #if PICO_ON_DEVICE && SD_CARD_SWAP - if ((!PSRAM_AVAILABLE && addr32 < (640 << 10)) || (PSRAM_AVAILABLE && addr32 < (RAM_SIZE << 10))) { + if ((!PSRAM_AVAILABLE && addr32 < (640 << 10)) || (PSRAM_AVAILABLE && addr32 < (RAM_SIZE << 10))) { // Conentional #else if (addr32 < (RAM_SIZE << 10)) { #endif // https://docs.huihoo.com/gnu_linux/own_os/appendix-bios_memory_2.htm #if SD_CARD_SWAP - if (PSRAM_AVAILABLE || addr32 < 4096) { + if (PSRAM_AVAILABLE || addr32 < 4096) { // First page block // do not touch first 4kb return RAM[addr32]; } @@ -205,23 +224,19 @@ __inline uint8_t read86(uint32_t addr32) { return 0x21; } else if ((addr32 >= 0xFE000UL) && (addr32 <= 0xFFFFFUL)) { - //if (addr32 == 0xFFFFEUL) { // TODO: rebuild BIOS to change this byte (in other case internal BIOS test failed) - // return 0xFD; // PCjr - //} // BIOS ROM range addr32 -= 0xFE000UL; return BIOS[addr32]; } - if (PSRAM_AVAILABLE && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // Expanded memory paging space D00000-E00000 + if (PSRAM_AVAILABLE && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS uint32_t lba = get_logical_lba_for_physical_lba(addr32); if (lba >= (EMM_LBA_SHIFT_KB << 10)) { return psram_read8(&psram_spi, lba); } } #if SD_CARD_SWAP - if ((addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // Expanded memory paging space D00000-E00000 + else if ((addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS uint32_t lba = get_logical_lba_for_physical_lba(addr32); - // char tmp[40]; sprintf(tmp, " W LBA: 0x%X->0x%X", addr32, lba); logMsg(tmp); if (lba >= (EMM_LBA_SHIFT_KB << 10)) { return ram_page_read(lba); } @@ -246,39 +261,60 @@ __inline uint8_t read86(uint32_t addr32) { addr32 -= 0xFA000UL; return BASICH[addr32]; } - else if (addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10)) { // Hihg mem + else if (addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10)) { // XMS #if SD_CARD_SWAP if (get_a20_enabled()) { - // char tmp[40]; sprintf(tmp, "HIMEM LBA: 0x%X", addr32); logMsg(tmp); return PSRAM_AVAILABLE ? psram_read8(&psram_spi, addr32) : ram_page_read(addr32); } return read86(addr32 - 0x100000UL); // FFFF:0010 -> 0000:0000 rolling address space for case A20 is turned off #endif } #if PICO_ON_DEVICE - if (PSRAM_AVAILABLE) { - return psram_read8(&psram_spi, addr32); + if (PSRAM_AVAILABLE) { // XMS no sd-card swap + if (get_a20_enabled()) { + return psram_read8(&psram_spi, addr32); + } + return read86(addr32 - 0x100000UL); // FFFF:0010 -> 0000:0000 rolling address space for case A20 is turned off } #endif + // { char tmp[40]; sprintf(tmp, "ADDR R: 0x%X not found", addr32); logMsg(tmp); } return 0; } uint16_t readw86(uint32_t addr32) { #if PICO_ON_DEVICE - if (PSRAM_AVAILABLE && (addr32 > (RAM_SIZE << 10) && addr32 < (640 << 10))) { // todo: w? + if (PSRAM_AVAILABLE && (addr32 > (RAM_SIZE << 10) && addr32 < (640 << 10))) { // Coventional > RAM todo: w? return psram_read16(&psram_spi, addr32); } - uint32_t w = (addr32 & 0xFFFFFFFE) == 0; - if (PSRAM_AVAILABLE && w && addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { - return psram_read16(&psram_spi, addr32); + uint32_t w = (addr32 & 0xFFFFFFFE) == 0; // alligned to 16 bit + if (PSRAM_AVAILABLE && w && addr32 >= BASE_X86_KB && addr32 < (ON_BOARD_RAM_KB << 10)) { // XMS + if (get_a20_enabled()) { + return psram_read16(&psram_spi, addr32); + } + return read86(addr32 - BASE_X86_KB); + } + if (PSRAM_AVAILABLE && w && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS + uint32_t lba = get_logical_lba_for_physical_lba(addr32); + if (lba >= (EMM_LBA_SHIFT_KB << 10)) { + return psram_read16(&psram_spi, lba); + } } #if SD_CARD_SWAP - if (addr32 >= RAM_PAGE_SIZE && addr32 < (640 << 10) - 1 && w) { - return ram_page_read16(addr32); - } // TODO: ROM, VRAM, ... - if (w && addr32 >= 0x100000UL && addr32 < (ON_BOARD_RAM_KB << 10) && get_a20_enabled()) { + else if (w && (addr32 >> 4) >= PHYSICAL_EMM_SEGMENT && (addr32 >> 4) < PHYSICAL_EMM_SEGMENT_END) { // EMS + uint32_t lba = get_logical_lba_for_physical_lba(addr32); + if (lba >= (EMM_LBA_SHIFT_KB << 10)) { + return ram_page_read16(lba); + } + } + if (addr32 >= RAM_PAGE_SIZE && addr32 < (640 << 10) - 1 && w) { // Conentional (not first 4k) return ram_page_read16(addr32); } + if (w && addr32 >= BASE_X86_KB && addr32 < (ON_BOARD_RAM_KB << 10)) { // XMS + if (get_a20_enabled()) { + return ram_page_read16(addr32); + } + return readw86(addr32 - BASE_X86_KB); + } #endif #endif return ((uint16_t)read86(addr32) | (uint16_t)(read86(addr32 + 1) << 8)); From 404d6e5fa3c643e173341c51781b0bd7ae8db3a6 Mon Sep 17 00:00:00 2001 From: Mike Vengerovich Date: Mon, 27 Nov 2023 13:20:25 +0200 Subject: [PATCH 5/5] + WIN_EXT_RAM definistion --- src/emulator.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/emulator.h b/src/emulator.h index fb3dcd6..4523cdc 100644 --- a/src/emulator.h +++ b/src/emulator.h @@ -30,11 +30,14 @@ static FATFS fs; #define BEEPER_PIN 28 #define VRAM_SIZE 64 + +#ifdef WIN_EXT_RAM #define EXT_RAM_SIZE 32 << 10 // 32Mb +extern uint8_t EXTRAM[EXT_RAM_SIZE << 10]; +#endif // TODO: no direct access support (for PC mode) extern uint8_t RAM[RAM_SIZE << 10]; -extern uint8_t EXTRAM[EXT_RAM_SIZE << 10]; extern uint8_t VRAM[VRAM_SIZE << 10]; extern bool PSRAM_AVAILABLE;