-
Notifications
You must be signed in to change notification settings - Fork 6
/
Copy pathttiimpl_notes.txt
180 lines (175 loc) · 6.31 KB
/
ttiimpl_notes.txt
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
# Source: lib/Analysis/TargetTransformInfo.cpp
# nargs=0 -> int
getInliningThresholdMultiplier();
getInliningCostBenefitAnalysisSavingsMultiplier();
getInliningCostBenefitAnalysisProfitableMultiplier();
getInlinerVectorBonusPercent();
getFlatAddressSpace();
getMinVectorRegisterBitWidth();
getCacheLineSize();
getPrefetchDistance();
getMaxPrefetchIterationsAhead();
getMaxMemIntrinsicInlineSizeThreshold();
getAtomicMemIntrinsicMaxElementSize();
getMaxNumArgs();
getGISelRematGlobalCost();
getMinTripCountTailFoldingThreshold();
# nargs=0 -> Optional[int]
getMaxVScale();
getVScaleForTuning();
# nargs=0 -> BranchProbability
getPredictableBranchThreshold();
# nargs=0 -> bool
isSingleThreaded();
isNumRegsMajorCostOfLSR();
!!!shouldFoldTerminatingConditionAfterLSR();
canMacroFuseCmp();
enableOrderedReductions();
!!!prefersVectorizedAddressing();
LSRWithInstrQueries();
useAA()
shouldBuildLookupTables();
shouldBuildRelLookupTables();
supportsEfficientVectorElementLoadStore();
supportsTailCalls();
enableSelectOptimize();
!!!enableInterleavedAccessVectorization();
!enableMaskedInterleavedAccessVectorization();
isFPVectorizationPotentiallyUnsafe();
isVScaleKnownToBeAPowerOfTwo();
enableWritePrefetching();
!enableScalableVectorization();
preferEpilogueVectorization();
supportsScalableVectors();
# TODO:
adjustInliningThreshold(CB);
getCallerAllocaCost(CB, AI);
getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
getInstructionCost(U, Operands, CostKind);
hasBranchDivergence(F);
isSourceOfDivergence(V);
isAlwaysUniform(V);
isValidAddrSpaceCast(FromAS, ToAS);
addrspacesMayAlias(FromAS, ToAS);
collectFlatAddressOperands(OpIndexes, IID);
isNoopAddrSpaceCast(FromAS, ToAS);
canHaveNonUndefGlobalInitializerInAddressSpace(AS);
getAssumedAddrSpace(V);
getPredicatedAddrSpace(V);
rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
isLoweredToCall(F);
isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
preferPredicateOverEpilogue(TFI);
getPreferredTailFoldingStyle(IVUpdateMayOverflow);
instCombineIntrinsic(IC, II);
simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
simplifyDemandedVectorEltsIntrinsic(
getUnrollingPreferences(L, SE, UP, ORE);
getPeelingPreferences(L, SE, PP);
isLegalAddImmediate(Imm);
isLegalICmpImmediate(Imm);
isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
isLSRCostLess(C1, C2);
isProfitableLSRChainElement(I);
canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
getPreferredAddressingMode(L, SE);
isLegalMaskedStore(DataType, Alignment);
isLegalMaskedLoad(DataType, Alignment);
isLegalNTStore(DataType, Alignment);
isLegalNTLoad(DataType, Alignment);
isLegalBroadcastLoad(ElementTy, NumElements);
isLegalMaskedGather(DataType, Alignment);
isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
isLegalMaskedScatter(DataType, Alignment);
forceScalarizeMaskedGather(DataType, Alignment);
forceScalarizeMaskedScatter(DataType, Alignment);
isLegalMaskedCompressStore(DataType);
isLegalMaskedExpandLoad(DataType);
hasDivRemOp(DataType, IsSigned);
hasVolatileVariant(I, AddrSpace);
getScalingFactorCost(
isTruncateFree(Ty1, Ty2);
isProfitableToHoist(I);
isTypeLegal(Ty);
getRegUsageForType(Ty);
shouldBuildLookupTablesForConstant(C);
useColdCCForColdCall(F);
getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
getOperandsScalarizationOverhead(Args, Tys, CostKind);
supportsTailCallFor(CB);
enableAggressiveInterleaving(LoopHasReductions);
enableMemCmpExpansion(OptSize, IsZeroCmp);
allowsMisalignedMemoryAccesses(Context, BitWidth,
getPopcntSupport(IntTyWidthInBit);
haveFastSqrt(Ty);
isExpensiveToSpeculativelyExecute(I);
isFCmpOrdCheaperThanFCmpZero(Ty);
getFPOpCost(Ty);
getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
getIntImmCost(Imm, Ty, CostKind);
getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
preferToKeepConstantsAttached(Inst, Fn);
getNumberOfRegisters(ClassID);
getRegisterClassForType(Vector, Ty);
getRegisterClassName(ClassID);
getRegisterBitWidth(K);
shouldMaximizeVectorBandwidth(K);
getMinimumVF(ElemWidth, IsScalable);
getMaximumVF(ElemWidth, Opcode);
getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
shouldConsiderAddressTypePromotion(
getCacheSize(Level);
getCacheAssociativity(Level);
getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
shouldPrefetchAddressSpace(AS);
getMaxInterleaveFactor(VF);
getArithmeticInstrCost(Opcode, Ty, CostKind,
getShuffleCost(Kind, Ty, Mask, CostKind, Index, SubTp, Args);
getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
getCFInstrCost(Opcode, CostKind, I);
getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
getVectorInstrCost(I, Val, CostKind, Index);
getReplicationShuffleCost(
getMemoryOpCost(
getMaskedMemoryOpCost(Opcode, Src, Alignment,
getGatherScatterOpCost(
getInterleavedMemoryOpCost(
getIntrinsicInstrCost(ICA, CostKind);
getCallInstrCost(F, RetTy, Tys, CostKind);
getNumberOfParts(Tp);
getAddressComputationCost(Tp, SE, Ptr);
getMemcpyCost(I);
getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
getMinMaxReductionCost(IID, Ty, FMF, CostKind);
getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
getCostOfKeepingLiveOverCall(Tys);
getTgtMemIntrinsic(Inst, Info);
getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
getMemcpyLoopResidualLoweringType(
areInlineCompatible(Caller, Callee);
getInlineCallPenalty(F, Call, DefaultCallPenalty);
areTypesABICompatible(Caller, Callee, Types);
isIndexedLoadLegal(Mode, Ty);
isIndexedStoreLegal(Mode, Ty);
getLoadStoreVecRegBitWidth(AS);
isLegalToVectorizeLoad(LI);
isLegalToVectorizeStore(SI);
isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
isLegalToVectorizeReduction(RdxDesc, VF);
isElementTypeLegalForScalableVector(Ty);
getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
preferInLoopReduction(Opcode, Ty, Flags);
preferPredicatedReductionSelect(Opcode, Ty, Flags);
getVPLegalizationStrategy(VPI);
hasArmWideBranch(Thumb);
shouldExpandReduction(II);
hasActiveVectorLength(Opcode, DataType, Alignment);