From 3b983d27a82351fd25a1ccbbfa684bc0f73f4db6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mikael=20=C3=85gren?= Date: Wed, 9 Oct 2024 09:45:29 +0200 Subject: [PATCH] FPGA: Increase UART baud rate to 500k --- hw/application_fpga/core/uart/rtl/uart.v | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/application_fpga/core/uart/rtl/uart.v b/hw/application_fpga/core/uart/rtl/uart.v index b2d03640..4a18a85b 100644 --- a/hw/application_fpga/core/uart/rtl/uart.v +++ b/hw/application_fpga/core/uart/rtl/uart.v @@ -83,10 +83,10 @@ module uart( // The default bit rate is based on target clock frequency // divided by the bit rate times in order to hit the // center of the bits. I.e. - // Clock: 18 MHz, 62500 bps - // Divisor = 18E6 / 62500 = 288 + // Clock: 18 MHz, 500 Kbps + // Divisor = 18E6 / 500E3 = 36 // This also satisfies 1E6 % bps == 0 for the CH552 MCU used for USB-serial - localparam DEFAULT_BIT_RATE = 16'd288; + localparam DEFAULT_BIT_RATE = 16'd36; localparam DEFAULT_DATA_BITS = 4'h8; localparam DEFAULT_STOP_BITS = 2'h1;