diff --git a/crates/sel4-capdl-initializer/core/src/lib.rs b/crates/sel4-capdl-initializer/core/src/lib.rs index dfc3f0566..ec8553a19 100644 --- a/crates/sel4-capdl-initializer/core/src/lib.rs +++ b/crates/sel4-capdl-initializer/core/src/lib.rs @@ -326,6 +326,19 @@ impl<'a, N: ObjectName, D: Content, M: GetEmbeddedFrame, B: BorrowMut<[PerObject } } + { + let ioports = self + .spec() + .filter_objects::<&object::IOPorts>() + .map(|(obj_id, obj)| (obj_id, obj.start_port, obj.end_port)); + + for (obj_id, start_port, end_port) in ioports { + let slot = self.cslot_alloc_or_panic(); + init_thread::slot::IO_PORT_CONTROL.cap().ioport_control_issue(start_port, end_port, &cslot_to_relative_cptr(slot))?; + self.set_orig_cslot(obj_id, slot); + } + } + // Create IrqHandler caps { for IrqEntry { irq, handler } in self.spec().irqs.iter() { diff --git a/crates/sel4-capdl-initializer/types/src/spec.rs b/crates/sel4-capdl-initializer/types/src/spec.rs index b140133d1..6bfba1654 100644 --- a/crates/sel4-capdl-initializer/types/src/spec.rs +++ b/crates/sel4-capdl-initializer/types/src/spec.rs @@ -81,6 +81,7 @@ pub enum Object<'a, D, M> { ArmIrq(object::ArmIrq<'a>), IrqMsi(object::IrqMsi<'a>), IrqIOApic(object::IrqIOApic<'a>), + IOPorts(object::IOPorts), SchedContext(object::SchedContext), Reply, } @@ -111,6 +112,7 @@ pub enum Cap { ArmIrqHandler(cap::ArmIrqHandler), IrqMsiHandler(cap::IrqMsiHandler), IrqIOApicHandler(cap::IrqIOApicHandler), + IOPorts(cap::IOPorts), SchedContext(cap::SchedContext), Reply(cap::Reply), } @@ -131,6 +133,7 @@ impl Cap { Cap::ArmIrqHandler(cap) => cap.object, Cap::IrqMsiHandler(cap) => cap.object, Cap::IrqIOApicHandler(cap) => cap.object, + Cap::IOPorts(cap) => cap.object, Cap::SchedContext(cap) => cap.object, Cap::Reply(cap) => cap.object, } @@ -262,6 +265,13 @@ pub mod object { pub polarity: Word, } + #[derive(Debug, Clone, Eq, PartialEq, IsObject)] + #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] + pub struct IOPorts { + pub start_port: Word, + pub end_port: Word, + } + #[derive(Debug, Clone, Eq, PartialEq, IsObject)] #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] pub struct SchedContext { @@ -372,6 +382,12 @@ pub mod cap { pub object: ObjectId, } + #[derive(Debug, Clone, Eq, PartialEq, IsCap)] + #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] + pub struct IOPorts { + pub object: ObjectId, + } + #[derive(Debug, Clone, Eq, PartialEq, IsCap)] #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] pub struct SchedContext { diff --git a/crates/sel4-capdl-initializer/types/src/traverse.rs b/crates/sel4-capdl-initializer/types/src/traverse.rs index 748c05e81..ef0735258 100644 --- a/crates/sel4-capdl-initializer/types/src/traverse.rs +++ b/crates/sel4-capdl-initializer/types/src/traverse.rs @@ -42,6 +42,7 @@ impl<'a, N, D, M> Spec<'a, N, D, M> { Object::ArmIrq(obj) => Object::ArmIrq(obj.clone()), Object::IrqMsi(obj) => Object::IrqMsi(obj.clone()), Object::IrqIOApic(obj) => Object::IrqIOApic(obj.clone()), + Object::IOPorts(obj) => Object::IOPorts(obj.clone()), Object::SchedContext(obj) => Object::SchedContext(obj.clone()), Object::Reply => Object::Reply, }, diff --git a/crates/sel4/src/arch/x86/arch/x64/invocations.rs b/crates/sel4/src/arch/x86/arch/x64/invocations.rs index 0b9aa7fd4..5e881dfeb 100644 --- a/crates/sel4/src/arch/x86/arch/x64/invocations.rs +++ b/crates/sel4/src/arch/x86/arch/x64/invocations.rs @@ -144,6 +144,22 @@ impl IrqControl { } } +impl IOPortControl { + /// Corresponds to `seL4_X86_IOPortControl_Issue`. + pub fn ioport_control_issue(self, first_port: Word, last_port: Word, dst: &AbsoluteCPtr) -> Result<()> { + Error::wrap(self.invoke(|cptr, ipc_buffer| { + ipc_buffer.inner_mut().seL4_X86_IOPortControl_Issue( + cptr.bits(), + first_port, + last_port, + dst.root().bits(), + dst.path().bits(), + dst.path().depth_for_kernel(), + ) + })) + } +} + impl AsidControl { /// Corresponds to `seL4_X86_ASIDControl_MakePool`. pub fn asid_control_make_pool(self, untyped: Untyped, dst: &AbsoluteCPtr) -> Result<()> { diff --git a/crates/sel4/src/cptr.rs b/crates/sel4/src/cptr.rs index af3214a12..43229e1be 100644 --- a/crates/sel4/src/cptr.rs +++ b/crates/sel4/src/cptr.rs @@ -253,6 +253,15 @@ pub mod cap_type { } } } + + sel4_cfg_if! { + if #[sel4_cfg(ARCH_X86_64)] { + declare_cap_type! { + /// Corresponds to `seL4_X86_IOPortControl`. + IOPortControl + } + } + } } use cap::*; @@ -292,6 +301,12 @@ pub mod cap { declare_cap_alias!(SchedControl); } } + + sel4_cfg_if! { + if #[sel4_cfg(ARCH_X86_64)] { + declare_cap_alias!(IOPortControl); + } + } } impl Cap { diff --git a/crates/sel4/src/init_thread.rs b/crates/sel4/src/init_thread.rs index 36c3e9d0e..419dc5b42 100644 --- a/crates/sel4/src/init_thread.rs +++ b/crates/sel4/src/init_thread.rs @@ -134,8 +134,7 @@ pub mod slot { (IRQ_CONTROL, IrqControl, seL4_CapIRQControl), (ASID_CONTROL, AsidControl, seL4_CapASIDControl), (ASID_POOL, AsidPool, seL4_CapInitThreadASIDPool), - #[cfg(any())] // TODO - (IO_PORT_CONTROL, Null, seL4_CapIOPortControl), + (IO_PORT_CONTROL, IOPortControl, seL4_CapIOPortControl), #[cfg(any())] // TODO (IO_SPACE, Null, seL4_CapIOSpace), (BOOT_INFO_FRAME, Granule, seL4_CapBootInfoFrame),