From 2ce4624ddc326b73ed02ab03e4bba83960b6107f Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 6 Nov 2022 20:52:05 +0100
Subject: [PATCH] Deprecate the crate
---
Cargo.toml | 2 +-
README.md | 98 ++++--------------------------------------------------
2 files changed, 8 insertions(+), 92 deletions(-)
diff --git a/Cargo.toml b/Cargo.toml
index 0137c99..a93aaef 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
[package]
name = "cortex-a"
-version = "8.1.0"
+version = "8.1.1"
authors = ["Andre Richter <andre.o.richter@gmail.com>"]
description = "Low level access to Cortex-A processors"
homepage = "https://github.com/rust-embedded/cortex-a"
diff --git a/README.md b/README.md
index 1de717c..5c4efdc 100644
--- a/README.md
+++ b/README.md
@@ -1,94 +1,10 @@
-[](https://crates.io/crates/cortex-a)
-[](https://crates.io/crates/cortex-a)
+# Deprecation Notice
-# cortex-a
+This crate has been renamed to `aarch64-cpu`. Please find it at
+- https://github.com/rust-embedded/aarch64-cpu
+- https://crates.io/crates/aarch64-cpu
-Low level access to Cortex-A processors.
+Version `8.1.1` will be the last version of this crate and has been added to get this message out.
+To keep the version history sane, the first version of `aarch64-cpu` starts at `9.0.0`.
-## Currently Supported Execution States
-
-- [x] AArch64
-- [ ] AArch32
-
-## Minimum Supported Rust Version
-
-Requires a recent nightly of Rust if the (default) `nightly` feature is enabled. Without this the
-register access module is not available.
-
-## Usage
-
-Please note that for using this crate's [register definitions](src/registers) (as provided by
-`cortex_a::registers::*`), you need to also include
-[`tock-registers`](https://crates.io/crates/tock-registers) in your project. This is because the
-`interface` traits provided by `tock-registers` are implemented by this crate. You should include
-the same version of `tock-registers` as is being used by this crate to ensure sane
-interoperatbility.
-
-For example, in the following snippet, `X.Y.Z` should be the same version of `tock-registers` that
-is mentioned in `cortex-a`'s [`Cargo.toml`](Cargo.toml#L27).
-
-```toml
-[package]
-name = "Your embedded project"
-
-# Some parts omitted for brevity.
-
-[dependencies]
-tock-registers = "X.Y.Z"
-cortex-a = "A.B.C" # <-- Includes tock-registers itself.
-```
-
-### Example
-
-Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples. Listed
-below is a snippet of `rust-raspberrypi-OS-tutorials`'s early boot code.
-
-```rust
-use cortex_a::{asm, registers::*};
-use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.
-
-// Some parts omitted for brevity.
-
-unsafe fn prepare_el2_to_el1_transition(
- virt_boot_core_stack_end_exclusive_addr: u64,
- virt_kernel_init_addr: u64,
-) {
- // Enable timer counter registers for EL1.
- CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
- // No offset for reading the counters.
- CNTVOFF_EL2.set(0);
-
- // Set EL1 execution state to AArch64.
- HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
- // Set up a simulated exception return.
- SPSR_EL2.write(
- SPSR_EL2::D::Masked
- + SPSR_EL2::A::Masked
- + SPSR_EL2::I::Masked
- + SPSR_EL2::F::Masked
- + SPSR_EL2::M::EL1h,
- );
-```
-
-## Disclaimer
-
-Descriptive comments in the source files are taken from the
-[ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile](https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf?_ga=2.266626254.1122218691.1534883460-1326731866.1530967873).
-
-## License
-
-Licensed under either of
-
-- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
- http://www.apache.org/licenses/LICENSE-2.0)
-- MIT License ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
-
-at your option.
-
-### Contribution
-
-Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the
-work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any
-additional terms or conditions.
+Thanks!