From 865f79a94fe8cc5e2762e7d9cc37bf31ca934a21 Mon Sep 17 00:00:00 2001 From: cyao1234 Date: Fri, 21 Oct 2022 15:55:59 +0200 Subject: [PATCH] Make GDS workflow to include the correct files, inline readme.md --- .github/workflows/docs.yaml | 4 +--- .github/workflows/gds.yaml | 10 +++++----- .gitignore | 4 ++++ README.md | 11 +++++++++-- info.yaml | 1 - requirements.txt | 2 -- src/template.v | 4 ++-- src/template_tb.v | 6 +++++- 8 files changed, 26 insertions(+), 16 deletions(-) create mode 100644 .gitignore delete mode 100644 requirements.txt diff --git a/.github/workflows/docs.yaml b/.github/workflows/docs.yaml index b27439a9..62acdfd7 100644 --- a/.github/workflows/docs.yaml +++ b/.github/workflows/docs.yaml @@ -19,10 +19,8 @@ jobs: uses: actions/setup-python@v4 with: python-version: '3.7.7' - cache: 'pip' - - run: pip install -r requirements.txt + - run: pip install requests PyYAML # fetch the Verilog from Wokwi API - name: fetch Verilog and build config run: ./configure.py --check-docs - diff --git a/.github/workflows/gds.yaml b/.github/workflows/gds.yaml index 10546789..e8a8863e 100644 --- a/.github/workflows/gds.yaml +++ b/.github/workflows/gds.yaml @@ -34,8 +34,7 @@ jobs: uses: actions/setup-python@v4 with: python-version: '3.7.7' - cache: 'pip' - - run: pip install -r requirements.txt + - run: pip install requests PyYAML # fetch the Verilog from Wokwi API - name: fetch Verilog and build config @@ -59,7 +58,7 @@ jobs: - name: add summary run: ./configure.py --get-stats >> $GITHUB_STEP_SUMMARY - + - name: populate src cache uses: actions/cache@v3 with: @@ -137,7 +136,7 @@ jobs: - name: gds2gltf run: | - python -m pip install -r requirements.txt + python -m pip install numpy gdspy triangle pygltflib cp runs/wokwi/results/final/gds/*.gds tinytapeout.gds python3 gds2gltf.py tinytapeout.gds cp tinytapeout.gds.gltf viewer/ @@ -173,7 +172,8 @@ jobs: path: | src/* runs/wokwi/results/final/* - runs/wokwi/reports/final_summary_report.csv + runs/wokwi/reports/metrics.csv + runs/wokwi/reports/synthesis/1-synthesis.AREA 0.stat.rpt pages: needs: diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..e92873ac --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +.DS_Store +.idea +.vscode +*.vcd diff --git a/README.md b/README.md index cc122856..633e65c8 100644 --- a/README.md +++ b/README.md @@ -14,6 +14,13 @@ When you edit the info.yaml to choose a different ID, the [GitHub Action](.githu After that, the action uses the open source ASIC tool called [OpenLane](https://www.zerotoasiccourse.com/terminology/openlane/) to build the files needed to fabricate an ASIC. +# Setup + +Due to Github limitations, you need to do some work to get everything to work. + +1. Go to Actons tab and press enable Github Actions +2. Go to Settings tab and select Pages, then change Source from `Deploy from a branch` to `Github Actions` + # What files get made? When the action is complete, you can click on the 'Actions' tab above, choose the 'gds' action and then click on the latest result. @@ -26,8 +33,8 @@ You should see a page with the results of the build: You can also download a zipped artifact that contains: -* runs/wokwi/reports/final_summary_report.csv - CSV file with lots of details about the design -* runs/wokwi/reports/synthesis/1-synthesis.stat.rpt.strategy4 - list of the [standard cells](https://www.zerotoasiccourse.com/terminology/standardcell/) used by your design +* runs/wokwi/reports/metrics.csv - CSV file with lots of details about the design +* runs/wokwi/reports/synthesis/1-synthesis.AREA 0.stat.rpt - list of the [standard cells](https://www.zerotoasiccourse.com/terminology/standardcell/) used by your design * runs/wokwi/results/final/gds/user_module.gds - the final [GDS](https://www.zerotoasiccourse.com/terminology/gds2/) file needed to make your design # What next? diff --git a/info.yaml b/info.yaml index 960bf97a..b7b3435b 100644 --- a/info.yaml +++ b/info.yaml @@ -42,4 +42,3 @@ documentation: - segment f - segment g - none - diff --git a/requirements.txt b/requirements.txt deleted file mode 100644 index 6c9fdba9..00000000 --- a/requirements.txt +++ /dev/null @@ -1,2 +0,0 @@ -PyYAML -requests diff --git a/src/template.v b/src/template.v index 83b4829d..51cb39e6 100644 --- a/src/template.v +++ b/src/template.v @@ -2,8 +2,8 @@ // Remember to include your top module name in the info.yaml file `default_netname none -module githubusername_top( //prepend your github username - input [7:0] io_in, //leave the port names unchanged +module githubusername_top( // prepend your github username + input [7:0] io_in, // leave the port names unchanged output [7:0] io_out); //****Your Design Here**** diff --git a/src/template_tb.v b/src/template_tb.v index 5e87fbfc..e0e54068 100644 --- a/src/template_tb.v +++ b/src/template_tb.v @@ -1,3 +1,6 @@ +`include "template.v" +`timescale 1ns/1ps + module template_tb (); reg [7:0] io_in; wire [7:0] io_out; @@ -12,8 +15,9 @@ module template_tb (); #1 io_in = 8'b00000011; #1 io_in = 8'b00000010; #1 io_in = 8'b00000000; + $finish; end githubusername_top dut(.io_i(io_in), .io_o(io_out)); -endmodule +endmodule