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info.yaml
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---
# TinyTapeout project information
project:
wokwi_id: 0 # If using wokwi, set this to your project's ID
source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here. Source files must be in ./src
- fsm.v
- top.v
top_module: "rolfmobile99_alu_fsm_top" # put the name of your top module here, make it unique by prepending your github username
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it.
#
# Here is an example: https://github.com/mattvenn/tinytapeout_m_segments/blob/main/info.yaml
#
# This info will be automatically collected and used to make a datasheet for the chip.
documentation:
author: "Rolf Widenfelt" # Your name
discord: "" # Your discord handle
title: "4-bit badge ALU" # Project title
description: "A 4-bit ALU inspired by Supercon.6 badge" # Short description of what your project does
how_it_works: "finite state machine with combinational logic (in verilog)" # Longer description of how the project works
how_to_test: "cocotb" # Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
external_hw: "" # Describe any external hardware needed
language: "verilog" # other examples include Verilog, Amaranth, VHDL, etc
doc_link: "" # URL to longer form documentation, eg the README.md in your repository
clock_hz: 0 # Clock frequency in Hz (if required) we are expecting max clock frequency to be ~6khz. Provided on input 0.
picture: "" # relative path to a picture in your repository
inputs: # input pins 7-0 (e.g. clk is pin 7)
- clk
- rst
- ctl
- none
- datain3
- datain2
- datain1
- datain0
outputs: # a description of what the outputs do
- none
- none
- none
- cout
- alu3
- alu2
- alu1
- alu0