diff --git a/src/hotspot/cpu/riscv/gc/shenandoah/.shenandoahBarrierSetAssembler_riscv.cpp.swp b/src/hotspot/cpu/riscv/gc/shenandoah/.shenandoahBarrierSetAssembler_riscv.cpp.swp deleted file mode 100644 index fa5135b6a5ce1..0000000000000 Binary files a/src/hotspot/cpu/riscv/gc/shenandoah/.shenandoahBarrierSetAssembler_riscv.cpp.swp and /dev/null differ diff --git a/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp b/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp index 3486af30079b5..a93bf5394ce94 100644 --- a/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp @@ -300,7 +300,7 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, assert(!is_narrow, "phantom access cannot be narrow"); target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak); } - __ call_mig(target); + __ rt_call(target); __ mv(t0, x10); __ pop_call_clobbered_registers(); __ mv(x10, t0); @@ -703,7 +703,7 @@ void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_s assert(is_native, "phantom must only be called off-heap"); target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom); } - __ call_mig(target); + __ rt_call(target); __ mv(t0, x10); __ pop_call_clobbered_registers(); __ mv(x10, t0); diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp index 48610daaa40ef..0640919c596f3 100644 --- a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp @@ -651,8 +651,10 @@ void MacroAssembler::emit_static_call_stub() { void MacroAssembler::call_VM_leaf_base(address entry_point, int number_of_arguments, Label *retaddr) { + int32_t offset = 0; push_reg(RegSet::of(t0, xmethod), sp); // push << t0 & xmethod >> to sp - call(entry_point); + movptr(t0, entry_point, offset); + jalr(x1, t0, offset); if (retaddr != nullptr) { bind(*retaddr); } diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp index b6f9183ad8c75..3101121bf75be 100644 --- a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp +++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp @@ -597,15 +597,15 @@ class MacroAssembler: public Assembler { void j(const address dest, Register temp = t0); void j(Label &l, Register temp = t0); void j(const Address &adr, Register temp = t0); - - void call(const address dest, Register temp = t0) { +/* + void fixed_rt_call(const address dest, Register temp = t0) { assert_cond(dest != nullptr); assert(temp != noreg, "expecting a register"); int32_t offset = 0; movptr(temp, dest, offset); jalr(x1, temp, offset); } - +*/ void call_la(const address dest, Register temp = t0) { assert_cond(dest != nullptr); assert(temp != noreg, "expecting a register"); @@ -614,10 +614,6 @@ class MacroAssembler: public Assembler { jalr(x1, temp, offset); } - void call_mig(const address dest, Register temp = t0) { - call(dest, temp); - } - inline void ret() { jalr(x0, x1, 0); } diff --git a/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp b/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp index bfa05b65e8719..7512655d45d23 100644 --- a/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp +++ b/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp @@ -634,7 +634,7 @@ class StubGenerator: public StubCodeGenerator { assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); #endif BLOCK_COMMENT("call MacroAssembler::debug"); - __ call(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)); + __ rt_call(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)); __ ebreak(); return start; @@ -5432,7 +5432,7 @@ static const int64_t right_3_bits = right_n_bits(3); } __ mv(c_rarg0, xthread); BLOCK_COMMENT("call runtime_entry"); - __ call_mig(runtime_entry); + __ rt_call(runtime_entry); // Generate oop map OopMap* map = new OopMap(framesize, 0); diff --git a/src/hotspot/cpu/riscv/templateInterpreterGenerator_riscv.cpp b/src/hotspot/cpu/riscv/templateInterpreterGenerator_riscv.cpp index fd94b0bf0bdda..82d8f945ae573 100644 --- a/src/hotspot/cpu/riscv/templateInterpreterGenerator_riscv.cpp +++ b/src/hotspot/cpu/riscv/templateInterpreterGenerator_riscv.cpp @@ -1203,7 +1203,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) { // hand. // __ mv(c_rarg0, xthread); - __ call(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)); + __ rt_call(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)); __ get_method(xmethod); __ reinit_heapbase(); __ bind(Continue); @@ -1252,7 +1252,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) { __ push_call_clobbered_registers(); __ mv(c_rarg0, xthread); - __ call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); + __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); __ pop_call_clobbered_registers(); __ bind(no_reguard); }