From ca57b488eaac8de3aebc9d096eb6b6e5a105f314 Mon Sep 17 00:00:00 2001 From: tushar3q34 Date: Wed, 15 Jan 2025 04:43:37 +0530 Subject: [PATCH] Compilation, build error and test fixes [Capstone to Zydis] --- .gitignore | 1 - librz/arch/isa/x86/common.c | 14 +- librz/arch/isa/x86/common.h | 2 +- librz/arch/isa/x86/il_ops.inc | 146 ++--- librz/arch/isa/x86/x86_dwarf_regnum_table.h | 5 + librz/arch/isa/x86/x86_il.h | 4 +- librz/arch/p/analysis/analysis_x86_zydis.c | 39 +- librz/arch/p/asm/asm_x86_zydis.c | 32 +- .../packagefiles/capstone-4.0.2/meson.build | 1 - .../packagefiles/capstone-5.0.1/meson.build | 1 - .../capstone-6.0.0-alpha3/meson.build | 1 - subprojects/packagefiles/zydis/meson.build | 32 +- subprojects/zydis.wrap | 12 +- test/db/abi/languages/rust | 6 +- test/db/analysis/golang | 3 + test/db/analysis/vars | 185 ++++--- test/db/analysis/x86_32 | 192 +++---- test/db/analysis/x86_64 | 513 +++++++++--------- test/db/cmd/cmd_a8 | 2 +- test/db/cmd/cmd_af | 18 +- test/db/cmd/cmd_agf | 2 +- test/db/cmd/cmd_ahi | 24 +- test/db/cmd/cmd_att | 88 +-- test/db/cmd/cmd_disassembly | 2 +- test/db/cmd/cmd_list | 2 +- test/db/cmd/cmd_pad | 2 +- test/db/cmd/cmd_pd | 184 ++++--- test/db/cmd/cmd_pd2 | 131 +++-- test/db/cmd/cmd_pd_bugs | 2 +- test/db/cmd/cmd_pd_bytes | 12 +- test/db/cmd/cmd_pde | 26 +- test/db/cmd/cmd_pdr | 18 +- test/db/cmd/cmd_pipe | 14 +- test/db/cmd/cmd_pix | 2 +- test/db/cmd/cmd_print | 44 +- test/db/cmd/cmd_px | 40 +- test/db/cmd/cmd_rop | 74 +-- test/db/cmd/cmd_search | 11 +- test/db/cmd/cmd_search_hit | 2 +- test/db/cmd/cmd_seek | 16 +- test/db/cmd/cmd_signature | 46 +- test/db/cmd/describe | 2 +- test/db/cmd/display_flag | 4 +- test/db/cmd/dwarf | 12 +- test/db/cmd/feat_astabs | 4 +- test/db/cmd/feat_grep | 2 +- test/db/cmd/lea_intel | 28 +- test/db/cmd/midbb | 48 +- test/db/cmd/midflags | 4 +- test/db/cmd/noreturn | 8 +- test/db/cmd/print_bug | 14 +- test/db/cmd/simple-elf | 2 +- test/db/cmd/structures | 32 +- test/db/cmd/types | 105 ++-- test/db/cmd/write | 32 +- test/db/esil/x86_32 | 10 +- test/db/esil/x86_64 | 26 +- test/db/formats/coff | 4 +- test/db/formats/demangling_bin | 4 +- test/db/formats/dmp/dmp | 82 +-- test/db/formats/elf/core | 4 +- test/db/formats/elf/overlapped-segment | 4 +- test/db/formats/elf/reloc | 28 +- test/db/formats/elf/serial | 4 +- test/db/formats/elf/simple | 6 +- test/db/formats/firmware | 16 +- test/db/formats/pdb | 14 +- test/db/formats/pe/aslr | 2 +- test/db/formats/pe/ctxt | 2 +- test/db/formats/pe/d_nonnull-ld | 2 +- test/db/formats/pe/d_resource-ld | 2 +- test/db/formats/pe/d_tiny-ld | 2 +- test/db/formats/pe/debug | 2 +- test/db/formats/pe/dll | 2 +- test/db/formats/pe/dllbound | 2 +- test/db/formats/pe/dllbound2 | 2 +- test/db/formats/pe/dllcfgdup | 2 +- test/db/formats/pe/dllemptyexp | 2 +- test/db/formats/pe/dllextep | 2 +- test/db/formats/pe/hellocxx | 4 +- test/db/formats/pe/mz | 4 +- test/db/formats/pe/nosectionW7 | 4 +- test/db/formats/pe/nosectionXP | 4 +- test/db/formats/pe/secinsec | 2 +- test/db/formats/pe/tls_noEP | 2 +- test/db/rzil/x86 | 4 +- test/output_file | Bin 0 -> 1050 bytes 87 files changed, 1256 insertions(+), 1242 deletions(-) create mode 100755 test/output_file diff --git a/.gitignore b/.gitignore index 3fb847c987c..d3e057ca041 100644 --- a/.gitignore +++ b/.gitignore @@ -134,7 +134,6 @@ subprojects/xz-*/ subprojects/zstd-*/ subprojects/softflo*/ subprojects/zydis/ -subprojects/zycore.wrap dist/windows/Output # Core files generated by OpenBSD *.core diff --git a/librz/arch/isa/x86/common.c b/librz/arch/isa/x86/common.c index 7b907e63b24..70167da94cb 100644 --- a/librz/arch/isa/x86/common.c +++ b/librz/arch/isa/x86/common.c @@ -730,7 +730,7 @@ RZ_IPI RzILOpEffect *x86_il_set_mem_bits(X86Mem mem, RZ_OWN RZ_NONNULL RzILOpPur * \param op * \param analysis_bits bitness */ -RZ_IPI RzILOpPure *x86_il_get_operand_bits(X86Op op, int analysis_bits, ut64 pc, int implicit_size, X86ILIns *ins) { +RZ_IPI RzILOpPure *x86_il_get_operand_bits(X86Op op, int analysis_bits, ut64 pc, int implicit_size, const X86ILIns *ins) { switch (op.type) { // case X86_OP_INVALID: // if (implicit_size) { @@ -742,7 +742,7 @@ RZ_IPI RzILOpPure *x86_il_get_operand_bits(X86Op op, int analysis_bits, ut64 pc, return x86_il_get_reg_bits(op.reg.value, analysis_bits, pc); case ZYDIS_OPERAND_TYPE_IMMEDIATE: /* Immediate values are always sign extended */ - return SN((op.size != 0 ? op.size : implicit_size) * BITS_PER_BYTE, imm_value(op, pc, ins->ins_size)); + return SN((op.size != 0 ? op.size : implicit_size) * BITS_PER_BYTE, imm_value(op, pc)); case ZYDIS_OPERAND_TYPE_MEMORY: return LOADW((op.size != 0 ? op.size : implicit_size) * BITS_PER_BYTE, x86_il_get_memaddr_bits(op.mem, analysis_bits, pc)); default: @@ -805,7 +805,7 @@ RZ_IPI RzILOpBool *x86_il_is_add_carry(RZ_OWN RZ_NONNULL RzILOpPure *res, RZ_OWN RzILOpBool *xr = AND(DUP(xmsb), DUP(nres)); // bit = xy | ry | xr - RzILOpBool *or = OR(xy, ry); + RzILOpBool * or = OR(xy, ry); or = OR(or, xr); return or ; @@ -836,7 +836,7 @@ RZ_IPI RzILOpBool *x86_il_is_sub_borrow(RZ_OWN RZ_NONNULL RzILOpPure *res, RZ_OW RzILOpBool *rnx = AND(DUP(resmsb), DUP(nx)); // bit = nxy | rny | rnx - RzILOpBool *or = OR(nxy, rny); + RzILOpBool * or = OR(nxy, rny); or = OR(or, rnx); return or ; @@ -862,7 +862,7 @@ RZ_IPI RzILOpBool *x86_il_is_add_overflow(RZ_OWN RZ_NONNULL RzILOpPure *res, RZ_ // res & !x & !y RzILOpBool *rnxny = AND(AND(DUP(resmsb), INV(DUP(xmsb))), INV(DUP(ymsb))); // or = nrxy | rnxny - RzILOpBool *or = OR(nrxy, rnxny); + RzILOpBool * or = OR(nrxy, rnxny); return or ; } @@ -887,7 +887,7 @@ RZ_IPI RzILOpBool *x86_il_is_sub_underflow(RZ_OWN RZ_NONNULL RzILOpPure *res, RZ // res & !x & y RzILOpBool *rnxy = AND(AND(DUP(resmsb), INV(DUP(xmsb))), DUP(ymsb)); // or = nrxny | rnxy - RzILOpBool *or = OR(nrxny, rnxy); + RzILOpBool * or = OR(nrxny, rnxy); return or ; } @@ -1478,7 +1478,7 @@ RZ_IPI RzILOpPure *x86_il_get_floating_operand_bits(X86Op op, int bits, ut64 pc) if (x86_il_is_st_reg(op.reg.value)) { return x86_il_get_st_reg(op.reg.value); } else { - RZ_LOG_ERROR("x86: RzIL: Invalid register passed as a floating point operand: %d\n", op.reg); + RZ_LOG_ERROR("x86: RzIL: Invalid register passed as a floating point operand: %d\n", op.reg.value); } break; case ZYDIS_OPERAND_TYPE_MEMORY: diff --git a/librz/arch/isa/x86/common.h b/librz/arch/isa/x86/common.h index 1017d848a76..24cae176095 100644 --- a/librz/arch/isa/x86/common.h +++ b/librz/arch/isa/x86/common.h @@ -88,7 +88,7 @@ extern const char *x86_eflags_registers[X86_EFLAGS_ENDING]; RZ_IPI RzILOpPure *x86_il_get_reg_bits(X86Reg reg, int bits, uint64_t pc); RZ_IPI RzILOpEffect *x86_il_set_reg_bits(X86Reg reg, RZ_OWN RZ_NONNULL RzILOpPure *val, int bits); -RZ_IPI RzILOpPure *x86_il_get_operand_bits(X86Op op, int analysis_bits, ut64 pc, int implicit_size, X86ILIns *ins); +RZ_IPI RzILOpPure *x86_il_get_operand_bits(X86Op op, int analysis_bits, ut64 pc, int implicit_size, const X86ILIns *ins); RZ_IPI RzILOpEffect *x86_il_set_operand_bits(X86Op op, RZ_OWN RZ_NONNULL RzILOpPure *val, int bits, ut64 pc); RZ_IPI RzILOpPure *x86_il_get_memaddr_bits(X86Mem mem, int bits, ut64 pc); diff --git a/librz/arch/isa/x86/il_ops.inc b/librz/arch/isa/x86/il_ops.inc index f148ff21a91..b7ffaf22a9d 100644 --- a/librz/arch/isa/x86/il_ops.inc +++ b/librz/arch/isa/x86/il_ops.inc @@ -343,14 +343,14 @@ RzILOpEffect *x86_il_cmp_helper(const X86ILIns *ins, ut64 pc, RzAnalysis *analys X86Mem src_mem1 = { .base = mem_reg1, - .disp = 0, + .disp = { 0 }, .index = ZYDIS_REGISTER_NONE, .scale = 1, .segment = ZYDIS_REGISTER_DS }; X86Mem src_mem2 = { .base = mem_reg2, - .disp = 0, + .disp = { 0 }, .index = ZYDIS_REGISTER_NONE, .scale = 1, .segment = ZYDIS_REGISTER_ES @@ -880,7 +880,7 @@ IL_LIFTER(into) { #define JUMP_IL() \ do { \ - RzILOpPure *jmp_addr = UN(analysis->bits, imm_value(ins->operands[0], pc, ins->ins_size)); \ + RzILOpPure *jmp_addr = UN(analysis->bits, imm_value(ins->operands[0], pc)); \ if (ins->operands[0].size == 16 && analysis->bits != 64) { \ jmp_addr = LOGAND(jmp_addr, UN(analysis->bits, 0x0000ffff)); \ } \ @@ -1242,7 +1242,7 @@ IL_LIFTER(lodsq) { } \ \ RzILOpEffect *dec_counter = x86_il_set_reg(count_reg, SUB(x86_il_get_reg(count_reg), UN(addr_size, 1))); \ - RzILOpEffect *true_cond = JMP(UN(analysis->bits, pc + imm_value(ins->operands[0], pc, ins->ins_size))); \ + RzILOpEffect *true_cond = JMP(UN(analysis->bits, pc + imm_value(ins->operands[0], pc))); \ RzILOpEffect *branch = BRANCH(cond, true_cond, NOP()); \ \ return SEQ2(dec_counter, branch); \ @@ -1328,14 +1328,14 @@ RzILOpEffect *x86_il_movs_helper(const X86ILIns *ins, ut64 pc, RzAnalysis *analy X86Mem src_mem = { .base = src_reg, - .disp = 0, + .disp = { 0 }, .index = ZYDIS_REGISTER_NONE, .scale = 1, .segment = ZYDIS_REGISTER_DS }; X86Mem dst_mem = { .base = dst_reg, - .disp = 0, + .disp = { 0 }, .index = ZYDIS_REGISTER_NONE, .scale = 1, .segment = ZYDIS_REGISTER_ES @@ -1485,7 +1485,7 @@ IL_LIFTER(nop) { * One's complement negation * Encoding: M */ -IL_LIFTER(not) { +IL_LIFTER(not ) { return x86_il_set_op(0, LOGNOT(x86_il_get_op(0))); } @@ -1501,7 +1501,7 @@ IL_LIFTER(not) { IL_LIFTER(or) { RzILOpPure *op1 = x86_il_get_op(0); RzILOpPure *op2 = x86_il_get_op(1); - RzILOpEffect *or = SETL("_or", LOGOR(op1, op2)); + RzILOpEffect * or = SETL("_or", LOGOR(op1, op2)); RzILOpEffect *set_dest = x86_il_set_op(0, VARL("_or")); RzILOpEffect *clear_of = SETG(EFLAGS(OF), IL_FALSE); @@ -1596,7 +1596,7 @@ IL_LIFTER(popfq) { return SEQ2(x86_il_set_flags(pop.val, 64), pop.eff); } -#define CALCULATE_REX_PREFIX(rex) ((rex).W << 3 | (rex).R << 2 | (rex).X << 1 | (rex).B) +#define CALCULATE_REX_PREFIX(rex) ((rex).W << 3 | (rex).R << 2 | (rex).X << 1 | (rex).B) /* in bytes */ RzILOpEffect *x86_push_helper_impl(RzILOpPure *val, unsigned int user_op_size, unsigned int bitness, const X86ILIns *ins, ut64 pc) { unsigned int dflag = user_op_size; @@ -1606,7 +1606,7 @@ RzILOpEffect *x86_push_helper_impl(RzILOpPure *val, unsigned int user_op_size, u if (ins) { if (bitness == 64) { dflag = CALCULATE_REX_PREFIX(ins->structure->raw.rex) ? 8 : ins->structure->raw.prefixes[2].value ? 2 - : 4; /* in bytes */ + : 4; stack_size = 8; /* in bytes */ } else { /* We use the other operand and address size if the prefix is set */ @@ -1723,23 +1723,23 @@ IL_LIFTER(pushaw) { * Push all general-purpose registers (32-bits) * Encoding: ZO */ -IL_LIFTER(pushal) { - if (analysis->bits != 32) { - return NULL; - } - - RzILOpEffect *temp = SETL("_esp", x86_il_get_reg(ZYDIS_REGISTER_ESP)); - RzILOpEffect *push = x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EAX), 4); - push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_ECX), 4)); - push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EDX), 4)); - push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EBX), 4)); - push = SEQ2(push, x86_push_helper(VARL("_esp"), 4)); - push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EBP), 4)); - push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_ESI), 4)); - push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EDI), 4)); - - return SEQ2(temp, push); -} +// IL_LIFTER(pushal) { +// if (analysis->bits != 32) { +// return NULL; +// } +// +// RzILOpEffect *temp = SETL("_esp", x86_il_get_reg(ZYDIS_REGISTER_ESP)); +// RzILOpEffect *push = x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EAX), 4); +// push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_ECX), 4)); +// push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EDX), 4)); +// push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EBX), 4)); +// push = SEQ2(push, x86_push_helper(VARL("_esp"), 4)); +// push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EBP), 4)); +// push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_ESI), 4)); +// push = SEQ2(push, x86_push_helper(x86_il_get_reg(ZYDIS_REGISTER_EDI), 4)); +// +// return SEQ2(temp, push); +// } #define RCX_MACRO() \ ut8 size_in_bytes = ins->operands[0].size; \ @@ -1894,7 +1894,7 @@ IL_LIFTER(ret) { if (ins->structure->operand_count_visible == 1) { /* Immediate operand (Encoding: I) * Reduce RSP by that many bytes. */ - ret = SEQ2(ret, x86_il_set_reg(ZYDIS_REGISTER_RSP, ADD(x86_il_get_reg(ZYDIS_REGISTER_RSP), UN(analysis->bits, imm_value(ins->operands[0], pc, ins->ins_size))))); + ret = SEQ2(ret, x86_il_set_reg(ZYDIS_REGISTER_RSP, ADD(x86_il_get_reg(ZYDIS_REGISTER_RSP), UN(analysis->bits, imm_value(ins->operands[0], pc))))); } return SEQ2(ret, JMP(VARL("tgt"))); @@ -1938,22 +1938,22 @@ IL_LIFTER(sahf) { * Encoding: M1, MC, MI * (Functionally the same as SHL) */ -IL_LIFTER(sal) { - SHIFT_MACRO(); - - RzILOpEffect *shifted = SETL("_shifted", SHIFTL0(UNSIGNED(size + 1, VARL("_pre_dest")), VARL("_shift"))); - - RzILOpEffect *result = SETL("_dest", UNSIGNED(size, VARL("_shifted"))); - - // if _shift == 0, CF is unaffected. - RzILOpEffect *set_cf = SETG(EFLAGS(CF), MSB(VARL("_shifted"))); - - // if _shift == 1, OF is set to 'CF xor MSB (after shift)'. - // otherwise, OF is undefined. - RzILOpEffect *set_of = SETG(EFLAGS(OF), XOR(VARG(EFLAGS(CF)), MSB(VARL("_dest")))); - - return SEQ8(pre_dest, shift, shifted, result, set_cf, set_of, set_flags, set_dest); -} +// IL_LIFTER(sal) { +// SHIFT_MACRO(); +// +// RzILOpEffect *shifted = SETL("_shifted", SHIFTL0(UNSIGNED(size + 1, VARL("_pre_dest")), VARL("_shift"))); +// +// RzILOpEffect *result = SETL("_dest", UNSIGNED(size, VARL("_shifted"))); +// +// // if _shift == 0, CF is unaffected. +// RzILOpEffect *set_cf = SETG(EFLAGS(CF), MSB(VARL("_shifted"))); +// +// // if _shift == 1, OF is set to 'CF xor MSB (after shift)'. +// // otherwise, OF is undefined. +// RzILOpEffect *set_of = SETG(EFLAGS(OF), XOR(VARG(EFLAGS(CF)), MSB(VARL("_dest")))); +// +// return SEQ8(pre_dest, shift, shifted, result, set_cf, set_of, set_flags, set_dest); +// } /** * SAR @@ -2324,46 +2324,46 @@ IL_LIFTER(test) { * Wait until not busy * ZO */ -IL_LIFTER(wait) { - /* NOP seems to be a reasonable implementation */ - return NOP(); -} +// IL_LIFTER(wait) { +// /* NOP seems to be a reasonable implementation */ +// return NOP(); +// } /** * XCHG * Exchange data * Encoding: O, MR, RM */ -IL_LIFTER(xchg) { - RzILOpEffect *temp = SETL("_temp", x86_il_get_op(0)); - RzILOpEffect *xchg = x86_il_set_op(0, x86_il_get_op(1)); - RzILOpEffect *set_src = x86_il_set_op(1, VARL("_temp")); - - return SEQ3(temp, xchg, set_src); -} +// IL_LIFTER(xchg) { +// RzILOpEffect *temp = SETL("_temp", x86_il_get_op(0)); +// RzILOpEffect *xchg = x86_il_set_op(0, x86_il_get_op(1)); +// RzILOpEffect *set_src = x86_il_set_op(1, VARL("_temp")); +// +// return SEQ3(temp, xchg, set_src); +// } /** * XLATB * Table look-up translation * Encoding: ZO */ -IL_LIFTER(xlatb) { - X86Mem mem; - mem.disp.value = 0; - mem.index = ZYDIS_REGISTER_NONE; - mem.scale = 1; - mem.segment = ZYDIS_REGISTER_DS; - mem.base = ZYDIS_REGISTER_EBX; - - if (analysis->bits == 64) { - mem.segment = ZYDIS_REGISTER_NONE; - mem.base = ZYDIS_REGISTER_RBX; - } else if (analysis->bits == 16) { - mem.base = ZYDIS_REGISTER_BX; - } - - return x86_il_set_reg(ZYDIS_REGISTER_AL, LOADW(8, ADD(x86_il_get_memaddr(mem), UNSIGNED(analysis->bits, x86_il_get_reg(ZYDIS_REGISTER_AL))))); -} +// IL_LIFTER(xlatb) { +// X86Mem mem; +// mem.disp.value = 0; +// mem.index = ZYDIS_REGISTER_NONE; +// mem.scale = 1; +// mem.segment = ZYDIS_REGISTER_DS; +// mem.base = ZYDIS_REGISTER_EBX; +// +// if (analysis->bits == 64) { +// mem.segment = ZYDIS_REGISTER_NONE; +// mem.base = ZYDIS_REGISTER_RBX; +// } else if (analysis->bits == 16) { +// mem.base = ZYDIS_REGISTER_BX; +// } +// +// return x86_il_set_reg(ZYDIS_REGISTER_AL, LOADW(8, ADD(x86_il_get_memaddr(mem), UNSIGNED(analysis->bits, x86_il_get_reg(ZYDIS_REGISTER_AL))))); +// } /** * XOR @@ -2373,7 +2373,7 @@ IL_LIFTER(xlatb) { IL_LIFTER(xor) { RzILOpPure *op1 = x86_il_get_op(0); RzILOpPure *op2 = x86_il_get_op(1); - RzILOpEffect *xor = SETL("_xor", LOGXOR(op1, op2)); + RzILOpEffect * xor = SETL("_xor", LOGXOR(op1, op2)); RzILOpEffect *set_dest = x86_il_set_op(0, VARL("_xor")); RzILOpEffect *clear_of = SETG(EFLAGS(OF), IL_FALSE); diff --git a/librz/arch/isa/x86/x86_dwarf_regnum_table.h b/librz/arch/isa/x86/x86_dwarf_regnum_table.h index 46db0e4dddc..74574b36e12 100644 --- a/librz/arch/isa/x86/x86_dwarf_regnum_table.h +++ b/librz/arch/isa/x86/x86_dwarf_regnum_table.h @@ -2,6 +2,9 @@ // SPDX-FileCopyrightText: 2024 Billow // SPDX-License-Identifier: LGPL-3.0-only +#ifndef X86_DWARF_REGNUM_TABLE_H +#define X86_DWARF_REGNUM_TABLE_H + #include /* x86_64 https://software.intel.com/sites/default/files/article/402129/mpx-linux64-abi.pdf */ @@ -84,3 +87,5 @@ static const char *map_dwarf_reg_to_x86_reg(ut32 reg_num) { return "unsupported_reg"; } } + +#endif // X86_DWARF_REGNUM_TABLE_H \ No newline at end of file diff --git a/librz/arch/isa/x86/x86_il.h b/librz/arch/isa/x86/x86_il.h index 082daa3ff33..f4291ba43b9 100644 --- a/librz/arch/isa/x86/x86_il.h +++ b/librz/arch/isa/x86/x86_il.h @@ -7,7 +7,7 @@ #include #include -#include +#include #define BITS_PER_BYTE 8 #define GPR_FAMILY_COUNT 10 @@ -36,6 +36,6 @@ typedef struct x86_il_context_t { RZ_IPI bool rz_x86_il_opcode(RZ_NONNULL RzAnalysis *analysis, RZ_NONNULL RzAnalysisOp *aop, ut64 pc, RZ_BORROW RZ_NONNULL const X86ILIns *ins); RZ_IPI RzAnalysisILConfig *rz_x86_il_config(RZ_NONNULL RzAnalysis *analysis); -#define imm_value(op, pc, ins_size) (ut64)((op.imm.is_relative) ? (op.imm.value.s + pc + ins_size) : (op.imm.value.u)) +#define imm_value(op, pc) (ut64)((op.imm.is_relative) ? (op.imm.value.s + pc) : (op.imm.value.u)) #endif /* RZIL_ANALYSIS_X86_IL_H */ diff --git a/librz/arch/p/analysis/analysis_x86_zydis.c b/librz/arch/p/analysis/analysis_x86_zydis.c index ebfb42f71b9..01c4d227ca6 100644 --- a/librz/arch/p/analysis/analysis_x86_zydis.c +++ b/librz/arch/p/analysis/analysis_x86_zydis.c @@ -4,7 +4,7 @@ #include #include -#include +#include #include // CYCLES: @@ -232,6 +232,7 @@ static char *getarg(RzAnalysis *a, struct Getarg *gop, int n, int set, char *set } snprintf(out, BUF_SZ, "%" PFMT64u, get_imm_reg_value(&op, addr, zydx->zydecode->length)); return out; + default: break; } case ZYDIS_OPERAND_TYPE_MEMORY: { char buf_[BUF_SZ] = { 0 }; @@ -246,7 +247,7 @@ static char *getarg(RzAnalysis *a, struct Getarg *gop, int n, int set, char *set component_count++; } - if (index != "none") { + if (rz_str_cmp("none", index, -1) != 0) { if (scale > 1) { rz_strf(buf_, "%s%s,%d,*,", out, index, scale); } else { @@ -256,7 +257,7 @@ static char *getarg(RzAnalysis *a, struct Getarg *gop, int n, int set, char *set component_count++; } - if (base != "none") { + if (rz_str_cmp("none", base, -1) != 0) { rz_strf(buf_, "%s%s,", out, base); strncpy(out, buf_, BUF_SZ); component_count++; @@ -329,6 +330,7 @@ static int cond_x862r2(ZydisMnemonic mnemonic) { case ZYDIS_MNEMONIC_JCXZ: case ZYDIS_MNEMONIC_JECXZ: break; + default: break; } return 0; } @@ -518,6 +520,7 @@ static void anop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf case ZYDIS_MNEMONIC_SETNL: esilprintf(op, "sf,of,^,!,%s", dst); break; case ZYDIS_MNEMONIC_SETNBE: esilprintf(op, "cf,zf,|,!,%s", dst); break; case ZYDIS_MNEMONIC_SETBE: esilprintf(op, "cf,zf,|,%s", dst); break; + default: break; } } break; // cmov @@ -614,6 +617,7 @@ static void anop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf // mov if SF = 1 conditional = "sf"; break; + default: break; } if (src && dst && conditional) { esilprintf(op, "%s,?{,%s,%s,}", conditional, src, dst); @@ -1049,7 +1053,7 @@ static void anop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf case ZYDIS_MNEMONIC_SYSRET: { int cleanup = 0; if (INSOPS > 0) { - cleanup = (int)get_imm_reg_value(op, addr, zydecode->length); + cleanup = (int)get_imm_reg_value(&INSOP(0), addr, zydecode->length); } esilprintf(op, "%s,[%d],%s,=,%d,%s,+=", sp, rs, pc, rs + cleanup, sp); @@ -1167,6 +1171,7 @@ static void anop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf esilprintf(op, "1,%s,-=,%s,?{,zf,!,?{,%s,%s,=,},}", cnt, cnt, dst, pc); break; + default: break; } } break; case ZYDIS_MNEMONIC_CALL: { @@ -1773,6 +1778,7 @@ static void anop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf rz_strbuf_appendf(&op->esil, ",%d,%s,%%,1,<<,-1,^,%d,%s,/,%s,+,&=[%d]", width * 8, src, width * 8, src, dst_r, width); break; + default: break; } } else { int width = INSOP(0).size; @@ -1790,9 +1796,11 @@ static void anop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf dst_w = getarg(a, &gop, 0, 1, "&", DST_R_AR, NULL, addr); rz_strbuf_appendf(&op->esil, ",%d,%s,%%,1,<<,-1,^,%s", width * 8, src, dst_w); break; + default: break; } } break; + default: break; } if (op->prefix & RZ_ANALYSIS_OP_PREFIX_REP) { @@ -1837,7 +1845,8 @@ static void set_access_info(RzReg *reg, RzAnalysisOp *op, ZydisDecodedInstructio rz_list_append(ret, val); // Register access info - ZydisRegister *regs_read, *regs_write; + ZydisRegister regs_read[zydecode->operand_count]; + ZydisRegister regs_write[zydecode->operand_count]; ut8 read_count = 0; ut8 write_count = 0; for (int i = 0; i < zydecode->operand_count; i++) { @@ -1983,7 +1992,7 @@ static void set_src_dst(RzReg *reg, RzAnalysisValue *val, ZydisDecodedInstructio } } -static void op_fillval(RzAnalysis *a, RzAnalysisOp *op, ZydisDecodedInstruction *zydecode, ZydisDecodedInstruction *zydeop, int mode, ut64 addr) { +static void op_fillval(RzAnalysis *a, RzAnalysisOp *op, ZydisDecodedInstruction *zydecode, ZydisDecodedOperand *zydeop, int mode, ut64 addr) { set_access_info(a->reg, op, zydecode, zydeop, mode); switch (op->type & RZ_ANALYSIS_OP_TYPE_MASK) { case RZ_ANALYSIS_OP_TYPE_MOV: @@ -2130,11 +2139,6 @@ static void set_opdir(RzAnalysisOp *op, ZydisDecodedInstruction *zydecode, Zydis } static void anop(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, ZydisDecodedInstruction *zydecode, ZydisDecodedOperand *zydeop) { - struct Getarg gop = { - .bits = a->bits, - .zydecode = zydecode, - .zydeop = zydeop - }; int regsz = 4; switch (a->bits) { case 64: regsz = 8; break; @@ -2617,9 +2621,6 @@ static void anop(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int break; case ZYDIS_MNEMONIC_UD0: case ZYDIS_MNEMONIC_UD2: -#if CS_API_MAJOR == 4 - case ZYDIS_MNEMONIC_UD2B: -#endif case ZYDIS_MNEMONIC_INT3: op->type = RZ_ANALYSIS_OP_TYPE_TRAP; // TRAP break; @@ -2683,6 +2684,7 @@ static void anop(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int case ZYDIS_MNEMONIC_JNL: op->sign = true; break; + default: break; } break; case ZYDIS_MNEMONIC_CALL: @@ -2964,9 +2966,7 @@ static void anop(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int op->family = RZ_ANALYSIS_OP_FAMILY_CPU; break; case ZYDIS_MNEMONIC_FADD: -#if CS_API_MAJOR == 4 case ZYDIS_MNEMONIC_FADDP: -#endif op->family = RZ_ANALYSIS_OP_FAMILY_FPU; op->type = RZ_ANALYSIS_OP_TYPE_ADD; break; @@ -3003,6 +3003,7 @@ static void anop(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int case ZYDIS_MNEMONIC_SUBSD: // cvtss2sd case ZYDIS_MNEMONIC_CVTSS2SD: // cvtss2sd break; + default: break; } switch (zydecode->mnemonic) { @@ -3131,7 +3132,6 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf ZydisMachineMode mode = select_mode(a); ZydisStackWidth st_mode; - int n, ret; zydx->omode = mode; switch (mode) { @@ -3147,7 +3147,7 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf } ZydisDecoder decoder; - ret = ZydisDecoderInit(&decoder, mode, st_mode); + ZyanStatus ret = ZydisDecoderInit(&decoder, mode, st_mode); if (!ZYAN_SUCCESS(ret)) { return 0; } @@ -3168,6 +3168,9 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf } for (int i = 0; i < zydx->zydecode->operand_count; i++) { zydx->zydeop[i].size = zydx->zydeop[i].size / 8; // Convert from bits to bytes + if (zydx->zydeop[i].type == ZYDIS_OPERAND_TYPE_IMMEDIATE) { + zydx->zydeop[i].size = (a->bits) / 8; + } } if (mask & RZ_ANALYSIS_OP_MASK_DISASM) { ZydisFormatter formatter; diff --git a/librz/arch/p/asm/asm_x86_zydis.c b/librz/arch/p/asm/asm_x86_zydis.c index 6ca3f66034f..fd1289cc02d 100644 --- a/librz/arch/p/asm/asm_x86_zydis.c +++ b/librz/arch/p/asm/asm_x86_zydis.c @@ -4,7 +4,7 @@ #include #include -#include +#include #include "asm_x86_vm.c" @@ -35,11 +35,10 @@ static bool x86_zydis_asm_fini(void *p) { } static char *x86_zydis_asm_mnemonics(RzAsm *a, int id, bool json) { + rz_return_val_if_fail(a && a->cur, NULL); if (!a->plugin_data) { return NULL; } - ZydisContext *zydx = (ZydisContext *)a->plugin_data; - int i; a->cur->disassemble(a, NULL, NULL, -1); if (id != -1) { const char *vname = ZydisMnemonicGetString(id); @@ -52,7 +51,7 @@ static char *x86_zydis_asm_mnemonics(RzAsm *a, int id, bool json) { if (json) { rz_strbuf_append(buf, "["); } - for (i = 1;; i++) { + for (int i = 1;; i++) { const char *op = ZydisMnemonicGetString(i); if (!op) { break; @@ -75,8 +74,8 @@ static char *x86_zydis_asm_mnemonics(RzAsm *a, int id, bool json) { } static int x86_zydis_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) { + rz_return_val_if_fail(a, 0); ZydisContext *zydx = (ZydisContext *)a->plugin_data; - int ret, n; ut64 off = a->pc; ZydisMachineMode mode = (a->bits == 64) ? ZYDIS_MACHINE_MODE_LONG_64 : (a->bits == 32) ? ZYDIS_MACHINE_MODE_LONG_COMPAT_32 @@ -122,7 +121,7 @@ static int x86_zydis_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) if (op->size == 0 && check && zydecode.length > 0) { char *ptrstr; op->size = zydecode.length; - char buf_asm[256]; + char buf_asm[256] = { 0 }; ZydisFormatterFormatInstruction(&format, &zydecode, zydeop, zydecode.operand_count_visible, buf_asm, sizeof(buf_asm), off, ZYAN_NULL); ptrstr = strstr(buf_asm, "ptr "); @@ -133,14 +132,6 @@ static int x86_zydis_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) } else { decompile_vm(a, op, buf, len); } - if (a->syntax == RZ_ASM_SYNTAX_JZ) { - char *buf_asm = rz_strbuf_get(&op->buf_asm); - if (!strncmp(buf_asm, "je ", 3)) { - memcpy(buf_asm, "jz", 2); - } else if (!strncmp(buf_asm, "jne ", 4)) { - memcpy(buf_asm, "jnz", 3); - } - } return op->size; } @@ -155,9 +146,16 @@ RzAsmPlugin rz_asm_plugin_x86_zydis = { .fini = x86_zydis_asm_fini, .mnemonics = x86_zydis_asm_mnemonics, .disassemble = &x86_zydis_disassemble, - .features = "vm,3dnow,aes,adx,avx,avx2,avx512,bmi,bmi2,cmov," - "f16c,fma,fma4,fsgsbase,hle,mmx,rtm,sha,sse1,sse2," - "sse3,sse41,sse42,sse4a,ssse3,pclmul,xop" + .features = "adox_adcx,aes,amd3dnow,amd3dnow_prefetch,amd_invlpgb,amx_bf16," + "amx_fp16,amx_int8,amx_tile,avx,avx2,avx2gather,avx512evex,avx512vex,avxaes," + "avx_ifma,avx_ne_convert,avx_vnni,avx_vnni_int16,avx_vnni_int8,base,bmi1,bmi2," + "cet,cldemote,clflushopt,clfsh,clwb,clzero,enqcmd,f16c,fma,fma4,fred,gfni," + "hreset,icache_prefetch,invpcid,keylocker,keylocker_wide,knc,knce,kncv,lkgs," + "longmode,lzcnt,mcommit,mmx,monitor,monitorx,movbe,movdir,mpx,msrlist,padlock," + "pause,pbndkb,pclmulqdq,pcommit,pconfig,pku,prefetchwt1,pt,rao_int,rdpid,rdpru," + "rdrand,rdseed,rdtscp,rdwrfsgs,rtm,serialize,sgx,sgx_enclv,sha,sha512,sm3,sm4," + "smap,smx,snp,sse,sse2,sse3,sse4,sse4a,ssse3,svm,tbm,tdx,tsx_ldtrk,uintr,vaes," + "vmfunc,vpclmulqdq,vtx,waitpkg,wrmsrns,x87,xop,xsave,xsavec,xsaveopt,xsaves" }; #ifndef RZ_PLUGIN_INCORE diff --git a/subprojects/packagefiles/capstone-4.0.2/meson.build b/subprojects/packagefiles/capstone-4.0.2/meson.build index 3d0d28c7cce..6e650bc7ca5 100644 --- a/subprojects/packagefiles/capstone-4.0.2/meson.build +++ b/subprojects/packagefiles/capstone-4.0.2/meson.build @@ -81,7 +81,6 @@ libcapstone_c_args = [ '-DCAPSTONE_HAS_POWERPC', '-DCAPSTONE_HAS_SPARC', '-DCAPSTONE_HAS_SYSZ', - '-DCAPSTONE_HAS_X86', '-DCAPSTONE_HAS_XCORE', '-DCAPSTONE_HAS_TMS320C64X', ] diff --git a/subprojects/packagefiles/capstone-5.0.1/meson.build b/subprojects/packagefiles/capstone-5.0.1/meson.build index b6ac8cf6b60..ef4709af619 100644 --- a/subprojects/packagefiles/capstone-5.0.1/meson.build +++ b/subprojects/packagefiles/capstone-5.0.1/meson.build @@ -87,7 +87,6 @@ libcapstone_c_args = [ '-DCAPSTONE_HAS_POWERPC', '-DCAPSTONE_HAS_SPARC', '-DCAPSTONE_HAS_SYSZ', - '-DCAPSTONE_HAS_X86', '-DCAPSTONE_HAS_XCORE', '-DCAPSTONE_HAS_TMS320C64X', '-DCAPSTONE_HAS_TRICORE', diff --git a/subprojects/packagefiles/capstone-6.0.0-alpha3/meson.build b/subprojects/packagefiles/capstone-6.0.0-alpha3/meson.build index d1d5a9cb704..6b2f1d92d75 100644 --- a/subprojects/packagefiles/capstone-6.0.0-alpha3/meson.build +++ b/subprojects/packagefiles/capstone-6.0.0-alpha3/meson.build @@ -107,7 +107,6 @@ libcapstone_c_args = [ '-DCAPSTONE_HAS_POWERPC', '-DCAPSTONE_HAS_SPARC', '-DCAPSTONE_HAS_SYSTEMZ', - '-DCAPSTONE_HAS_X86', '-DCAPSTONE_HAS_XCORE', '-DCAPSTONE_HAS_TMS320C64X', '-DCAPSTONE_HAS_TRICORE', diff --git a/subprojects/packagefiles/zydis/meson.build b/subprojects/packagefiles/zydis/meson.build index 875347f5d41..d70aec4b83c 100644 --- a/subprojects/packagefiles/zydis/meson.build +++ b/subprojects/packagefiles/zydis/meson.build @@ -1,6 +1,6 @@ -project('zydis', 'c', version: '4.1.0') +project('zydis', 'c', version: '4.1.0', meson_version: '>=0.55.0') + -#Compiler setup cc = meson.get_compiler('c') if cc.has_argument('--std=c99') @@ -11,38 +11,36 @@ conf_data = configuration_data() zydis_c_args = [ '-DZYDIS_STATIC_DEFINE', - '-fvisibility=hidden', + '-fvisibility=hidden', ] +if cc.get_id() in ['gcc', 'clang'] + if cc.has_argument('-w') + add_project_arguments('-w', language: 'c') + endif +elif cc.get_id() == 'msvc' + add_project_arguments('/w', language: 'c') +endif zydis_sources = [ - 'src/zydis/Formatter.c', - 'src/zydis/FormatterBuffer.c', - 'src/zydis/MetaInfo.c', - 'src/zydis/SharedData.c', - 'src/zydis/String.c', - 'src/zydis/Utils.c', - 'src/zydis/Zydis.c', + 'amalgamated-dist/Zydis.c' ] if host_machine.system() == 'windows' - zydis_c_args += ['-D_CRT_SECURE_NO_WARNINGS'] # Suppress warnings about unsafe functions + zydis_c_args += ['-D_CRT_SECURE_NO_WARNINGS'] endif zydis_includes = [ - include_directories('.'), - include_directories('include'), + './amalgamated-dist' ] libzydis = static_library('zydis', zydis_sources, c_args: zydis_c_args, include_directories: zydis_includes, - install: true, # Install the library when running `meson install` + install: false, ) zydis_dep = declare_dependency( link_with: libzydis, include_directories: zydis_includes, -) - -install_headers('include/Zydis', subdir: 'Zydis') +) \ No newline at end of file diff --git a/subprojects/zydis.wrap b/subprojects/zydis.wrap index e01d5d06796..4c941322e80 100644 --- a/subprojects/zydis.wrap +++ b/subprojects/zydis.wrap @@ -1,6 +1,8 @@ -[wrap-git] -url = https://github.com/zyantific/zydis.git +[wrap-file] directory = zydis -patch-directory = zydis -depth = 1 -revision = master \ No newline at end of file +source_url = https://github.com/zyantific/zydis/releases/download/v4.1.0/zydis-amalgamated.tar.gz +source_filename = zydis-amalgamated.tar.gz +source_hash = aa9b82be3a37a2998bd8e16cf583bbf2b6c3d80e97dc20504169dc32ca1ced59 +lead_directory_missing = true +patch_directory = zydis +depth = 1 \ No newline at end of file diff --git a/test/db/abi/languages/rust b/test/db/abi/languages/rust index 43d875f1a13..eb493274806 100644 --- a/test/db/abi/languages/rust +++ b/test/db/abi/languages/rust @@ -22,8 +22,8 @@ mov rdx, rsp and rsp, 0xfffffffffffffff0 push rax push rsp -lea r8, sym.__libc_csu_fini -lea rcx, sym.__libc_csu_init -lea rdi, main +lea r8, qword sym.__libc_csu_fini +lea rcx, qword sym.__libc_csu_init +lea rdi, qword main EOF RUN diff --git a/test/db/analysis/golang b/test/db/analysis/golang index 5dd54e02383..88fe56ddc82 100644 --- a/test/db/analysis/golang +++ b/test/db/analysis/golang @@ -150,6 +150,9 @@ EXPECT=< /dev/null pd 38 EOF EXPECT=< 0x00000010 lea edi, [esi + 1] + ││ 0x00000009 lea esi, dword [esi] +│ ┌───> 0x00000010 lea edi, dword [esi+0x01] │ ╎││ 0x00000013 xor edx, edx │ ╎││ 0x00000015 mov eax, ebp │ ╎││ 0x00000017 div ecx @@ -3750,14 +3750,14 @@ EXPECT=< 0x00000050 mov ecx, dword [ebx + 0x58c] +│ │││╎│└─> 0x00000050 mov ecx, dword [ebx+0x58c] │ │││╎│ 0x00000056 test ecx, ecx -│ │││└───< 0x00000058 jne 0x10 -│ │││ │ 0x0000005a add esi, 1 -│ │││ │ 0x0000005d mov edx, dword [ebx + 0x208] +│ │││└───< 0x00000058 jnz 0x10 +│ │││ │ 0x0000005a add esi, 0x01 +│ │││ │ 0x0000005d mov edx, dword [ebx+0x208] │ │││ │ 0x00000063 mov eax, dword [edx] -│ │││ │ 0x00000065 mov edx, dword [eax + 0x14] +│ │││ │ 0x00000065 mov edx, dword [eax+0x14] EOF RUN @@ -3791,19 +3791,19 @@ aa >/dev/null pd 38 EOF EXPECT=< 0x00000010 lea edi, [esi + 1] + || 0x00000009 lea esi, dword [esi] +| .---> 0x00000010 lea edi, dword [esi+0x01] | :|| 0x00000013 xor edx, edx | :|| 0x00000015 mov eax, ebp | :|| 0x00000017 div ecx @@ -3813,14 +3813,14 @@ EXPECT=< 0x00000050 mov ecx, dword [ebx + 0x58c] +| |||:|`-> 0x00000050 mov ecx, dword [ebx+0x58c] | |||:| 0x00000056 test ecx, ecx -| |||`===< 0x00000058 jne 0x10 -| ||| | 0x0000005a add esi, 1 -| ||| | 0x0000005d mov edx, dword [ebx + 0x208] +| |||`===< 0x00000058 jnz 0x10 +| ||| | 0x0000005a add esi, 0x01 +| ||| | 0x0000005d mov edx, dword [ebx+0x208] | ||| | 0x00000063 mov eax, dword [edx] -| ||| | 0x00000065 mov edx, dword [eax + 0x14] +| ||| | 0x00000065 mov edx, dword [eax+0x14] EOF RUN @@ -3870,42 +3870,42 @@ afva pdf EOF EXPECT=< 0x00401012 mov eax, dword [0x411133] ; [0x411133:4]=0 -| | 0x00401017 shl eax, 2 -| | 0x0040101a mov dword [0x411137], eax ; [0x411137:4]=0 +| |`-> 0x00401012 mov eax, dword [0x411133] +| | 0x00401017 shl eax, 0x02 +| | 0x0040101a mov dword [0x411137], eax | | 0x0040101f push edx -| | 0x00401020 push 0 +| | 0x00401020 push 0x00 | | 0x00401022 call sub.KERNEL32.DLL_GetModuleHandleA | | 0x00401027 mov edx, eax | | 0x00401029 call fcn.0040710c | | 0x0040102e pop edx | | 0x0040102f call fcn.004064a8 | | 0x00401034 call fcn.00407110 -| | 0x00401039 push 0 +| | 0x00401039 push 0x00 | | 0x0040103b call fcn.00408058 | | 0x00401040 pop ecx | | 0x00401041 push 0x4110dc -| | 0x00401046 push 0 +| | 0x00401046 push 0x00 | | 0x00401048 call sub.KERNEL32.DLL_GetModuleHandleA -| | 0x0040104d mov dword [0x41113b], eax ; [0x41113b:4]=0 -| | 0x00401052 push 0 +| | 0x0040104d mov dword [0x41113b], eax +| | 0x00401052 push 0x00 \ |,=< 0x00401054 jmp fcn.0040dfd0 EOF RUN diff --git a/test/db/analysis/x86_64 b/test/db/analysis/x86_64 index aa7542ada57..cf8cd0a0f54 100644 --- a/test/db/analysis/x86_64 +++ b/test/db/analysis/x86_64 @@ -69,9 +69,9 @@ EXPECT=< 0x00011424 mov rax, qword [rip + 0xde3d] ; data.0001f268 -| | ; [0x1f268:8]=0x21680 +| ````--> 0x00011424 mov rax, qword [data.0001f268] ; [0x1f268:8]=0x21680 EOF RUN @@ -1005,34 +1001,30 @@ s 0x00003ca6 pd 19 EOF EXPECT=< 0x00003cbe mov edi, 1 ; int fd +| `---> 0x00003cbe mov edi, 0x01 ; int fd | || 0x00003cc3 call sym.imp.isatty ; int isatty(int fd) | || 0x00003cc8 test eax, eax -| ,===< 0x00003cca je 0x4c2e -| ||| 0x00003cd0 mov dword [rip + 0x1d626], 2 ; data.00021300 -| ||| ; [0x21300:4]=0 -| ||| 0x00003cda mov byte [rip + 0x1d33f], 1 ; data.00021020 -| ||| ; [0x21020:1]=0 +| ,===< 0x00003cca jz 0x4c2e +| ||| 0x00003cd0 mov dword [data.00021300], 0x02 ; [0x21300:4]=0 +| ||| 0x00003cda mov byte [data.00021020], 0x01 ; [0x21020:1]=0 | ,====< 0x00003ce1 jmp 0x3cf9 | |||| ; CODE XREF from main @ 0x3cb2 -| ||`--> 0x00003ce3 mov esi, 5 ; int64_t arg2 +| ||`--> 0x00003ce3 mov esi, 0x05 ; int64_t arg2 | || | 0x00003ce8 xor edi, edi ; int64_t arg1 -| || | 0x00003cea mov dword [rip + 0x1d60c], 0 ; data.00021300 -| || | ; [0x21300:4]=0 +| || | 0x00003cea mov dword [data.00021300], 0x00 ; [0x21300:4]=0 | || | 0x00003cf4 call fcn.00012740 | || | ; CODE XREFS from main @ 0x3ce1, 0x4602, 0x4c38 -| `----> 0x00003cf9 lea rdi, [rip + 0x14fb4] ; str.QUOTING_STYLE -| | | ; 0x18cb4 ; "QUOTING_STYLE" ; const char *name +| `----> 0x00003cf9 lea rdi, qword [str.QUOTING_STYLE] ; 0x18cb4 ; "QUOTING_STYLE" ; const char *name EOF RUN @@ -1052,34 +1044,30 @@ s 0x00003ca6 pd 19 EOF EXPECT=< 0x00003cbe mov edi, 1 ; int fd +| `------> 0x00003cbe mov edi, 0x01 ; int fd | | | 0x00003cc3 call sym.imp.isatty ; int isatty(int fd) | | | 0x00003cc8 test eax, eax -| ,======< 0x00003cca je 0x4c2e -| | | | 0x00003cd0 mov dword [rip + 0x1d626], 2 ; data.00021300 -| | | | ; [0x21300:4]=0 -| | | | 0x00003cda mov byte [rip + 0x1d33f], 1 ; data.00021020 -| | | | ; [0x21020:1]=0 +| ,======< 0x00003cca jz 0x4c2e +| | | | 0x00003cd0 mov dword [data.00021300], 0x02 ; [0x21300:4]=0 +| | | | 0x00003cda mov byte [data.00021020], 0x01 ; [0x21020:1]=0 | ========< 0x00003ce1 jmp 0x3cf9 | | | | ; CODE XREF from main @ 0x3cb2 -| | `----> 0x00003ce3 mov esi, 5 ; int64_t arg2 +| | `----> 0x00003ce3 mov esi, 0x05 ; int64_t arg2 | | | 0x00003ce8 xor edi, edi ; int64_t arg1 -| | | 0x00003cea mov dword [rip + 0x1d60c], 0 ; data.00021300 -| | | ; [0x21300:4]=0 +| | | 0x00003cea mov dword [data.00021300], 0x00 ; [0x21300:4]=0 | | | 0x00003cf4 call fcn.00012740 | | | ; CODE XREFS from main @ 0x3ce1, 0x4602, 0x4c38 -| --------> 0x00003cf9 lea rdi, [rip + 0x14fb4] ; str.QUOTING_STYLE -| | | ; 0x18cb4 ; "QUOTING_STYLE" ; const char *name +| --------> 0x00003cf9 lea rdi, qword [str.QUOTING_STYLE] ; 0x18cb4 ; "QUOTING_STYLE" ; const char *name EOF RUN @@ -1098,34 +1086,30 @@ s 0x00003ca6 pd 19 EOF EXPECT=< 0x00003cbe mov edi, 1 ; int fd +| `------> 0x00003cbe mov edi, 0x01 ; int fd | | | 0x00003cc3 call sym.imp.isatty ; int isatty(int fd) | | | 0x00003cc8 test eax, eax -| ,======< 0x00003cca je 0x4c2e -| | | | 0x00003cd0 mov dword [rip + 0x1d626], 2 ; data.00021300 -| | | | ; [0x21300:4]=0 -| | | | 0x00003cda mov byte [rip + 0x1d33f], 1 ; data.00021020 -| | | | ; [0x21020:1]=0 +| ,======< 0x00003cca jz 0x4c2e +| | | | 0x00003cd0 mov dword [data.00021300], 0x02 ; [0x21300:4]=0 +| | | | 0x00003cda mov byte [data.00021020], 0x01 ; [0x21020:1]=0 | ========< 0x00003ce1 jmp 0x3cf9 | | | | ; CODE XREF from main @ 0x3cb2 -| | `----> 0x00003ce3 mov esi, 5 ; int64_t arg2 +| | `----> 0x00003ce3 mov esi, 0x05 ; int64_t arg2 | | | 0x00003ce8 xor edi, edi ; int64_t arg1 -| | | 0x00003cea mov dword [rip + 0x1d60c], 0 ; data.00021300 -| | | ; [0x21300:4]=0 +| | | 0x00003cea mov dword [data.00021300], 0x00 ; [0x21300:4]=0 | | | 0x00003cf4 call fcn.00012740 | | | ; CODE XREFS from main @ 0x3ce1, 0x4602, 0x4c38 -| --------> 0x00003cf9 lea rdi, [rip + 0x14fb4] ; str.QUOTING_STYLE -| | | ; 0x18cb4 ; "QUOTING_STYLE" ; const char *name +| --------> 0x00003cf9 lea rdi, qword [str.QUOTING_STYLE] ; 0x18cb4 ; "QUOTING_STYLE" ; const char *name EOF RUN @@ -1151,18 +1135,18 @@ EXPECT=< 0x00012787 call sym.imp.__stack_chk_fail @@ -1185,7 +1169,7 @@ EXPECT=< 0x00000004 c1ebfd shr ebx, 0xfd | : 0x00000007 bb2c000000 mov ebx, 0x2c ; ',' -\ `=< 0x0000000c ebf6 jmp 4 +\ `=< 0x0000000c ebf6 jmp 0x4 / fcn.00000000(); | 0x00000000 b8210000c1 mov eax, 0xc1000021 ; '!' | `==< 0x00000005 ebfd jmp 4 | : 0x00000007 bb2c000000 mov ebx, 0x2c ; ',' -\ `=< 0x0000000c ebf6 jmp 4 +\ `=< 0x0000000c ebf6 jmp 0x4 offset: 0x00000000 name: fcn.00000000 @@ -3045,7 +3029,7 @@ args: 0 |.-------------------------------------. || 0x5 | || ; CODE XREF from fcn.00000000 @ 0xc | -|| jmp 4 | +|| jmp 0x4 | |`-------------------------------------' | v | | @@ -3056,7 +3040,7 @@ args: 0 || shr ebx, 0xfd | || ; ',' | || mov ebx, 0x2c | -|| jmp 5 | +|| jmp 0x5 | |`-------------------------------------' | v | | @@ -3067,16 +3051,16 @@ args: 0 | ; CODE XREF from fcn.00000000 @ 0x5 | .-> 0x00000004 ~ c1ebfd shr ebx, 0xfd | | ; CODE XREF from fcn.00000000 @ 0xc -| .`=< 0x00000005 ebfd jmp 4 +| .`=< 0x00000005 ebfd jmp 0x4 | : 0x00000007 bb2c000000 mov ebx, 0x2c ; ',' -\ `==< 0x0000000c ebf7 jmp 5 +\ `==< 0x0000000c ebf7 jmp 0x5 / fcn.00000000(); | 0x00000000 b8210000c1 mov eax, 0xc1000021 ; '!' | | ; CODE XREF from fcn.00000000 @ 0xc -| .`=< 0x00000005 ebfd jmp 4 +| .`=< 0x00000005 ebfd jmp 0x4 | : 0x00000007 bb2c000000 mov ebx, 0x2c ; ',' -\ `==< 0x0000000c ebf7 jmp 5 +\ `==< 0x0000000c ebf7 jmp 0x5 offset: 0x00000000 name: fcn.00000000 @@ -3137,7 +3121,7 @@ args: 0 | | 0x5 | | | ; '!' | | | mov eax, 0xc1000021 | -| | jmp 9 | +| | jmp 0x9 | | `---------------------' | v | | @@ -3149,7 +3133,7 @@ args: 0 | | shr ebx, 0xfd | | | ; ',' | | | mov ebx, 0x2c | -| | jmp 3 | +| | jmp 0x3 | | `-------------------------------------' | v | | @@ -3172,14 +3156,14 @@ args: 0 | : ; CODE XREF from fcn.00000000 @ 0xa | .--> 0x00000009 c1ebfd shr ebx, 0xfd | : 0x0000000c bb2c000000 mov ebx, 0x2c ; ',' -\ `=< 0x00000011 ebf0 jmp 3 +\ `=< 0x00000011 ebf0 jmp 0x3 / fcn.00000000(); | 0x00000000 0f1f440000 nop dword [rax + rax] | : 0x00000005 b8210000c1 mov eax, 0xc1000021 ; '!' -| `==< 0x0000000a ebfd jmp 9 +| `==< 0x0000000a ebfd jmp 0x9 | : 0x0000000c bb2c000000 mov ebx, 0x2c ; ',' -\ `=< 0x00000011 ebf0 jmp 3 +\ `=< 0x00000011 ebf0 jmp 0x3 EOF RUN @@ -3236,7 +3220,7 @@ args: 0 / fcn.00000003(); | 0x00000003 0010 add byte [rax], dl | ----------- true: 0x00000005 -| 0x00000005 ebf9 jmp 0 +| 0x00000005 ebf9 jmp 0x0 | ----------- true: 0x00000000 .----. @@ -3254,7 +3238,7 @@ args: 0 | | | | .-----------. | | 0x5 | -| | jmp 0 | +| | jmp 0x0 | | `-----------' | v | | @@ -3262,18 +3246,18 @@ args: 0 / fcn.00000003(); | 0x00000003 0010 add byte [rax], dl -| 0x00000005 ebf9 jmp 0 +| 0x00000005 ebf9 jmp 0x0 | ; CODE XREF from fcn.00000003 @ 0x5 | ;-- (0x00000003) fcn.00000003: | 0x00000000 ~ b821c10010 mov eax, 0x1000c121 -| 0x00000005 ebf9 jmp 0 +| 0x00000005 ebf9 jmp 0x0 | ; CODE XREF from fcn.00000003 @ 0x5 | 0x00000000 ~ b821c10010 mov eax, 0x1000c121 / fcn.00000003(); | 0x00000003 0010 add byte [rax], dl -| 0x00000005 ebf9 jmp 0 +| 0x00000005 ebf9 jmp 0x0 EOF RUN @@ -3302,7 +3286,7 @@ EXPECT=< 0x0040296a bf01000000 mov edi, 1 +| `---> 0x0040296a bf01000000 mov edi, 0x01 | || 0x0040296f e80cf9ffff call sym.imp.isatty EOF RUN @@ -1824,8 +1822,8 @@ pd 1 @ 0x161d pd 1 @ 0x1447 EOF EXPECT=<+<<' - 0x000009a9 mov word [rbp - 0x2c], 0x3e5d ; ']>' - 0x000009b3 movabs rax, 0x3c2b3c3c5b3e3e3e ; '>>>[<<+<' + 0x000009a2 mov dword [rbp-0x30], 0x3c3c2b3e ; '>+<<' + 0x000009a9 mov word [rbp-0x2c], 0x3e5d ; ']>' + 0x000009b3 mov rax, 0x3c2b3c3c5b3e3e3e ; '>>>[<<+<' EOF RUN @@ -2122,9 +2120,9 @@ pdJ 1 @ 0x9b3 EOF EXPECT=<>>[<<+<' - 0x000009b3 48b83e3e3e5b. movabs rax, 0x3c2b3c3c5b3e3e3e + 0x000009b3 48b83e3e3e5b. mov rax, 0x3c2b3c3c5b3e3e3e -[{"offset":2483,"text":" ; '>>>[<<+<'"},{"offset":2483,"text":" 0x000009b3 48b83e3e3e5b. movabs rax, 0x3c2b3c3c5b3e3e3e"}] +[{"offset":2483,"text":" ; '>>>[<<+<'"},{"offset":2483,"text":" 0x000009b3 48b83e3e3e5b. mov rax, 0x3c2b3c3c5b3e3e3e"}] EOF RUN @@ -2167,7 +2165,7 @@ pd 1 @ 0xe78 EOF EXPECT=<dH\x8b\x04%(" +| 0x00005af3 4c8d05660c01. lea r8, qword [0x16760] +| 0x00005afa 488d0def0b01. lea rcx, qword [0x166f0] +| 0x00005b01 488d3d68e5ff. lea rdi, qword [main] ; 0x4070 ; "AWAVAUATU\x89\xfdSH\x89\xf3H\x83\xecXH\x8b>dH\x8b\x04%(" \ 0x00005b08 ff150ac30100 call qword [reloc.__libc_start_main] ; [reloc.__libc_start_main:8]=0x23708 reloc.target.__libc_start_main EOF RUN @@ -2227,9 +2225,9 @@ call 0x401836 jmp 0x401322 push ebp mov ebp, esp -push 0 +push 0x00 call dword [SetUnhandledExceptionFilter] -push dword [ebp + 8] +push dword [ebp+0x08] call dword [UnhandledExceptionFilter] push 0xc0000409 call dword [GetCurrentProcess] @@ -2294,7 +2292,7 @@ aaa pdf @ 0x08048484~:1 EOF EXPECT=< 0x8d4890f4 ; likely - ,==< 0x00005b04 7f08 jg 0x5b0e ; rip=0x5b0e -> 0x8d4890f4 ; likely + ,=< 0x00005b02 7d0a jnl 0x5b0e ; rip=0x5b0e -> 0x8d4890f4 ; likely + ,==< 0x00005b04 7f08 jnle 0x5b0e ; rip=0x5b0e -> 0x8d4890f4 ; likely ,===< 0x00005b06 eb00 jmp 0x5b08 ; rip=0x5b08 -> 0xc30a15ff `---> 0x00005b08 ff150ac30100 call qword [reloc.__libc_start_main] ; [reloc.__libc_start_main:8]=0x23708 reloc.target.__libc_start_main ; rsp=0xfffffffffffffff8 ; rip=0x23708 -> 0x464c457f reloc.target.__libc_start_main EOF @@ -360,8 +360,8 @@ e asm.cmt.right=false pd 1 EOF EXPECT=< 0x0804859e je 0x80485b3 + ,=< 0x08048598 jnle 0x804859e + | 0x0804859a cmp al, byte [esp+0x27] + ,`-> 0x0804859e jz 0x80485b3 | 0x080485a0 mov dword [esp], str.Wrong | 0x080485a7 call sym.imp.puts - | 0x080485ac mov eax, 1 + | 0x080485ac mov eax, 0x01 ,=.-> 0x080485b1 jmp 0x80485f9 - |`--> 0x080485b3 add dword [esp + 0x20], 1 - | : 0x080485b8 mov ebx, dword [esp + 0x20] - | `=< 0x080485bc jne 0x80485b1 + |`--> 0x080485b3 add dword [esp+0x20], 0x01 + | : 0x080485b8 mov ebx, dword [esp+0x20] + | `=< 0x080485bc jnz 0x80485b1 | 0x080485be nop EOF RUN @@ -454,17 +454,17 @@ echo pdJ 9~{} EOF EXPECT=< 0x00004238 je 0x4243 +| ,`-> 0x00004238 jz 0x4243 | | | -| | 0x0000423a cmp byte [rax], 0 +| | 0x0000423a cmp byte [rax], 0x00 | | | -| ,=.-> 0x0000423d jne 0x4b1c +| ,=.-> 0x0000423d jnz 0x4b1c | ||: | -| |`--> 0x00004243 lea r12, [var_58h] +| |`--> 0x00004243 lea r12, qword [arg_58h] | | : 0x00004248 xor eax, eax | | `=< 0x0000424a jb 0x423d | | | @@ -474,7 +474,7 @@ EXPECT=< 0x00004238 je 0x4243" + "text": "| ,`-> 0x00004238 jz 0x4243" }, { "offset": 16954, @@ -500,7 +500,7 @@ EXPECT=< 0x0000423d jne 0x4b1c" + "text": "| ,=.-> 0x0000423d jnz 0x4b1c" }, { "offset": 16963, @@ -518,7 +518,7 @@ EXPECT=< 0x00004243 lea r12, [var_58h]" + "text": "| |`--> 0x00004243 lea r12, qword [arg_58h]" }, { "offset": 16968, @@ -589,26 +589,25 @@ wx 483b3df6470100 @ 0x00004225 # cmp rdi, [rip + 0x147f6] .(insn_tests) EOF EXPECT=< 0x0000421a mov qword [0x000232b0], 0x50 ; 'P' + |`-> 0x0000421a mov qword [0x232b0], 0x50 ; 'P' | ; [0x232b0:8]=0 - | 0x00004225 lea rdi, str.COLUMNS ; 0x18a22 ; "COLUMNS" + | 0x00004225 lea rdi, qword str.COLUMNS ; 0x18a22 ; "COLUMNS" - 0x000041ee lea rsi, [rip + 0x1d84b] ; 0x21a40 - 0x00004225 lea rdi, [rip + 0x147f6] ; str.COLUMNS - ; 0x18a22 ; "COLUMNS" + 0x000041ee lea rsi, qword [0x21a40] + 0x00004225 lea rdi, qword [str.COLUMNS] ; 0x18a22 ; "COLUMNS" ,=< 0x000041e0 je 0x421a | 0x000041e2 mov ecx, 4 @@ -741,21 +740,21 @@ s 0x000041e0 pi 15 EOF EXPECT=< 0x0000104d ebfe jmp 0x104d .. | `-> 0x00001050 31c0 xor eax, eax @@ -921,12 +920,12 @@ e scr.utf8.curvy=1 pd 4 @ 0x104b EOF EXPECT=< 0x0000104d jmp 0x104d │ 0x0000104f nop │ └─> 0x00001050 xor eax, eax -│ ╭─< 0x0000104b je 0x1050 +│ ╭─< 0x0000104b jz 0x1050 │ @──> 0x0000104d jmp 0x104d │ 0x0000104f nop │ ╰─> 0x00001050 xor eax, eax diff --git a/test/db/cmd/cmd_pd_bugs b/test/db/cmd/cmd_pd_bugs index 6feaf766d18..19fe85166ab 100644 --- a/test/db/cmd/cmd_pd_bugs +++ b/test/db/cmd/cmd_pd_bugs @@ -123,7 +123,7 @@ e asm.comments=false pD 6@x:8d15d0830408 EOF EXPECT=< 3110 fcn.1000002e0 0x100000ef0 4 65 sym._bar 0x100000f40 1 45 sym._foo @@ -128,7 +128,7 @@ Shared buffer size 0x10e8 | 0x100000f70 push rbp | 0x100000f71 mov rbp, rsp | 0x100000f74 sub rsp, 0x10 -| 0x100000f78 mov dword [var_ch], 0 +| 0x100000f78 mov dword [var_ch], 0x00 | 0x100000f7f mov dword [var_10h], edi ; arg1 | 0x100000f82 mov qword [var_18h], rsi ; arg2 | 0x100000f86 mov edi, dword [var_10h] ; int64_t arg1 diff --git a/test/db/cmd/cmd_pix b/test/db/cmd/cmd_pix index 3b6cf18e2f3..62b83b2556d 100644 --- a/test/db/cmd/cmd_pix +++ b/test/db/cmd/cmd_pix @@ -37,7 +37,7 @@ push 0x64777373 push 0x61702f2f push 0x6374652f mov ecx, esp -mov al, 0xb +mov al, 0x0b push edx push ecx push ebx diff --git a/test/db/cmd/cmd_print b/test/db/cmd/cmd_print index 96815d41573..0188898affc 100644 --- a/test/db/cmd/cmd_print +++ b/test/db/cmd/cmd_print @@ -280,9 +280,9 @@ wx b8010000004839ca7f pi 3 EOF EXPECT=< 0x0040121c leave \ 0x0040121d ret @@ -473,26 +473,26 @@ EXPECT=< 0x0040121c leave \ 0x0040121d ret diff --git a/test/db/cmd/describe b/test/db/cmd/describe index dfdd1f39a04..ae75090c2bd 100644 --- a/test/db/cmd/describe +++ b/test/db/cmd/describe @@ -10,7 +10,7 @@ e asm.describe=true pd 1 EOF EXPECT=< 0x004005fe 4883c408 add rsp, 8 + `-> 0x004005fe 4883c408 add rsp, 0x08 EOF RUN diff --git a/test/db/cmd/lea_intel b/test/db/cmd/lea_intel index f858f5a52fa..ea4b2aec63d 100644 --- a/test/db/cmd/lea_intel +++ b/test/db/cmd/lea_intel @@ -8,35 +8,35 @@ s 0x00402c43 pd 30 EOF EXPECT=< 0x00560e7d pop esi | 0x00560e7e push eax | 0x00560e7f push edx @@ -30,26 +30,26 @@ EXPECT=< 0x00560e96 rdtsc | | 0x00560e98 jmp 0x560eb1 | 0x00560e9d test al, 0x36 - | 0x00560e9f fcom qword [edx + 0x64] - | 0x00560ea2 xlatb + | 0x00560e9f fcom qword [edx+0x64] + | 0x00560ea2 xlat | 0x00560ea3 push 0x27 | 0x00560ea5 sub esp, edx | 0x00560ea7 mov eax, dword [0xe8c1cf5d] |,=< 0x00560eac jle 0x560f29 || 0x00560eae inc ecx - || 0x00560eaf ~ mov byte [eax + 0x5a], dl + || 0x00560eaf ~ mov byte [eax+0x5a], dl | || 0x00560eb1 pop edx | || 0x00560eb2 pop eax -/ fcn.00560e67(int32_t arg_4h, int32_t arg_7fbf5070h); +/ fcn.00560e67(int32_t arg_4h, int32_t arg_8h, int32_t arg_ch, int32_t arg_10h, int32_t arg_14h, int32_t arg_18h, int32_t arg_1ch, int32_t arg_28h, int32_t arg_7fbf50c8h); | 0x00560e67 push esi | ,=< 0x00560e68 jmp 0x560e7d | 0x00560e6d push ecx @@ -58,25 +58,25 @@ EXPECT=< 0x0040057e bf20064000 mov edi, str.hello ; 0x400620 ; "hello" | 0x00400583 e8a8feffff call sym.imp.puts ; int puts(const char *s) -| 0x00400588 b800000000 mov eax, 0 +| 0x00400588 b800000000 mov eax, 0x00 | 0x0040058d c9 leave \ 0x0040058e c3 ret EOF diff --git a/test/db/cmd/print_bug b/test/db/cmd/print_bug index 121860fcf1c..12cc7042bfe 100644 --- a/test/db/cmd/print_bug +++ b/test/db/cmd/print_bug @@ -10,8 +10,8 @@ pi 1 pdq 1 EOF EXPECT=< /dev/null pdq 1 EOF EXPECT=< 0x000006ee c9 leave ; Books.title[0] EOF RUN @@ -1288,9 +1289,9 @@ s 0x000005a8 pd 3 EOF EXPECT=<>,rdx,=,r9,rax,*=,64,64,rax,~,>>,rdx,-,?{,1,1,}{,0,0,},cf,:=,of,:= +0x00000000 64,rdx,~,64,rax,~,*,DUP,r9,=,r9,-,?{,1,1,}{,0,0,},cf,:=,of,:= EOF RUN @@ -22,7 +22,7 @@ e asm.bits=64 EOF EXPECT=<mIkDN{82po!+?c}fgv#|nZbae)u^4D0T}Br007gr7)k&D literal 0 HcmV?d00001