From 70b750aadaa70c4f12018df67d31ae790c0feda1 Mon Sep 17 00:00:00 2001
From: Michael Rogenmoser <michael@rogenmoser.us>
Date: Thu, 8 Aug 2024 11:30:31 +0200
Subject: [PATCH] Add vsim bare test to CI

---
 Makefile                              | 3 +++
 test/axi_memory_island_tb.sv          | 2 +-
 test/synth/axi_memory_island_synth.sv | 2 +-
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 5dff3cd..c248a01 100644
--- a/Makefile
+++ b/Makefile
@@ -19,6 +19,9 @@ test-vsim: scripts/compile.tcl
 	$(VSIM) -64 -c -do "quit -code [source scripts/compile.tcl]"
 	$(VSIM) -64 -do "vsim axi_memory_island_tb -voptargs=+acc; do scripts/debug_wave.do"
 
+test-vsim-bare: scripts/compile.tcl
+	$(VSIM) -64 -c -do "quit -code [source scripts/compile.tcl]"
+	$(VSIM) -64 -c -do "vsim axi_memory_island_tb; run -all"
 
 ## Internal CI
 NONFREE_REMOTE ?= git@iis-git.ee.ethz.ch:pulp-restricted/memory_island_nonfree.git
diff --git a/test/axi_memory_island_tb.sv b/test/axi_memory_island_tb.sv
index 99fe8ad..30335a5 100644
--- a/test/axi_memory_island_tb.sv
+++ b/test/axi_memory_island_tb.sv
@@ -696,7 +696,7 @@ module axi_memory_island_tb #(
       errors += $countones(mismatch);
       if (end_of_sim == '1) begin
         $display("Counted %d errors.", errors);
-        $stop();
+        $finish(errors);
       end
       @(posedge clk);
     end while (1'b1);
diff --git a/test/synth/axi_memory_island_synth.sv b/test/synth/axi_memory_island_synth.sv
index 612e7cd..3762758 100644
--- a/test/synth/axi_memory_island_synth.sv
+++ b/test/synth/axi_memory_island_synth.sv
@@ -290,7 +290,7 @@ module axi_memory_island_synth #(
     .SpillWideRspRouted  (0),
     .SpillWideReqSplit   (0),
     .SpillWideRspSplit   (0),
-    .SpillReqBank        (0),
+    .SpillReqBank        (1),
     .SpillRspBank        (1),
     .WidePriorityWait    (2)
   ) i_mem_island (