diff --git a/Bender.yml b/Bender.yml index 4f4914d90..f0ffdc11c 100644 --- a/Bender.yml +++ b/Bender.yml @@ -5,6 +5,7 @@ package: - "Thomas Benz " # current maintainer - "Michael Rogenmoser " # current maintainer - "Matheus Cavalcante " + - "Tim Fischer " - "Noah Huetter " - "Andreas Kurth " - "Stefan Mach " @@ -12,6 +13,7 @@ package: - "Wolfgang Rönninger " - "Fabian Schuiki " - "Luca Valente " + - "Nils Wistoff " - "Florian Zaruba " dependencies: diff --git a/CHANGELOG.md b/CHANGELOG.md index 518a0a23f..bd9d4a63a 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -17,6 +17,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0. ### Changed - Improve compatibility with FuseSoC - Improve compatibility with Vivado XSIM +- Use `scripts/update_authors` to update authors, slight manual fixes performed. ### Fixed diff --git a/include/axi/assign.svh b/include/axi/assign.svh index a4ade2387..80667eb09 100644 --- a/include/axi/assign.svh +++ b/include/axi/assign.svh @@ -11,6 +11,7 @@ // // Authors: // - Andreas Kurth +// - Nils Wistoff // Macros to assign AXI Interfaces and Structs diff --git a/scripts/update_authors b/scripts/update_authors index 5e099b0b5..674bad51b 100755 --- a/scripts/update_authors +++ b/scripts/update_authors @@ -29,6 +29,8 @@ declare -A emails=( \ ["Michael Rogenmoser"]="michaero@iis.ee.ethz.ch" \ ["Luca Valente"]="luca.valente@unibo.it" \ ["Noah Huetter"]="huettern@ethz.ch" \ + ["Nils Wistoff"]="nwistoff@iis.ee.ethz.ch" \ + ["Tim Fischer"]="fischeti@iis.ee.ethz.ch" \ ) # Iterate over source files (see `done` line for which files are included). diff --git a/src/axi_to_mem_banked.sv b/src/axi_to_mem_banked.sv index 1de2513c5..81998277f 100644 --- a/src/axi_to_mem_banked.sv +++ b/src/axi_to_mem_banked.sv @@ -9,8 +9,8 @@ // specific language governing permissions and limitations under the License. // Authors: -// - Michael Rogenmoser // - Wolfgang Rönninger +// - Michael Rogenmoser /// AXI4+ATOP to banked SRAM memory slave. Allows for parallel read and write transactions. /// Has higher throughput than `axi_to_mem`, however needs more hardware. diff --git a/src/axi_to_mem_interleaved.sv b/src/axi_to_mem_interleaved.sv index 68930be1b..f306612e0 100644 --- a/src/axi_to_mem_interleaved.sv +++ b/src/axi_to_mem_interleaved.sv @@ -9,7 +9,8 @@ // specific language governing permissions and limitations under the License. // Authors: -// Thomas Benz +// - Wolfgang Roenninger +// - Thomas Benz // - Michael Rogenmoser /// AXI4+ATOP to SRAM memory slave. Allows for parallel read and write transactions. diff --git a/src/axi_xp.sv b/src/axi_xp.sv index 9d133e006..5ccbfb9ff 100644 --- a/src/axi_xp.sv +++ b/src/axi_xp.sv @@ -10,6 +10,7 @@ // specific language governing permissions and limitations under the License. // // Authors: +// - Tim Fischer // - Andreas Kurth // - Vikram Jain @@ -252,4 +253,4 @@ import cf_math_pkg::idx_width; .addr_map_i ); -endmodule \ No newline at end of file +endmodule diff --git a/test/tb_axi_to_mem_banked.sv b/test/tb_axi_to_mem_banked.sv index 0b4302e43..64667998d 100644 --- a/test/tb_axi_to_mem_banked.sv +++ b/test/tb_axi_to_mem_banked.sv @@ -9,8 +9,8 @@ // specific language governing permissions and limitations under the License. // Authors: -// - Michael Rogenmoser // - Wolfgang Roenninger +// - Michael Rogenmoser `include "axi/typedef.svh" `include "axi/assign.svh"