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Support GPIO pins on Jetson Orin boards #26
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If it helps, Nvidia themselves have published a very similar Python library at https://github.com/NVIDIA/jetson-gpio, and perhaps we could take inspiration from that to adapt support for Go as well. I haven't looked at enough details to see how Nvidia's version differs from Periph's version (aside from being written in a different language). |
Thanks for the report. That's really interesting. Can you confirm which kernel version you are running and from which distro it is based from? You can check out via |
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I'd love to have a way to gather the exported names, but I've looked around in a handful of places within Instead, I've got this PDF, pages 38-39, which says what the symlinks will be named in the "SoC GPIO Port #" column of that table. but to be even more complete, I looked for every pin I could find on the machine:
and then tried exporting them all to see what all their names are:
|
You also wanted the kernel version:
|
The best would be to search for the linux kernel driver source that generate these. When exploring Searching for The gpio pin number calculation seems to be of a similar type than what allwinner does. You can check the calculation in periph's driver. |
Your second link doesn't work for me, even if I'm logged into my Nvidia account. What does it describe? Your first link seems like an excellent way to map a (bank, pin) pair to an index, but I think we're looking for the inverse mapping (from an index like 466 back to a bank/pin like |
This link should work: https://developer.nvidia.com/downloads/adaptation-and-bringup-jetson-agx-orinpdf And yes, we want the reverse mapping. |
I've made #27 to fix this. and it works, but I suspect there should have been a more elegant approach. I'm willing to some more cleanup/refactoring/reorganizing if it would help get this merged, but I'm also perfectly happy for it not to be merged at all, and I can just continue on my fork. 🤷 |
What kind of new feature are you looking for?
Do you plan to:
Description of the problem
For most sysfs systems, you can enable a GPIO pin by writing a number into
/sys/class/gpio/export
, at which point you get a new symlink named/sys/class/gpio/gpioN
(whereN
is the number you wrote). This is so universally common that it's hard-coded into this repo, at https://github.com/periph/host/blob/main/sysfs/gpio.go#L493.Unfortunately, the Jetson Orin (at least, the AGX model, not sure about the others) doesn't name their symlinks
gpioN
. For example, if youcd /sys/class/gpio; echo "336" > export
, instead of getting a symlink namedgpio336
, you get one namedPDD.00
. However, the gpio.go file in this repo hardcodes that the symlink should always be atgpio336
(or another number), and then we get "file not found"/"pin not exported" errors later if we try to use any of the GPIO pins.To support the Jetson Orin AGX (and possibly other boards in the Jetson Orin family, though I haven't tried any of them yet), please make this configurable. The line that needs to change is https://github.com/periph/host/blob/main/sysfs/gpio.go#L493, though various other things probably need to change along with it (maybe the pin definitions need a new field? but that sounds like a lot of work, and hopefully there's an easier approach I haven't thought of).
I'd be happy to help brainstorm ideas of what to do, if that would help. I'm on the fence for whether I'm also willing to make the changes myself, but I'm not a flat-out "no" on that end.
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