From e0ee4828b6cf0be74274682262b24e1c31dea183 Mon Sep 17 00:00:00 2001 From: Amaury Pouly Date: Thu, 9 Jan 2025 15:01:22 +0100 Subject: [PATCH] [topgen] Add class to load a complete topcfg properly At the moment, topgen simplies serializes the complete topcfg using hjson.dumps() but this poses a few problems. The biggest one is that it is a mix of manual conversion to dict (when calling as_dict() in the various topgen functions) and automatic (when calling _asdict() from hjson.dumps). Furthermore, it turns out that we are missing some fields that probably were never added to _asdict(). This commit introduces a new class (CompleteTopCfg) whose sole purpose is to take the produced Hjson and reconstruct an in-memory topcfg that is *exactly* equivalent (in Pythonic types) to the ones that was dumped. This requires to sometimes reconstruct some classes, sometimes not. Classes that need to be reconstruct get a new method (fromdict) and the CompleteTopCfg does as much automatic deserializing as possible, then some manual fixing. Since this process is quite fragile, when topgen is running it will actually check that this works by dumping the Hjson, reloading it with the CompleteTopCfg and then checking that the two are equivalent. Signed-off-by: Amaury Pouly --- .../data/autogen/top_darjeeling.gen.hjson | 1212 +++++++++++++++-- .../data/autogen/top_earlgrey.gen.hjson | 1015 ++++++++++++-- util/reggen/inter_signal.py | 13 + util/reggen/params.py | 37 + util/topgen.py | 14 + util/topgen/clocks.py | 56 + util/topgen/merge.py | 2 +- util/topgen/resets.py | 37 + util/topgen/validate.py | 13 + 9 files changed, 2168 insertions(+), 231 deletions(-) diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson index 3da1da8620097f..accb5d6dae73fd 100644 --- a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson +++ b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson @@ -615,6 +615,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart0 default: "" package: "" @@ -630,6 +631,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart0 default: "" end_idx: -1 @@ -707,6 +709,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: gpio package: "" top_signame: pwrmgr_aon_strap @@ -721,6 +724,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: gpio index: -1 } @@ -731,6 +735,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: gpio default: "" end_idx: -1 @@ -799,6 +804,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -813,6 +819,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -827,6 +834,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -841,6 +849,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -855,6 +864,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -867,6 +877,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -876,6 +887,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" package: "" @@ -891,6 +903,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -958,6 +971,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c0 index: -1 } @@ -968,6 +982,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 default: "" external: true @@ -986,6 +1001,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 default: "" package: "" @@ -1001,6 +1017,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c0 default: "" end_idx: -1 @@ -1052,6 +1069,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_timer default: "" end_idx: -1 @@ -1163,6 +1181,7 @@ act: none width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl package: "" external: true @@ -1179,6 +1198,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq @@ -1194,6 +1214,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq_h @@ -1208,6 +1229,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: edn0_edn @@ -1222,6 +1244,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: pwrmgr_aon_pwr_otp index: -1 @@ -1235,6 +1258,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_vendor_test index: -1 @@ -1248,6 +1272,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_program index: -1 @@ -1265,6 +1290,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -1284,6 +1310,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -1301,6 +1328,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_creator_seed_sw_rw_en index: -1 @@ -1318,6 +1346,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_owner_seed_sw_rw_en index: -1 @@ -1335,6 +1364,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_seed_hw_rd_en index: -1 @@ -1352,6 +1382,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_dft_en index: -1 @@ -1369,6 +1400,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -1382,6 +1414,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -1397,6 +1430,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl index: -1 } @@ -1409,6 +1443,7 @@ act: rsp width: 4 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: one-to-N @@ -1424,6 +1459,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_signame: otp_ctrl_otbn_otp_key @@ -1438,6 +1474,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: otp_ctrl_otp_broadcast index: -1 @@ -1450,6 +1487,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: ast_obs_ctrl @@ -1462,6 +1500,7 @@ type: uni act: req width: 8 + class: InterSignal inst_name: otp_ctrl default: "" package: "" @@ -1477,6 +1516,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -1490,6 +1530,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -1696,6 +1737,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -1706,6 +1748,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -1718,6 +1761,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -1730,6 +1774,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -1742,6 +1787,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -1754,6 +1800,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: pwrmgr_aon_pwr_lc @@ -1767,6 +1814,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_vendor_test @@ -1780,6 +1828,7 @@ act: rcv width: 1 default: otp_ctrl_pkg::OTP_LC_DATA_DEFAULT + class: InterSignal inst_name: lc_ctrl top_signame: otp_ctrl_otp_lc_data index: -1 @@ -1792,6 +1841,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_program @@ -1805,6 +1855,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: kmac_app index: 1 @@ -1817,6 +1868,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1831,6 +1883,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1845,6 +1898,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -1856,6 +1910,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1870,6 +1925,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1884,6 +1940,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1898,6 +1955,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1912,6 +1970,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1926,6 +1985,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1940,6 +2000,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1954,6 +2015,7 @@ act: rcv width: 2 default: lc_ctrl_pkg::On + class: InterSignal inst_name: lc_ctrl top_signame: otbn_lc_rma_ack index: -1 @@ -1966,6 +2028,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -1977,6 +2040,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -1991,6 +2055,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2005,6 +2070,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2019,6 +2085,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -2030,6 +2097,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -2041,6 +2109,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2055,6 +2124,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2069,6 +2139,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_device_id index: -1 @@ -2081,6 +2152,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_manuf_state index: -1 @@ -2093,6 +2165,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -2110,6 +2183,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: lc_ctrl package: "" end_idx: -1 @@ -2124,6 +2198,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" end_idx: -1 @@ -2137,6 +2212,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" end_idx: -1 @@ -2212,6 +2288,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2226,6 +2303,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" top_signame: edn0_edn @@ -2238,6 +2316,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2252,6 +2331,7 @@ type: uni act: req width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2266,6 +2346,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2317,6 +2398,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" top_signame: spi_device_passthrough @@ -2333,6 +2415,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_host0 default: "" package: "" @@ -2348,6 +2431,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" end_idx: -1 @@ -2431,6 +2515,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2447,6 +2532,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" external: true @@ -2461,6 +2547,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2474,6 +2561,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2487,6 +2575,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2500,6 +2589,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2513,6 +2603,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon index: -1 } @@ -2523,6 +2614,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_tx @@ -2535,6 +2627,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_rx @@ -2547,6 +2640,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rv_core_ibex_pwrmgr @@ -2558,6 +2652,7 @@ type: uni act: rcv width: 5 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -2572,6 +2667,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -2586,6 +2682,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -2598,6 +2695,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -2612,6 +2710,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -2628,6 +2727,7 @@ act: rcv width: 3 default: rom_ctrl_pkg::PWRMGR_DATA_DEFAULT + class: InterSignal inst_name: pwrmgr_aon end_idx: -1 top_type: one-to-N @@ -2641,6 +2741,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2655,6 +2756,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_dft_en @@ -2667,6 +2769,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -2679,6 +2782,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rstmgr_aon_sw_rst_req @@ -2691,6 +2795,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -2796,6 +2901,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: rstmgr_aon default: "" package: "" @@ -2815,6 +2921,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" package: pwrmgr_pkg @@ -2829,6 +2936,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_resets @@ -2842,6 +2950,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_rst_en @@ -2855,6 +2964,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: alert_handler_crashdump @@ -2868,6 +2978,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rv_core_ibex_crash_dump @@ -2881,6 +2992,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -2895,6 +3007,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -3031,6 +3144,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_clocks @@ -3043,6 +3157,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_cg_en @@ -3055,6 +3170,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -3067,6 +3183,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3081,6 +3198,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3095,6 +3213,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3109,6 +3228,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3123,6 +3243,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3137,6 +3258,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3151,6 +3273,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_req @@ -3163,6 +3286,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_ack @@ -3175,6 +3299,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3188,6 +3313,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" package: pwrmgr_pkg @@ -3201,6 +3327,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -3217,6 +3344,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: clkmgr_aon external: true top_signame: calib_rdy @@ -3230,6 +3358,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -3307,6 +3436,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_low_power @@ -3320,6 +3450,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -3332,6 +3463,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -3390,6 +3522,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" end_idx: -1 @@ -3404,6 +3537,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -3416,6 +3550,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_rstreqs @@ -3429,6 +3564,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aon_timer_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -3439,6 +3575,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" package: "" @@ -3452,6 +3589,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" end_idx: -1 @@ -3564,6 +3702,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: ast index: -1 } @@ -3620,6 +3759,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" external: true @@ -3634,6 +3774,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" external: true @@ -3649,6 +3790,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: sensor_ctrl external: true top_signame: ast_init_done @@ -3661,6 +3803,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" package: "" @@ -3674,6 +3817,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" end_idx: -1 @@ -3756,6 +3900,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3768,6 +3913,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3780,6 +3926,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3794,6 +3941,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -3809,6 +3957,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -3823,6 +3972,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3836,6 +3986,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3849,6 +4000,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3862,6 +4014,7 @@ type: uni act: rcv width: 8 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3878,6 +4031,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" top_signame: dma_lsio_trigger @@ -3891,6 +4045,7 @@ type: req_rsp act: rsp width: 24 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -3906,6 +4061,7 @@ type: req_rsp act: rsp width: 4 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -3920,6 +4076,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3935,6 +4092,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3950,6 +4108,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3965,6 +4124,7 @@ type: uni act: req width: 16 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3980,6 +4140,7 @@ type: uni act: rcv width: 16 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -3995,6 +4156,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_proxy default: "" end_idx: -1 @@ -4008,6 +4170,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_proxy default: "" end_idx: -1 @@ -4171,6 +4334,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" top_signame: otp_ctrl_sram_otp_key @@ -4186,14 +4350,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon external: true top_signame: sram_ctrl_ret_aon_ram_1p_cfg @@ -4210,14 +4375,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon external: true top_signame: sram_ctrl_ret_aon_ram_1p_cfg_rsp @@ -4232,6 +4398,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -4244,6 +4411,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -4255,6 +4423,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -4265,6 +4434,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -4278,6 +4448,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -4392,6 +4563,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: rv_dm external: true top_signame: rv_dm_next_dm_addr @@ -4406,6 +4578,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -4422,6 +4595,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -4439,6 +4613,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -4457,6 +4632,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -4468,6 +4644,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: rv_dm index: -1 } @@ -4483,6 +4660,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -4493,6 +4671,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -4512,6 +4691,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -4522,6 +4702,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -4543,6 +4724,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -4563,6 +4745,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -4575,6 +4758,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm package: "" top_signame: pwrmgr_aon_strap @@ -4594,6 +4778,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm package: "" top_signame: lc_ctrl_strap_en_override @@ -4606,6 +4791,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" top_signame: main_tl_rv_dm__sba @@ -4618,6 +4804,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -4631,6 +4818,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -4644,6 +4832,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -4687,6 +4876,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -4701,6 +4891,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic index: -1 } @@ -4710,6 +4901,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -4725,6 +4917,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_plic default: "" end_idx: -1 @@ -4912,6 +5105,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: clkmgr_aon_idle @@ -4925,6 +5119,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aes top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -4936,6 +5131,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: edn0_edn @@ -4948,6 +5144,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aes default: "" top_signame: keymgr_dpe_aes_key @@ -4960,6 +5157,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aes default: "" end_idx: -1 @@ -5011,6 +5209,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: hmac default: "" top_signame: clkmgr_aon_idle @@ -5023,6 +5222,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: hmac default: "" end_idx: -1 @@ -5217,6 +5417,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: keymgr_dpe_kmac_key @@ -5232,13 +5433,14 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -5253,6 +5455,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: edn0_edn @@ -5265,6 +5468,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: clkmgr_aon_idle @@ -5276,6 +5480,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" package: "" @@ -5292,6 +5497,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: kmac top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -5303,6 +5509,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -5460,6 +5667,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otbn top_signame: otp_ctrl_otbn_otp_key index: -1 @@ -5471,6 +5679,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn1_edn @@ -5483,6 +5692,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn0_edn @@ -5495,6 +5705,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: clkmgr_aon_idle @@ -5507,6 +5718,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -5521,6 +5733,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -5535,6 +5748,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -5549,6 +5763,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -5564,6 +5779,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -5576,6 +5792,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_flash_rma_req index: -1 @@ -5588,6 +5805,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn end_idx: -1 top_type: broadcast @@ -5601,6 +5819,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: keymgr_dpe_otbn_key @@ -5613,6 +5832,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otbn default: "" end_idx: -1 @@ -5783,6 +6003,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: edn0_edn @@ -5795,6 +6016,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -5809,6 +6031,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -5823,6 +6046,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -5837,6 +6061,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: kmac_app @@ -5849,6 +6074,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: otp_ctrl_otp_keymgr_key @@ -5861,6 +6087,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: keymgr_dpe_otp_device_id @@ -5874,6 +6101,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::On + class: InterSignal inst_name: keymgr_dpe top_signame: lc_ctrl_lc_keymgr_en index: -1 @@ -5885,6 +6113,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: lc_ctrl_lc_keymgr_div @@ -5898,6 +6127,7 @@ act: rcv width: 2 default: rom_ctrl_pkg::KEYMGR_DATA_DEFAULT + class: InterSignal inst_name: keymgr_dpe end_idx: -1 top_type: one-to-N @@ -5910,6 +6140,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" package: "" @@ -5923,6 +6154,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -6006,6 +6238,7 @@ type: req_rsp act: rsp width: 2 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -6020,6 +6253,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: csrng default: "" external: true @@ -6039,6 +6273,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng index: -1 } @@ -6050,6 +6285,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: csrng index: -1 } @@ -6061,6 +6297,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: csrng top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -6072,6 +6309,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -6124,6 +6362,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn0 default: "" top_signame: csrng_csrng_cmd @@ -6145,6 +6384,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn0 end_idx: -1 top_type: one-to-N @@ -6158,6 +6398,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn0 default: "" end_idx: -1 @@ -6210,6 +6451,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn1 default: "" top_signame: csrng_csrng_cmd @@ -6231,6 +6473,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn1 end_idx: 1 top_type: partial-one-to-N @@ -6244,6 +6487,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn1 default: "" end_idx: -1 @@ -6414,6 +6658,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" top_signame: otp_ctrl_sram_otp_key @@ -6429,14 +6674,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main external: true top_signame: sram_ctrl_main_ram_1p_cfg @@ -6453,14 +6699,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main external: true top_signame: sram_ctrl_main_ram_1p_cfg_rsp @@ -6475,6 +6722,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -6487,6 +6735,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -6499,6 +6748,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_main top_signame: sram_ctrl_main_otp_en_sram_ifetch index: -1 @@ -6510,6 +6760,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -6523,6 +6774,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -6686,6 +6938,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_mbox default: "" top_signame: otp_ctrl_sram_otp_key @@ -6701,14 +6954,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMboxNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_mbox external: true top_signame: sram_ctrl_mbox_ram_1p_cfg @@ -6725,14 +6979,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMboxNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_mbox external: true top_signame: sram_ctrl_mbox_ram_1p_cfg_rsp @@ -6747,6 +7002,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_mbox top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -6759,6 +7015,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_mbox index: -1 } @@ -6770,6 +7027,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_mbox index: -1 } @@ -6780,6 +7038,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_mbox default: "" end_idx: -1 @@ -6793,6 +7052,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_mbox default: "" end_idx: -1 @@ -6916,6 +7176,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: ast_rom_cfg @@ -6928,6 +7189,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: pwrmgr_aon_rom_ctrl @@ -6940,6 +7202,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: keymgr_dpe_rom_digest @@ -6952,6 +7215,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: kmac_app @@ -6964,6 +7228,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" end_idx: -1 @@ -6977,6 +7242,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" end_idx: -1 @@ -7100,6 +7366,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: ast_rom_cfg @@ -7112,6 +7379,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: pwrmgr_aon_rom_ctrl @@ -7124,6 +7392,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: keymgr_dpe_rom_digest @@ -7136,6 +7405,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: kmac_app @@ -7148,6 +7418,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" end_idx: -1 @@ -7161,6 +7432,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" end_idx: -1 @@ -7253,6 +7525,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: dma default: "" end_idx: -1 @@ -7267,6 +7540,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dma default: "" external: true @@ -7282,6 +7556,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: dma default: "" external: true @@ -7297,6 +7572,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: dma default: "" external: true @@ -7311,6 +7587,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dma default: "" top_signame: main_tl_dma__host @@ -7323,6 +7600,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: dma default: "" end_idx: -1 @@ -7385,6 +7663,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -7399,6 +7678,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -7413,6 +7693,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -7427,6 +7708,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -7441,6 +7723,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx0 default: "" top_signame: main_tl_mbx0__sram @@ -7453,6 +7736,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx0 default: "" end_idx: -1 @@ -7466,6 +7750,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx0 default: "" end_idx: -1 @@ -7521,6 +7806,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -7535,6 +7821,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -7549,6 +7836,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -7563,6 +7851,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -7577,6 +7866,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx1 default: "" top_signame: main_tl_mbx1__sram @@ -7589,6 +7879,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx1 default: "" end_idx: -1 @@ -7602,6 +7893,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx1 default: "" end_idx: -1 @@ -7657,6 +7949,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -7671,6 +7964,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -7685,6 +7979,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -7699,6 +7994,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -7713,6 +8009,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx2 default: "" top_signame: main_tl_mbx2__sram @@ -7725,6 +8022,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx2 default: "" end_idx: -1 @@ -7738,6 +8036,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx2 default: "" end_idx: -1 @@ -7793,6 +8092,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -7807,6 +8107,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -7821,6 +8122,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -7835,6 +8137,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -7849,6 +8152,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx3 default: "" top_signame: main_tl_mbx3__sram @@ -7861,6 +8165,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx3 default: "" end_idx: -1 @@ -7874,6 +8179,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx3 default: "" end_idx: -1 @@ -7929,6 +8235,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -7943,6 +8250,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -7957,6 +8265,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -7971,6 +8280,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -7985,6 +8295,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx4 default: "" top_signame: main_tl_mbx4__sram @@ -7997,6 +8308,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx4 default: "" end_idx: -1 @@ -8010,6 +8322,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx4 default: "" end_idx: -1 @@ -8065,6 +8378,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -8079,6 +8393,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -8093,6 +8408,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -8107,6 +8423,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -8121,6 +8438,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx5 default: "" top_signame: main_tl_mbx5__sram @@ -8133,6 +8451,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx5 default: "" end_idx: -1 @@ -8146,6 +8465,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx5 default: "" end_idx: -1 @@ -8201,6 +8521,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -8215,6 +8536,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -8229,6 +8551,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -8243,6 +8566,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -8257,6 +8581,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx6 default: "" top_signame: main_tl_mbx6__sram @@ -8269,6 +8594,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx6 default: "" end_idx: -1 @@ -8282,6 +8608,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx6 default: "" end_idx: -1 @@ -8337,6 +8664,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -8351,6 +8679,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -8365,6 +8694,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -8379,6 +8709,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -8393,6 +8724,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx_jtag default: "" top_signame: main_tl_mbx_jtag__sram @@ -8405,6 +8737,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_jtag default: "" end_idx: -1 @@ -8418,6 +8751,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_jtag default: "" end_idx: -1 @@ -8473,6 +8807,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -8487,6 +8822,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -8501,6 +8837,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -8515,6 +8852,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -8529,6 +8867,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx_pcie0 default: "" top_signame: main_tl_mbx_pcie0__sram @@ -8541,6 +8880,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie0 default: "" end_idx: -1 @@ -8554,6 +8894,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie0 default: "" end_idx: -1 @@ -8609,6 +8950,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -8623,6 +8965,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -8637,6 +8980,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -8651,6 +8995,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -8665,6 +9010,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx_pcie1 default: "" top_signame: main_tl_mbx_pcie1__sram @@ -8677,6 +9023,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie1 default: "" end_idx: -1 @@ -8690,6 +9037,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie1 default: "" end_idx: -1 @@ -8745,6 +9093,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" top_signame: pwrmgr_aon_boot_status @@ -8757,6 +9106,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_dbg_ctrl index: -1 } @@ -8767,6 +9117,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" external: true @@ -8783,6 +9134,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: soc_dbg_ctrl top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -8800,6 +9152,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: soc_dbg_ctrl top_signame: lc_ctrl_lc_dft_en index: -1 @@ -8817,6 +9170,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: soc_dbg_ctrl top_signame: lc_ctrl_lc_raw_test_rma index: -1 @@ -8827,6 +9181,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" package: "" @@ -8843,6 +9198,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" top_signame: pwrmgr_aon_rom_ctrl @@ -8855,6 +9211,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" end_idx: -1 @@ -8868,6 +9225,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" end_idx: -1 @@ -9273,6 +9631,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -9283,6 +9642,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -9300,13 +9660,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -9321,6 +9682,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -9338,13 +9700,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -9358,6 +9721,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9370,6 +9734,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9382,6 +9747,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9394,6 +9760,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9406,6 +9773,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9419,6 +9787,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_tx @@ -9431,6 +9800,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_rx @@ -9442,6 +9812,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9455,6 +9826,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -9469,6 +9841,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: lc_ctrl_lc_cpu_en @@ -9481,6 +9854,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: pwrmgr_aon_fetch_en @@ -9493,6 +9867,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -9506,6 +9881,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9519,6 +9895,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: edn0_edn @@ -9531,6 +9908,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: otp_ctrl_sram_otp_key @@ -9542,6 +9920,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9557,6 +9936,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__corei @@ -9569,6 +9949,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__cored @@ -9581,6 +9962,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -11548,6 +11930,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11561,6 +11944,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11574,6 +11958,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11587,6 +11972,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11600,6 +11986,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11613,6 +12000,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11626,6 +12014,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11639,6 +12028,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11652,6 +12042,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11665,6 +12056,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11678,6 +12070,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11691,6 +12084,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11704,6 +12098,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11717,6 +12112,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11730,6 +12126,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_regs_tl_d @@ -11742,6 +12139,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_mem_tl_d @@ -11754,6 +12152,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl0_rom_tl @@ -11766,6 +12165,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl0_regs_tl @@ -11778,6 +12178,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl1_rom_tl @@ -11790,6 +12191,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl1_regs_tl @@ -11802,6 +12204,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -11815,6 +12218,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: soc_proxy_core_tl @@ -11827,6 +12231,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: soc_proxy_ctn_tl @@ -11839,6 +12244,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: hmac_tl @@ -11851,6 +12257,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: kmac_tl @@ -11863,6 +12270,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: aes_tl @@ -11875,6 +12283,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: csrng_tl @@ -11887,6 +12296,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn0_tl @@ -11899,6 +12309,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn1_tl @@ -11911,6 +12322,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_plic_tl @@ -11923,6 +12335,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: otbn_tl @@ -11935,6 +12348,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: keymgr_dpe_tl @@ -11947,6 +12361,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_core_ibex_cfg_tl_d @@ -11959,6 +12374,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_regs_tl @@ -11971,6 +12387,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_ram_tl @@ -11983,6 +12400,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_mbox_regs_tl @@ -11995,6 +12413,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_mbox_ram_tl @@ -12007,6 +12426,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: dma_tl_d @@ -12019,6 +12439,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx0_core_tl_d @@ -12031,6 +12452,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx1_core_tl_d @@ -12043,6 +12465,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx2_core_tl_d @@ -12055,6 +12478,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx3_core_tl_d @@ -12067,6 +12491,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx4_core_tl_d @@ -12079,6 +12504,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx5_core_tl_d @@ -12091,6 +12517,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx6_core_tl_d @@ -12103,6 +12530,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx_jtag_core_tl_d @@ -12115,6 +12543,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx_pcie0_core_tl_d @@ -12127,6 +12556,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx_pcie1_core_tl_d @@ -12635,6 +13065,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: peri default: "" top_signame: main_tl_peri @@ -12647,6 +13078,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart0_tl @@ -12659,6 +13091,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c0_tl @@ -12671,6 +13104,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: gpio_tl @@ -12683,6 +13117,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: spi_host0_tl @@ -12695,6 +13130,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: spi_device_tl @@ -12707,6 +13143,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rv_timer_tl @@ -12719,6 +13156,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pwrmgr_aon_tl @@ -12731,6 +13169,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rstmgr_aon_tl @@ -12743,6 +13182,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: clkmgr_aon_tl @@ -12755,6 +13195,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pinmux_aon_tl @@ -12767,6 +13208,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_core_tl @@ -12779,6 +13221,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_prim_tl @@ -12791,6 +13234,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: lc_ctrl_regs_tl @@ -12803,6 +13247,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sensor_ctrl_tl @@ -12815,6 +13260,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: alert_handler_tl @@ -12827,6 +13273,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_regs_tl @@ -12839,6 +13286,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_ram_tl @@ -12851,6 +13299,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: aon_timer_aon_tl @@ -12863,6 +13312,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" external: true @@ -12877,6 +13327,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: soc_dbg_ctrl_core_tl @@ -13152,6 +13603,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx default: "" external: true @@ -13166,6 +13618,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx0_soc_tl_d @@ -13178,6 +13631,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx1_soc_tl_d @@ -13190,6 +13644,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx2_soc_tl_d @@ -13202,6 +13657,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx3_soc_tl_d @@ -13214,6 +13670,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx4_soc_tl_d @@ -13226,6 +13683,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx5_soc_tl_d @@ -13238,6 +13696,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx6_soc_tl_d @@ -13250,6 +13709,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx_pcie0_soc_tl_d @@ -13262,6 +13722,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx_pcie1_soc_tl_d @@ -13425,6 +13886,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: dbg default: "" external: true @@ -13439,6 +13901,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: rv_dm_dbg_tl_d @@ -13451,6 +13914,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: mbx_jtag_soc_tl_d @@ -13463,6 +13927,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: lc_ctrl_dmi_tl @@ -13475,6 +13940,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: soc_dbg_ctrl_jtag_tl @@ -18332,6 +18798,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart0 default: "" package: "" @@ -18347,6 +18814,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart0 default: "" end_idx: -1 @@ -18361,6 +18829,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: gpio package: "" top_signame: pwrmgr_aon_strap @@ -18375,6 +18844,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: gpio index: -1 } @@ -18385,6 +18855,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: gpio default: "" end_idx: -1 @@ -18398,6 +18869,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -18412,6 +18884,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -18426,6 +18899,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -18440,6 +18914,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" external: true @@ -18454,6 +18929,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -18466,6 +18942,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -18475,6 +18952,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" package: "" @@ -18490,6 +18968,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -18503,6 +18982,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c0 index: -1 } @@ -18513,6 +18993,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 default: "" external: true @@ -18531,6 +19012,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 default: "" package: "" @@ -18546,6 +19028,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c0 default: "" end_idx: -1 @@ -18559,6 +19042,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_timer default: "" end_idx: -1 @@ -18572,6 +19056,7 @@ act: none width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl package: "" external: true @@ -18588,6 +19073,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq @@ -18603,6 +19089,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq_h @@ -18617,6 +19104,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: edn0_edn @@ -18631,6 +19119,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: pwrmgr_aon_pwr_otp index: -1 @@ -18644,6 +19133,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_vendor_test index: -1 @@ -18657,6 +19147,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_program index: -1 @@ -18674,6 +19165,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -18693,6 +19185,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -18710,6 +19203,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_creator_seed_sw_rw_en index: -1 @@ -18727,6 +19221,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_owner_seed_sw_rw_en index: -1 @@ -18744,6 +19239,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_seed_hw_rd_en index: -1 @@ -18761,6 +19257,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_dft_en index: -1 @@ -18778,6 +19275,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -18791,6 +19289,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -18806,6 +19305,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl index: -1 } @@ -18818,6 +19318,7 @@ act: rsp width: 4 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: one-to-N @@ -18833,6 +19334,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_signame: otp_ctrl_otbn_otp_key @@ -18847,6 +19349,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: otp_ctrl_otp_broadcast index: -1 @@ -18859,6 +19362,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: ast_obs_ctrl @@ -18871,6 +19375,7 @@ type: uni act: req width: 8 + class: InterSignal inst_name: otp_ctrl default: "" package: "" @@ -18886,6 +19391,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -18899,6 +19405,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -18912,6 +19419,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -18922,6 +19430,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -18934,6 +19443,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -18946,6 +19456,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -18958,6 +19469,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -18970,6 +19482,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: pwrmgr_aon_pwr_lc @@ -18983,6 +19496,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_vendor_test @@ -18996,6 +19510,7 @@ act: rcv width: 1 default: otp_ctrl_pkg::OTP_LC_DATA_DEFAULT + class: InterSignal inst_name: lc_ctrl top_signame: otp_ctrl_otp_lc_data index: -1 @@ -19008,6 +19523,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_program @@ -19021,6 +19537,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: kmac_app index: 1 @@ -19033,6 +19550,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19047,6 +19565,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19061,6 +19580,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -19072,6 +19592,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19086,6 +19607,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19100,6 +19622,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19114,6 +19637,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19128,6 +19652,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19142,6 +19667,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19156,6 +19682,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19170,6 +19697,7 @@ act: rcv width: 2 default: lc_ctrl_pkg::On + class: InterSignal inst_name: lc_ctrl top_signame: otbn_lc_rma_ack index: -1 @@ -19182,6 +19710,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -19193,6 +19722,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19207,6 +19737,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19221,6 +19752,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19235,6 +19767,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -19246,6 +19779,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -19257,6 +19791,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19271,6 +19806,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -19285,6 +19821,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_device_id index: -1 @@ -19297,6 +19834,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_manuf_state index: -1 @@ -19309,6 +19847,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -19326,6 +19865,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: lc_ctrl package: "" end_idx: -1 @@ -19340,6 +19880,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" end_idx: -1 @@ -19353,6 +19894,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" end_idx: -1 @@ -19366,6 +19908,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -19380,6 +19923,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" top_signame: edn0_edn @@ -19392,6 +19936,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -19406,6 +19951,7 @@ type: uni act: req width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -19420,6 +19966,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -19433,6 +19980,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" top_signame: spi_device_passthrough @@ -19449,6 +19997,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_host0 default: "" package: "" @@ -19464,6 +20013,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" end_idx: -1 @@ -19477,6 +20027,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19493,6 +20044,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" external: true @@ -19507,6 +20059,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19520,6 +20073,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19533,6 +20087,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19546,6 +20101,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19559,6 +20115,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon index: -1 } @@ -19569,6 +20126,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_tx @@ -19581,6 +20139,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_rx @@ -19593,6 +20152,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rv_core_ibex_pwrmgr @@ -19604,6 +20164,7 @@ type: uni act: rcv width: 5 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -19618,6 +20179,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -19632,6 +20194,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -19644,6 +20207,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -19658,6 +20222,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -19674,6 +20239,7 @@ act: rcv width: 3 default: rom_ctrl_pkg::PWRMGR_DATA_DEFAULT + class: InterSignal inst_name: pwrmgr_aon end_idx: -1 top_type: one-to-N @@ -19687,6 +20253,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19701,6 +20268,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_dft_en @@ -19713,6 +20281,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -19725,6 +20294,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rstmgr_aon_sw_rst_req @@ -19737,6 +20307,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19754,6 +20325,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: rstmgr_aon default: "" package: "" @@ -19773,6 +20345,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" package: pwrmgr_pkg @@ -19787,6 +20360,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_resets @@ -19800,6 +20374,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_rst_en @@ -19813,6 +20388,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: alert_handler_crashdump @@ -19826,6 +20402,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rv_core_ibex_crash_dump @@ -19839,6 +20416,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -19853,6 +20431,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -19866,6 +20445,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_clocks @@ -19878,6 +20458,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_cg_en @@ -19890,6 +20471,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -19902,6 +20484,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19916,6 +20499,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19930,6 +20514,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19944,6 +20529,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19958,6 +20544,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19972,6 +20559,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19986,6 +20574,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_req @@ -19998,6 +20587,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_ack @@ -20010,6 +20600,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -20023,6 +20614,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" package: pwrmgr_pkg @@ -20036,6 +20628,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -20052,6 +20645,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: clkmgr_aon external: true top_signame: calib_rdy @@ -20065,6 +20659,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -20079,6 +20674,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_low_power @@ -20092,6 +20688,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -20104,6 +20701,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -20117,6 +20715,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" end_idx: -1 @@ -20131,6 +20730,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -20143,6 +20743,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_rstreqs @@ -20156,6 +20757,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aon_timer_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20166,6 +20768,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" package: "" @@ -20179,6 +20782,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" end_idx: -1 @@ -20192,6 +20796,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: ast index: -1 } @@ -20202,6 +20807,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" external: true @@ -20216,6 +20822,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" external: true @@ -20231,6 +20838,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: sensor_ctrl external: true top_signame: ast_init_done @@ -20243,6 +20851,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" package: "" @@ -20256,6 +20865,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl default: "" end_idx: -1 @@ -20268,6 +20878,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20280,6 +20891,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20292,6 +20904,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20306,6 +20919,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -20321,6 +20935,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -20335,6 +20950,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20348,6 +20964,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20361,6 +20978,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20374,6 +20992,7 @@ type: uni act: rcv width: 8 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20390,6 +21009,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_proxy default: "" top_signame: dma_lsio_trigger @@ -20403,6 +21023,7 @@ type: req_rsp act: rsp width: 24 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -20418,6 +21039,7 @@ type: req_rsp act: rsp width: 4 + class: InterSignal inst_name: soc_proxy default: "" external: true @@ -20432,6 +21054,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20447,6 +21070,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20462,6 +21086,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20477,6 +21102,7 @@ type: uni act: req width: 16 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20492,6 +21118,7 @@ type: uni act: rcv width: 16 + class: InterSignal inst_name: soc_proxy default: "" package: "" @@ -20507,6 +21134,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_proxy default: "" end_idx: -1 @@ -20520,6 +21148,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_proxy default: "" end_idx: -1 @@ -20533,6 +21162,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" top_signame: otp_ctrl_sram_otp_key @@ -20548,14 +21178,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon external: true top_signame: sram_ctrl_ret_aon_ram_1p_cfg @@ -20572,14 +21203,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon external: true top_signame: sram_ctrl_ret_aon_ram_1p_cfg_rsp @@ -20594,6 +21226,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20606,6 +21239,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -20617,6 +21251,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -20627,6 +21262,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -20640,6 +21276,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -20659,6 +21296,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: rv_dm external: true top_signame: rv_dm_next_dm_addr @@ -20673,6 +21311,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20689,6 +21328,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -20706,6 +21346,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -20724,6 +21365,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -20735,6 +21377,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: rv_dm index: -1 } @@ -20750,6 +21393,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20760,6 +21404,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -20779,6 +21424,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20789,6 +21435,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -20810,6 +21457,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20830,6 +21478,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -20842,6 +21491,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm package: "" top_signame: pwrmgr_aon_strap @@ -20861,6 +21511,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm package: "" top_signame: lc_ctrl_strap_en_override @@ -20873,6 +21524,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" top_signame: main_tl_rv_dm__sba @@ -20885,6 +21537,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -20898,6 +21551,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -20911,6 +21565,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -20923,6 +21578,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -20937,6 +21593,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic index: -1 } @@ -20946,6 +21603,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -20961,6 +21619,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_plic default: "" end_idx: -1 @@ -20974,6 +21633,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: clkmgr_aon_idle @@ -20987,6 +21647,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aes top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20998,6 +21659,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: edn0_edn @@ -21010,6 +21672,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aes default: "" top_signame: keymgr_dpe_aes_key @@ -21022,6 +21685,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aes default: "" end_idx: -1 @@ -21035,6 +21699,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: hmac default: "" top_signame: clkmgr_aon_idle @@ -21047,6 +21712,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: hmac default: "" end_idx: -1 @@ -21060,6 +21726,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: keymgr_dpe_kmac_key @@ -21075,13 +21742,14 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -21096,6 +21764,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: edn0_edn @@ -21108,6 +21777,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: clkmgr_aon_idle @@ -21119,6 +21789,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" package: "" @@ -21135,6 +21806,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: kmac top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -21146,6 +21818,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -21160,6 +21833,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otbn top_signame: otp_ctrl_otbn_otp_key index: -1 @@ -21171,6 +21845,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn1_edn @@ -21183,6 +21858,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn0_edn @@ -21195,6 +21871,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: clkmgr_aon_idle @@ -21207,6 +21884,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -21221,6 +21899,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -21235,6 +21914,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -21249,6 +21929,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" external: true @@ -21264,6 +21945,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -21276,6 +21958,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_flash_rma_req index: -1 @@ -21288,6 +21971,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn end_idx: -1 top_type: broadcast @@ -21301,6 +21985,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: keymgr_dpe_otbn_key @@ -21313,6 +21998,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otbn default: "" end_idx: -1 @@ -21326,6 +22012,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: edn0_edn @@ -21338,6 +22025,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -21352,6 +22040,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -21366,6 +22055,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -21380,6 +22070,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: kmac_app @@ -21392,6 +22083,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: otp_ctrl_otp_keymgr_key @@ -21404,6 +22096,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: keymgr_dpe_otp_device_id @@ -21417,6 +22110,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::On + class: InterSignal inst_name: keymgr_dpe top_signame: lc_ctrl_lc_keymgr_en index: -1 @@ -21428,6 +22122,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" top_signame: lc_ctrl_lc_keymgr_div @@ -21441,6 +22136,7 @@ act: rcv width: 2 default: rom_ctrl_pkg::KEYMGR_DATA_DEFAULT + class: InterSignal inst_name: keymgr_dpe end_idx: -1 top_type: one-to-N @@ -21453,6 +22149,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" package: "" @@ -21466,6 +22163,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: keymgr_dpe default: "" end_idx: -1 @@ -21479,6 +22177,7 @@ type: req_rsp act: rsp width: 2 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -21493,6 +22192,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: csrng default: "" external: true @@ -21512,6 +22212,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng index: -1 } @@ -21523,6 +22224,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: csrng index: -1 } @@ -21534,6 +22236,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: csrng top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -21545,6 +22248,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -21559,6 +22263,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn0 default: "" top_signame: csrng_csrng_cmd @@ -21580,6 +22285,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn0 end_idx: -1 top_type: one-to-N @@ -21593,6 +22299,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn0 default: "" end_idx: -1 @@ -21607,6 +22314,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn1 default: "" top_signame: csrng_csrng_cmd @@ -21628,6 +22336,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn1 end_idx: 1 top_type: partial-one-to-N @@ -21641,6 +22350,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn1 default: "" end_idx: -1 @@ -21654,6 +22364,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" top_signame: otp_ctrl_sram_otp_key @@ -21669,14 +22380,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main external: true top_signame: sram_ctrl_main_ram_1p_cfg @@ -21693,14 +22405,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main external: true top_signame: sram_ctrl_main_ram_1p_cfg_rsp @@ -21715,6 +22428,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -21727,6 +22441,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -21739,6 +22454,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_main top_signame: sram_ctrl_main_otp_en_sram_ifetch index: -1 @@ -21750,6 +22466,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -21763,6 +22480,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -21776,6 +22494,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_mbox default: "" top_signame: otp_ctrl_sram_otp_key @@ -21791,14 +22510,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMboxNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_mbox external: true top_signame: sram_ctrl_mbox_ram_1p_cfg @@ -21815,14 +22535,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMboxNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_mbox external: true top_signame: sram_ctrl_mbox_ram_1p_cfg_rsp @@ -21837,6 +22558,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_mbox top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -21849,6 +22571,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_mbox index: -1 } @@ -21860,6 +22583,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_mbox index: -1 } @@ -21870,6 +22594,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_mbox default: "" end_idx: -1 @@ -21883,6 +22608,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_mbox default: "" end_idx: -1 @@ -21896,6 +22622,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: ast_rom_cfg @@ -21908,6 +22635,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: pwrmgr_aon_rom_ctrl @@ -21920,6 +22648,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: keymgr_dpe_rom_digest @@ -21932,6 +22661,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" top_signame: kmac_app @@ -21944,6 +22674,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" end_idx: -1 @@ -21957,6 +22688,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl0 default: "" end_idx: -1 @@ -21970,6 +22702,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: ast_rom_cfg @@ -21982,6 +22715,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: pwrmgr_aon_rom_ctrl @@ -21994,6 +22728,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: keymgr_dpe_rom_digest @@ -22006,6 +22741,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" top_signame: kmac_app @@ -22018,6 +22754,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" end_idx: -1 @@ -22031,6 +22768,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl1 default: "" end_idx: -1 @@ -22044,6 +22782,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: dma default: "" end_idx: -1 @@ -22058,6 +22797,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dma default: "" external: true @@ -22073,6 +22813,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: dma default: "" external: true @@ -22088,6 +22829,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: dma default: "" external: true @@ -22102,6 +22844,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dma default: "" top_signame: main_tl_dma__host @@ -22114,6 +22857,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: dma default: "" end_idx: -1 @@ -22127,6 +22871,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -22141,6 +22886,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -22155,6 +22901,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -22169,6 +22916,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx0 package: "" external: true @@ -22183,6 +22931,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx0 default: "" top_signame: main_tl_mbx0__sram @@ -22195,6 +22944,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx0 default: "" end_idx: -1 @@ -22208,6 +22958,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx0 default: "" end_idx: -1 @@ -22221,6 +22972,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -22235,6 +22987,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -22249,6 +23002,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -22263,6 +23017,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx1 package: "" external: true @@ -22277,6 +23032,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx1 default: "" top_signame: main_tl_mbx1__sram @@ -22289,6 +23045,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx1 default: "" end_idx: -1 @@ -22302,6 +23059,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx1 default: "" end_idx: -1 @@ -22315,6 +23073,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -22329,6 +23088,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -22343,6 +23103,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -22357,6 +23118,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx2 package: "" external: true @@ -22371,6 +23133,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx2 default: "" top_signame: main_tl_mbx2__sram @@ -22383,6 +23146,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx2 default: "" end_idx: -1 @@ -22396,6 +23160,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx2 default: "" end_idx: -1 @@ -22409,6 +23174,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -22423,6 +23189,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -22437,6 +23204,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -22451,6 +23219,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx3 package: "" external: true @@ -22465,6 +23234,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx3 default: "" top_signame: main_tl_mbx3__sram @@ -22477,6 +23247,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx3 default: "" end_idx: -1 @@ -22490,6 +23261,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx3 default: "" end_idx: -1 @@ -22503,6 +23275,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -22517,6 +23290,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -22531,6 +23305,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -22545,6 +23320,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx4 package: "" external: true @@ -22559,6 +23335,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx4 default: "" top_signame: main_tl_mbx4__sram @@ -22571,6 +23348,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx4 default: "" end_idx: -1 @@ -22584,6 +23362,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx4 default: "" end_idx: -1 @@ -22597,6 +23376,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -22611,6 +23391,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -22625,6 +23406,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -22639,6 +23421,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx5 package: "" external: true @@ -22653,6 +23436,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx5 default: "" top_signame: main_tl_mbx5__sram @@ -22665,6 +23449,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx5 default: "" end_idx: -1 @@ -22678,6 +23463,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx5 default: "" end_idx: -1 @@ -22691,6 +23477,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -22705,6 +23492,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -22719,6 +23507,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -22733,6 +23522,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx6 package: "" external: true @@ -22747,6 +23537,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx6 default: "" top_signame: main_tl_mbx6__sram @@ -22759,6 +23550,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx6 default: "" end_idx: -1 @@ -22772,6 +23564,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx6 default: "" end_idx: -1 @@ -22785,6 +23578,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -22799,6 +23593,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -22813,6 +23608,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -22827,6 +23623,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_jtag package: "" external: true @@ -22841,6 +23638,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx_jtag default: "" top_signame: main_tl_mbx_jtag__sram @@ -22853,6 +23651,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_jtag default: "" end_idx: -1 @@ -22866,6 +23665,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_jtag default: "" end_idx: -1 @@ -22879,6 +23679,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -22893,6 +23694,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -22907,6 +23709,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -22921,6 +23724,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie0 package: "" external: true @@ -22935,6 +23739,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx_pcie0 default: "" top_signame: main_tl_mbx_pcie0__sram @@ -22947,6 +23752,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie0 default: "" end_idx: -1 @@ -22960,6 +23766,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie0 default: "" end_idx: -1 @@ -22973,6 +23780,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -22987,6 +23795,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -23001,6 +23810,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -23015,6 +23825,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: mbx_pcie1 package: "" external: true @@ -23029,6 +23840,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx_pcie1 default: "" top_signame: main_tl_mbx_pcie1__sram @@ -23041,6 +23853,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie1 default: "" end_idx: -1 @@ -23054,6 +23867,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx_pcie1 default: "" end_idx: -1 @@ -23067,6 +23881,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" top_signame: pwrmgr_aon_boot_status @@ -23079,6 +23894,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_dbg_ctrl index: -1 } @@ -23089,6 +23905,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" external: true @@ -23105,6 +23922,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: soc_dbg_ctrl top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -23122,6 +23940,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: soc_dbg_ctrl top_signame: lc_ctrl_lc_dft_en index: -1 @@ -23139,6 +23958,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: soc_dbg_ctrl top_signame: lc_ctrl_lc_raw_test_rma index: -1 @@ -23149,6 +23969,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" package: "" @@ -23165,6 +23986,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" top_signame: pwrmgr_aon_rom_ctrl @@ -23177,6 +23999,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" end_idx: -1 @@ -23190,6 +24013,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: soc_dbg_ctrl default: "" end_idx: -1 @@ -23202,6 +24026,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -23212,6 +24037,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -23229,13 +24055,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -23250,6 +24077,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -23267,13 +24095,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex default: "" external: true @@ -23287,6 +24116,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23299,6 +24129,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23311,6 +24142,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23323,6 +24155,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23335,6 +24168,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23348,6 +24182,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_tx @@ -23360,6 +24195,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_rx @@ -23371,6 +24207,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23384,6 +24221,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -23398,6 +24236,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: lc_ctrl_lc_cpu_en @@ -23410,6 +24249,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: pwrmgr_aon_fetch_en @@ -23422,6 +24262,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -23435,6 +24276,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23448,6 +24290,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: edn0_edn @@ -23460,6 +24303,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: otp_ctrl_sram_otp_key @@ -23471,6 +24315,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -23486,6 +24331,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__corei @@ -23498,6 +24344,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__cored @@ -23510,6 +24357,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -23523,6 +24371,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23536,6 +24385,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23549,6 +24399,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23562,6 +24413,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23575,6 +24427,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23588,6 +24441,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23601,6 +24455,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23614,6 +24469,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23627,6 +24483,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23640,6 +24497,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23653,6 +24511,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23666,6 +24525,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23679,6 +24539,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23692,6 +24553,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23705,6 +24567,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_regs_tl_d @@ -23717,6 +24580,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_mem_tl_d @@ -23729,6 +24593,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl0_rom_tl @@ -23741,6 +24606,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl0_regs_tl @@ -23753,6 +24619,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl1_rom_tl @@ -23765,6 +24632,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl1_regs_tl @@ -23777,6 +24645,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -23790,6 +24659,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: soc_proxy_core_tl @@ -23802,6 +24672,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: soc_proxy_ctn_tl @@ -23814,6 +24685,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: hmac_tl @@ -23826,6 +24698,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: kmac_tl @@ -23838,6 +24711,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: aes_tl @@ -23850,6 +24724,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: csrng_tl @@ -23862,6 +24737,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn0_tl @@ -23874,6 +24750,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn1_tl @@ -23886,6 +24763,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_plic_tl @@ -23898,6 +24776,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: otbn_tl @@ -23910,6 +24789,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: keymgr_dpe_tl @@ -23922,6 +24802,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_core_ibex_cfg_tl_d @@ -23934,6 +24815,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_regs_tl @@ -23946,6 +24828,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_ram_tl @@ -23958,6 +24841,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_mbox_regs_tl @@ -23970,6 +24854,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_mbox_ram_tl @@ -23982,6 +24867,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: dma_tl_d @@ -23994,6 +24880,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx0_core_tl_d @@ -24006,6 +24893,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx1_core_tl_d @@ -24018,6 +24906,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx2_core_tl_d @@ -24030,6 +24919,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx3_core_tl_d @@ -24042,6 +24932,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx4_core_tl_d @@ -24054,6 +24945,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx5_core_tl_d @@ -24066,6 +24958,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx6_core_tl_d @@ -24078,6 +24971,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx_jtag_core_tl_d @@ -24090,6 +24984,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx_pcie0_core_tl_d @@ -24102,6 +24997,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: mbx_pcie1_core_tl_d @@ -24114,6 +25010,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: peri default: "" top_signame: main_tl_peri @@ -24126,6 +25023,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart0_tl @@ -24138,6 +25036,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c0_tl @@ -24150,6 +25049,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: gpio_tl @@ -24162,6 +25062,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: spi_host0_tl @@ -24174,6 +25075,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: spi_device_tl @@ -24186,6 +25088,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rv_timer_tl @@ -24198,6 +25101,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pwrmgr_aon_tl @@ -24210,6 +25114,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rstmgr_aon_tl @@ -24222,6 +25127,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: clkmgr_aon_tl @@ -24234,6 +25140,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pinmux_aon_tl @@ -24246,6 +25153,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_core_tl @@ -24258,6 +25166,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_prim_tl @@ -24270,6 +25179,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: lc_ctrl_regs_tl @@ -24282,6 +25192,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sensor_ctrl_tl @@ -24294,6 +25205,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: alert_handler_tl @@ -24306,6 +25218,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_regs_tl @@ -24318,6 +25231,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_ram_tl @@ -24330,6 +25244,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: aon_timer_aon_tl @@ -24342,6 +25257,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" external: true @@ -24356,6 +25272,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: soc_dbg_ctrl_core_tl @@ -24368,6 +25285,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: mbx default: "" external: true @@ -24382,6 +25300,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx0_soc_tl_d @@ -24394,6 +25313,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx1_soc_tl_d @@ -24406,6 +25326,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx2_soc_tl_d @@ -24418,6 +25339,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx3_soc_tl_d @@ -24430,6 +25352,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx4_soc_tl_d @@ -24442,6 +25365,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx5_soc_tl_d @@ -24454,6 +25378,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx6_soc_tl_d @@ -24466,6 +25391,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx_pcie0_soc_tl_d @@ -24478,6 +25404,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: mbx default: "" top_signame: mbx_pcie1_soc_tl_d @@ -24490,6 +25417,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: dbg default: "" external: true @@ -24504,6 +25432,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: rv_dm_dbg_tl_d @@ -24516,6 +25445,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: mbx_jtag_soc_tl_d @@ -24528,6 +25458,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: lc_ctrl_dmi_tl @@ -24540,6 +25471,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: dbg default: "" top_signame: soc_dbg_ctrl_jtag_tl @@ -24714,12 +25646,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24736,12 +25668,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24758,12 +25690,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24780,12 +25712,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24802,12 +25734,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMboxNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24824,12 +25756,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMboxNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24906,12 +25838,12 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } type: uni default: "" @@ -24940,12 +25872,12 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } type: uni default: "" @@ -26521,12 +27453,12 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } type: req_rsp end_idx: -1 @@ -26542,12 +27474,12 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } type: req_rsp end_idx: -1 diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson index c5b97fe940e97f..5a0d8bb65d98d4 100644 --- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson +++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson @@ -694,6 +694,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart0 index: -1 } @@ -704,6 +705,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart0 default: "" end_idx: -1 @@ -759,6 +761,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart1 index: -1 } @@ -769,6 +772,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart1 default: "" end_idx: -1 @@ -824,6 +828,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart2 index: -1 } @@ -834,6 +839,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart2 default: "" end_idx: -1 @@ -889,6 +895,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart3 index: -1 } @@ -899,6 +906,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart3 default: "" end_idx: -1 @@ -976,6 +984,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: gpio index: -1 } @@ -988,6 +997,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: gpio index: -1 } @@ -998,6 +1008,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: gpio default: "" end_idx: -1 @@ -1063,6 +1074,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" top_signame: ast_spi_ram_2p_cfg @@ -1075,6 +1087,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -1085,6 +1098,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" top_signame: ast_spi_ram_2p_cfg @@ -1097,6 +1111,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -1107,6 +1122,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -1119,6 +1135,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -1128,6 +1145,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" package: "" @@ -1143,6 +1161,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -1210,6 +1229,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c0 default: "" top_signame: ast_ram_1p_cfg @@ -1222,6 +1242,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 index: -1 } @@ -1236,6 +1257,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 index: -1 } @@ -1246,6 +1268,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c0 default: "" end_idx: -1 @@ -1313,6 +1336,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c1 default: "" top_signame: ast_ram_1p_cfg @@ -1325,6 +1349,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c1 index: -1 } @@ -1339,6 +1364,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c1 index: -1 } @@ -1349,6 +1375,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c1 default: "" end_idx: -1 @@ -1416,6 +1443,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c2 default: "" top_signame: ast_ram_1p_cfg @@ -1428,6 +1456,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c2 index: -1 } @@ -1442,6 +1471,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c2 index: -1 } @@ -1452,6 +1482,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c2 default: "" end_idx: -1 @@ -1503,6 +1534,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pattgen default: "" end_idx: -1 @@ -1554,6 +1586,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_timer default: "" end_idx: -1 @@ -1665,6 +1698,7 @@ act: none width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl package: "" external: true @@ -1681,6 +1715,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq @@ -1696,6 +1731,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq_h @@ -1710,6 +1746,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: edn0_edn @@ -1724,6 +1761,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: pwrmgr_aon_pwr_otp index: -1 @@ -1737,6 +1775,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_vendor_test index: -1 @@ -1750,6 +1789,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_program index: -1 @@ -1767,6 +1807,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -1786,6 +1827,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -1803,6 +1845,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_creator_seed_sw_rw_en index: -1 @@ -1820,6 +1863,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl index: -1 } @@ -1836,6 +1880,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_seed_hw_rd_en index: -1 @@ -1853,6 +1898,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_dft_en index: -1 @@ -1870,6 +1916,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -1883,6 +1930,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -1898,6 +1946,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: flash_ctrl_otp index: -1 @@ -1911,6 +1960,7 @@ act: rsp width: 4 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: 3 top_type: partial-one-to-N @@ -1926,6 +1976,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_signame: otp_ctrl_otbn_otp_key @@ -1940,6 +1991,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: otp_ctrl_otp_broadcast index: -1 @@ -1952,6 +2004,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: ast_obs_ctrl @@ -1964,6 +2017,7 @@ type: uni act: req width: 8 + class: InterSignal inst_name: otp_ctrl default: "" package: "" @@ -1979,6 +2033,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -1992,6 +2047,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -2197,6 +2253,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: pinmux_aon_lc_jtag @@ -2209,6 +2266,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -2221,6 +2279,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -2233,6 +2292,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -2245,6 +2305,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -2257,6 +2318,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: pwrmgr_aon_pwr_lc @@ -2270,6 +2332,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_vendor_test @@ -2283,6 +2346,7 @@ act: rcv width: 1 default: otp_ctrl_pkg::OTP_LC_DATA_DEFAULT + class: InterSignal inst_name: lc_ctrl top_signame: otp_ctrl_otp_lc_data index: -1 @@ -2295,6 +2359,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_program @@ -2308,6 +2373,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: kmac_app index: 1 @@ -2320,6 +2386,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -2331,6 +2398,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2345,6 +2413,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2359,6 +2428,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2373,6 +2443,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2387,6 +2458,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2401,6 +2473,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2415,6 +2488,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2429,6 +2503,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2443,6 +2518,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2457,6 +2533,7 @@ act: rcv width: 2 default: lc_ctrl_pkg::On + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: one-to-N @@ -2471,6 +2548,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: flash_ctrl_rma_seed index: -1 @@ -2483,6 +2561,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2497,6 +2576,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2511,6 +2591,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2525,6 +2606,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2539,6 +2621,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2553,6 +2636,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2567,6 +2651,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -2581,6 +2666,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_device_id index: -1 @@ -2593,6 +2679,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_manuf_state index: -1 @@ -2605,6 +2692,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -2622,6 +2710,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: lc_ctrl package: "" end_idx: -1 @@ -2636,6 +2725,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" end_idx: -1 @@ -2649,6 +2739,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -2721,6 +2812,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2735,6 +2827,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" top_signame: edn0_edn @@ -2747,6 +2840,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2761,6 +2855,7 @@ type: uni act: req width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2775,6 +2870,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -2826,6 +2922,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" top_signame: spi_device_passthrough @@ -2842,6 +2939,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_host0 index: -1 } @@ -2852,6 +2950,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" end_idx: -1 @@ -2903,6 +3002,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host1 index: -1 } @@ -2917,6 +3017,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_host1 index: -1 } @@ -2927,6 +3028,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host1 default: "" end_idx: -1 @@ -3009,6 +3111,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3024,6 +3127,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3039,6 +3143,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3054,6 +3159,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3069,6 +3175,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3084,6 +3191,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3099,6 +3207,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3114,6 +3223,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3129,6 +3239,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3144,6 +3255,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3159,6 +3271,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3174,6 +3287,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3189,6 +3303,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3204,6 +3319,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3219,6 +3335,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -3232,6 +3349,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" top_signame: ast_usb_ram_1p_cfg @@ -3244,6 +3362,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev index: -1 } @@ -3254,6 +3373,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: usbdev default: "" end_idx: -1 @@ -3337,6 +3457,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" external: true @@ -3351,6 +3472,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3364,6 +3486,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3377,6 +3500,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3390,6 +3514,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3403,6 +3528,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3417,6 +3543,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_tx @@ -3429,6 +3556,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_rx @@ -3441,6 +3569,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rv_core_ibex_pwrmgr @@ -3452,6 +3581,7 @@ type: uni act: rcv width: 6 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -3466,6 +3596,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -3480,6 +3611,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -3492,6 +3624,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -3506,6 +3639,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -3522,6 +3656,7 @@ act: rcv width: 1 default: rom_ctrl_pkg::PWRMGR_DATA_DEFAULT + class: InterSignal inst_name: pwrmgr_aon top_signame: rom_ctrl_pwrmgr_data index: -1 @@ -3533,6 +3668,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3547,6 +3683,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_dft_en @@ -3559,6 +3696,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -3571,6 +3709,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rstmgr_aon_sw_rst_req @@ -3583,6 +3722,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -3688,6 +3828,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: rstmgr_aon default: "" package: "" @@ -3707,6 +3848,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" package: pwrmgr_pkg @@ -3721,6 +3863,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_resets @@ -3734,6 +3877,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_rst_en @@ -3747,6 +3891,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: alert_handler_crashdump @@ -3760,6 +3905,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rv_core_ibex_crash_dump @@ -3773,6 +3919,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -3787,6 +3934,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -3923,6 +4071,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_clocks @@ -3935,6 +4084,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_cg_en @@ -3947,6 +4097,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -3959,6 +4110,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3973,6 +4125,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -3987,6 +4140,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -4001,6 +4155,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -4015,6 +4170,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -4029,6 +4185,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -4043,6 +4200,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_req @@ -4055,6 +4213,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_ack @@ -4067,6 +4226,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -4080,6 +4240,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" package: pwrmgr_pkg @@ -4093,6 +4254,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -4109,6 +4271,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: clkmgr_aon external: true top_signame: calib_rdy @@ -4122,6 +4285,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -4179,6 +4343,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sysrst_ctrl_aon default: "" package: "" @@ -4191,6 +4356,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sysrst_ctrl_aon default: "" package: "" @@ -4204,6 +4370,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sysrst_ctrl_aon default: "" end_idx: -1 @@ -4262,6 +4429,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: adc_ctrl_aon default: "" external: true @@ -4275,6 +4443,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: adc_ctrl_aon default: "" package: "" @@ -4288,6 +4457,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: adc_ctrl_aon default: "" end_idx: -1 @@ -4346,6 +4516,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pwm_aon default: "" end_idx: -1 @@ -4444,6 +4615,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -4457,6 +4629,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_dft_en index: -1 @@ -4474,6 +4647,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -4494,6 +4668,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -4511,6 +4686,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon end_idx: -1 top_type: broadcast @@ -4525,6 +4701,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -4539,6 +4716,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -4553,6 +4731,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pinmux_aon default: "" top_signame: pinmux_aon_dft_jtag @@ -4567,6 +4746,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: pinmux_aon external: true top_signame: dft_strap_test @@ -4581,6 +4761,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: pinmux_aon package: "" external: true @@ -4596,6 +4777,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_low_power @@ -4609,6 +4791,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_strap @@ -4628,6 +4811,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: lc_ctrl_strap_en_override @@ -4641,6 +4825,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -4653,6 +4838,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -4666,6 +4852,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -4680,6 +4867,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" external: true @@ -4695,6 +4883,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" external: true @@ -4710,6 +4899,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -4722,6 +4912,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -4735,6 +4926,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -4749,6 +4941,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: usbdev_usb_aon_bus_not_idle @@ -4762,6 +4955,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: usbdev_usb_aon_bus_reset @@ -4775,6 +4969,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: usbdev_usb_aon_sense_lost @@ -4788,6 +4983,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" end_idx: -1 @@ -4802,6 +4998,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -4860,6 +5057,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" end_idx: -1 @@ -4874,6 +5072,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -4886,6 +5085,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_rstreqs @@ -4899,6 +5099,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aon_timer_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -4909,6 +5110,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" package: "" @@ -4922,6 +5124,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" end_idx: -1 @@ -5034,6 +5237,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: ast index: -1 } @@ -5090,6 +5294,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" external: true @@ -5104,6 +5309,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" external: true @@ -5119,6 +5325,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: sensor_ctrl_aon external: true top_signame: ast_init_done @@ -5131,6 +5338,7 @@ type: uni act: rcv width: 9 + class: InterSignal inst_name: sensor_ctrl_aon default: "" package: "" @@ -5145,6 +5353,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" package: "" @@ -5159,6 +5368,7 @@ act: req width: 4 default: "'0" + class: InterSignal inst_name: sensor_ctrl_aon external: true top_signame: sensor_ctrl_manual_pad_attr @@ -5172,6 +5382,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" end_idx: -1 @@ -5342,6 +5553,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" top_signame: otp_ctrl_sram_otp_key @@ -5357,14 +5569,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon external: true top_signame: sram_ctrl_ret_aon_cfg @@ -5381,14 +5594,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -5400,6 +5614,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -5412,6 +5627,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -5423,6 +5639,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -5433,6 +5650,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -5446,6 +5664,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -5507,6 +5726,7 @@ byte_write: False config: { + class: Flash banks: 2 pages_per_bank: 256 program_resolution: 8 @@ -5625,6 +5845,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -5638,6 +5859,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_nvm_debug_en @@ -5650,6 +5872,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" external: true @@ -5663,6 +5886,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -5677,6 +5901,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -5691,6 +5916,7 @@ type: io act: none width: 2 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -5705,6 +5931,7 @@ type: io act: none width: 1 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -5720,6 +5947,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_creator_seed_sw_rw_en @@ -5732,6 +5960,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_owner_seed_sw_rw_en @@ -5744,6 +5973,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_iso_part_sw_rd_en @@ -5756,6 +5986,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_iso_part_sw_wr_en @@ -5768,6 +5999,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_seed_hw_rd_en @@ -5780,6 +6012,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_escalate_en @@ -5792,6 +6025,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_flash_rma_req @@ -5804,6 +6038,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_flash_rma_ack @@ -5816,6 +6051,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -5830,6 +6066,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: pwrmgr_aon_pwr_flash @@ -5842,6 +6079,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -5856,6 +6094,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: ast_obs_ctrl @@ -5867,6 +6106,7 @@ type: uni act: req width: 8 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -5882,6 +6122,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -5895,6 +6136,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -5908,6 +6150,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -6021,6 +6264,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: rv_dm index: -1 } @@ -6032,6 +6276,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" top_signame: pinmux_aon_rv_jtag @@ -6050,6 +6295,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -6067,6 +6313,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_dft_en index: -1 @@ -6086,6 +6333,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: pinmux_aon_pinmux_hw_debug_en index: -1 @@ -6098,6 +6346,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: rv_dm top_signame: rv_dm_otp_dis_rv_dm_late_debug index: -1 @@ -6114,6 +6363,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -6124,6 +6374,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -6143,6 +6394,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -6153,6 +6405,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -6174,6 +6427,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -6193,6 +6447,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -6204,6 +6459,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -6221,6 +6477,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -6231,6 +6488,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" top_signame: main_tl_rv_dm__sba @@ -6243,6 +6501,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -6256,6 +6515,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -6269,6 +6529,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -6309,6 +6570,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -6323,6 +6585,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic index: -1 } @@ -6332,6 +6595,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -6347,6 +6611,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_plic default: "" end_idx: -1 @@ -6534,6 +6799,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: clkmgr_aon_idle @@ -6547,6 +6813,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aes top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -6558,6 +6825,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: edn0_edn @@ -6570,6 +6838,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aes default: "" top_signame: keymgr_aes_key @@ -6582,6 +6851,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aes default: "" end_idx: -1 @@ -6633,6 +6903,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: hmac default: "" top_signame: clkmgr_aon_idle @@ -6645,6 +6916,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: hmac default: "" end_idx: -1 @@ -6825,6 +7097,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: keymgr_kmac_key @@ -6840,13 +7113,14 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -6861,6 +7135,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: edn0_edn @@ -6873,6 +7148,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: clkmgr_aon_idle @@ -6884,6 +7160,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" package: "" @@ -6900,6 +7177,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: kmac top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -6911,6 +7189,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -7068,6 +7347,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otbn top_signame: otp_ctrl_otbn_otp_key index: -1 @@ -7079,6 +7359,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn1_edn @@ -7091,6 +7372,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn0_edn @@ -7103,6 +7385,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: clkmgr_aon_idle @@ -7115,6 +7398,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: ast_ram_1p_cfg @@ -7127,6 +7411,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: ast_ram_1p_cfg @@ -7139,6 +7424,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn index: -1 } @@ -7149,6 +7435,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn index: -1 } @@ -7160,6 +7447,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -7172,6 +7460,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_flash_rma_req index: -1 @@ -7184,6 +7473,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_flash_rma_ack index: 1 @@ -7195,6 +7485,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: keymgr_otbn_key @@ -7207,6 +7498,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otbn default: "" end_idx: -1 @@ -7432,6 +7724,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: edn0_edn @@ -7444,6 +7737,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -7458,6 +7752,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -7472,6 +7767,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -7486,6 +7782,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: kmac_app @@ -7498,6 +7795,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: otp_ctrl_otp_keymgr_key @@ -7510,6 +7808,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: keymgr_otp_device_id @@ -7522,6 +7821,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: flash_ctrl_keymgr @@ -7535,6 +7835,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::On + class: InterSignal inst_name: keymgr top_signame: lc_ctrl_lc_keymgr_en index: -1 @@ -7546,6 +7847,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: lc_ctrl_lc_keymgr_div @@ -7558,6 +7860,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: rom_ctrl_keymgr_data @@ -7569,6 +7872,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" package: "" @@ -7582,6 +7886,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -7665,6 +7970,7 @@ type: req_rsp act: rsp width: 2 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -7679,6 +7985,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -7697,6 +8004,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -7711,6 +8019,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: csrng top_signame: csrng_otp_en_csrng_sw_app_read index: -1 @@ -7723,6 +8032,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: csrng top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -7734,6 +8044,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -7815,6 +8126,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: entropy_src default: "" top_signame: csrng_entropy_src_hw_if @@ -7834,6 +8146,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: entropy_src default: "" top_signame: csrng_cs_aes_halt @@ -7846,6 +8159,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: entropy_src default: "" external: true @@ -7860,6 +8174,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: entropy_src index: -1 } @@ -7871,6 +8186,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: entropy_src index: -1 } @@ -7882,6 +8198,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: entropy_src index: -1 } @@ -7891,6 +8208,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: entropy_src default: "" package: "" @@ -7906,6 +8224,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: entropy_src default: "" end_idx: -1 @@ -7958,6 +8277,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn0 default: "" top_signame: csrng_csrng_cmd @@ -7979,6 +8299,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn0 end_idx: -1 top_type: one-to-N @@ -7992,6 +8313,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn0 default: "" end_idx: -1 @@ -8044,6 +8366,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn1 default: "" top_signame: csrng_csrng_cmd @@ -8065,6 +8388,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn1 end_idx: 1 top_type: partial-one-to-N @@ -8078,6 +8402,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn1 default: "" end_idx: -1 @@ -8249,6 +8574,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" top_signame: otp_ctrl_sram_otp_key @@ -8264,14 +8590,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main external: true top_signame: sram_ctrl_main_cfg @@ -8288,14 +8615,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main index: -1 } @@ -8307,6 +8635,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -8319,6 +8648,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -8331,6 +8661,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_main top_signame: sram_ctrl_main_otp_en_sram_ifetch index: -1 @@ -8342,6 +8673,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -8355,6 +8687,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -8478,6 +8811,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rom_ctrl default: "" top_signame: ast_rom_cfg @@ -8490,6 +8824,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -8504,6 +8839,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -8518,6 +8854,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rom_ctrl default: "" top_signame: kmac_app @@ -8530,6 +8867,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -8543,6 +8881,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -8951,6 +9290,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -8961,6 +9301,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: ast_ram_1p_cfg @@ -8976,13 +9317,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -8993,6 +9335,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: ast_ram_1p_cfg @@ -9008,13 +9351,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -9024,6 +9368,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9036,6 +9381,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9048,6 +9394,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9060,6 +9407,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9072,6 +9420,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9085,6 +9434,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_tx @@ -9097,6 +9447,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_rx @@ -9108,6 +9459,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9121,6 +9473,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -9135,6 +9488,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: lc_ctrl_lc_cpu_en @@ -9147,6 +9501,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: pwrmgr_aon_fetch_en @@ -9159,6 +9514,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -9172,6 +9528,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9185,6 +9542,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: edn0_edn @@ -9197,6 +9555,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: otp_ctrl_sram_otp_key @@ -9208,6 +9567,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -9223,6 +9583,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__corei @@ -9235,6 +9596,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__cored @@ -9247,6 +9609,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -10751,6 +11114,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -10764,6 +11128,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -10777,6 +11142,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -10790,6 +11156,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_regs_tl_d @@ -10802,6 +11169,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_mem_tl_d @@ -10814,6 +11182,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl_rom_tl @@ -10826,6 +11195,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl_regs_tl @@ -10838,6 +11208,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -10851,6 +11222,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: spi_host0_tl @@ -10863,6 +11235,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: spi_host1_tl @@ -10875,6 +11248,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: usbdev_tl @@ -10887,6 +11261,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: flash_ctrl_core_tl @@ -10899,6 +11274,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: flash_ctrl_prim_tl @@ -10911,6 +11287,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: flash_ctrl_mem_tl @@ -10923,6 +11300,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: hmac_tl @@ -10935,6 +11313,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: kmac_tl @@ -10947,6 +11326,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: aes_tl @@ -10959,6 +11339,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: entropy_src_tl @@ -10971,6 +11352,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: csrng_tl @@ -10983,6 +11365,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn0_tl @@ -10995,6 +11378,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn1_tl @@ -11007,6 +11391,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_plic_tl @@ -11019,6 +11404,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: otbn_tl @@ -11031,6 +11417,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: keymgr_tl @@ -11043,6 +11430,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_core_ibex_cfg_tl_d @@ -11055,6 +11443,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_regs_tl @@ -11067,6 +11456,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_ram_tl @@ -11729,6 +12119,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: peri default: "" top_signame: main_tl_peri @@ -11741,6 +12132,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart0_tl @@ -11753,6 +12145,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart1_tl @@ -11765,6 +12158,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart2_tl @@ -11777,6 +12171,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart3_tl @@ -11789,6 +12184,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c0_tl @@ -11801,6 +12197,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c1_tl @@ -11813,6 +12210,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c2_tl @@ -11825,6 +12223,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pattgen_tl @@ -11837,6 +12236,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pwm_aon_tl @@ -11849,6 +12249,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: gpio_tl @@ -11861,6 +12262,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: spi_device_tl @@ -11873,6 +12275,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rv_timer_tl @@ -11885,6 +12288,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pwrmgr_aon_tl @@ -11897,6 +12301,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rstmgr_aon_tl @@ -11909,6 +12314,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: clkmgr_aon_tl @@ -11921,6 +12327,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pinmux_aon_tl @@ -11933,6 +12340,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_core_tl @@ -11945,6 +12353,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_prim_tl @@ -11957,6 +12366,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: lc_ctrl_regs_tl @@ -11969,6 +12379,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sensor_ctrl_aon_tl @@ -11981,6 +12392,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: alert_handler_tl @@ -11993,6 +12405,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_regs_tl @@ -12005,6 +12418,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_ram_tl @@ -12017,6 +12431,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: aon_timer_aon_tl @@ -12029,6 +12444,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sysrst_ctrl_aon_tl @@ -12041,6 +12457,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: adc_ctrl_aon_tl @@ -12053,6 +12470,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" external: true @@ -17200,6 +17618,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart0 index: -1 } @@ -17210,6 +17629,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart0 default: "" end_idx: -1 @@ -17227,6 +17647,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart1 index: -1 } @@ -17237,6 +17658,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart1 default: "" end_idx: -1 @@ -17254,6 +17676,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart2 index: -1 } @@ -17264,6 +17687,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart2 default: "" end_idx: -1 @@ -17281,6 +17705,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: uart3 index: -1 } @@ -17291,6 +17716,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: uart3 default: "" end_idx: -1 @@ -17305,6 +17731,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: gpio index: -1 } @@ -17317,6 +17744,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: gpio index: -1 } @@ -17327,6 +17755,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: gpio default: "" end_idx: -1 @@ -17340,6 +17769,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" top_signame: ast_spi_ram_2p_cfg @@ -17352,6 +17782,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -17362,6 +17793,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device default: "" top_signame: ast_spi_ram_2p_cfg @@ -17374,6 +17806,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -17384,6 +17817,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -17396,6 +17830,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: spi_device index: -1 } @@ -17405,6 +17840,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_device default: "" package: "" @@ -17420,6 +17856,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_device default: "" end_idx: -1 @@ -17433,6 +17870,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c0 default: "" top_signame: ast_ram_1p_cfg @@ -17445,6 +17883,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 index: -1 } @@ -17459,6 +17898,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c0 index: -1 } @@ -17469,6 +17909,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c0 default: "" end_idx: -1 @@ -17482,6 +17923,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c1 default: "" top_signame: ast_ram_1p_cfg @@ -17494,6 +17936,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c1 index: -1 } @@ -17508,6 +17951,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c1 index: -1 } @@ -17518,6 +17962,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c1 default: "" end_idx: -1 @@ -17531,6 +17976,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: i2c2 default: "" top_signame: ast_ram_1p_cfg @@ -17543,6 +17989,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c2 index: -1 } @@ -17557,6 +18004,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: i2c2 index: -1 } @@ -17567,6 +18015,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: i2c2 default: "" end_idx: -1 @@ -17580,6 +18029,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pattgen default: "" end_idx: -1 @@ -17593,6 +18043,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_timer default: "" end_idx: -1 @@ -17606,6 +18057,7 @@ act: none width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl package: "" external: true @@ -17622,6 +18074,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq @@ -17637,6 +18090,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl external: true top_signame: otp_ctrl_otp_ast_pwr_seq_h @@ -17651,6 +18105,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: edn0_edn @@ -17665,6 +18120,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: pwrmgr_aon_pwr_otp index: -1 @@ -17678,6 +18134,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_vendor_test index: -1 @@ -17691,6 +18148,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_otp_program index: -1 @@ -17708,6 +18166,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -17727,6 +18186,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -17744,6 +18204,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_creator_seed_sw_rw_en index: -1 @@ -17761,6 +18222,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl index: -1 } @@ -17777,6 +18239,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_seed_hw_rd_en index: -1 @@ -17794,6 +18257,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_dft_en index: -1 @@ -17811,6 +18275,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otp_ctrl top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -17824,6 +18289,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_type: broadcast @@ -17839,6 +18305,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: flash_ctrl_otp index: -1 @@ -17852,6 +18319,7 @@ act: rsp width: 4 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: 3 top_type: partial-one-to-N @@ -17867,6 +18335,7 @@ act: rsp width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl end_idx: -1 top_signame: otp_ctrl_otbn_otp_key @@ -17881,6 +18350,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otp_ctrl top_signame: otp_ctrl_otp_broadcast index: -1 @@ -17893,6 +18363,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otp_ctrl default: "" top_signame: ast_obs_ctrl @@ -17905,6 +18376,7 @@ type: uni act: req width: 8 + class: InterSignal inst_name: otp_ctrl default: "" package: "" @@ -17920,6 +18392,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -17933,6 +18406,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otp_ctrl default: "" end_idx: -1 @@ -17946,6 +18420,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: pinmux_aon_lc_jtag @@ -17958,6 +18433,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -17970,6 +18446,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -17982,6 +18459,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_tx @@ -17994,6 +18472,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: alert_handler_esc_rx @@ -18006,6 +18485,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" top_signame: pwrmgr_aon_pwr_lc @@ -18019,6 +18499,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_vendor_test @@ -18032,6 +18513,7 @@ act: rcv width: 1 default: otp_ctrl_pkg::OTP_LC_DATA_DEFAULT + class: InterSignal inst_name: lc_ctrl top_signame: otp_ctrl_otp_lc_data index: -1 @@ -18044,6 +18526,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_signame: lc_ctrl_lc_otp_program @@ -18057,6 +18540,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: kmac_app index: 1 @@ -18069,6 +18553,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -18080,6 +18565,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18094,6 +18580,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18108,6 +18595,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18122,6 +18610,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18136,6 +18625,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18150,6 +18640,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18164,6 +18655,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18178,6 +18670,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18192,6 +18685,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18206,6 +18700,7 @@ act: rcv width: 2 default: lc_ctrl_pkg::On + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: one-to-N @@ -18220,6 +18715,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: flash_ctrl_rma_seed index: -1 @@ -18232,6 +18728,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18246,6 +18743,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18260,6 +18758,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18274,6 +18773,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18288,6 +18788,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18302,6 +18803,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18316,6 +18818,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl end_idx: -1 top_type: broadcast @@ -18330,6 +18833,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_device_id index: -1 @@ -18342,6 +18846,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl top_signame: lc_ctrl_otp_manuf_state index: -1 @@ -18354,6 +18859,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -18371,6 +18877,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: lc_ctrl package: "" end_idx: -1 @@ -18385,6 +18892,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl default: "" end_idx: -1 @@ -18398,6 +18906,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: lc_ctrl index: -1 } @@ -18408,6 +18917,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -18422,6 +18932,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: alert_handler default: "" top_signame: edn0_edn @@ -18434,6 +18945,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -18448,6 +18960,7 @@ type: uni act: req width: 4 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -18462,6 +18975,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: alert_handler default: "" end_idx: -1 @@ -18475,6 +18989,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" top_signame: spi_device_passthrough @@ -18491,6 +19006,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_host0 index: -1 } @@ -18501,6 +19017,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host0 default: "" end_idx: -1 @@ -18514,6 +19031,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host1 index: -1 } @@ -18528,6 +19046,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: spi_host1 index: -1 } @@ -18538,6 +19057,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: spi_host1 default: "" end_idx: -1 @@ -18551,6 +19071,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18566,6 +19087,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18581,6 +19103,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18596,6 +19119,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18611,6 +19135,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18626,6 +19151,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18641,6 +19167,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18656,6 +19183,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18671,6 +19199,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18686,6 +19215,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18701,6 +19231,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18716,6 +19247,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18731,6 +19263,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18746,6 +19279,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18761,6 +19295,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" package: "" @@ -18774,6 +19309,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: usbdev default: "" top_signame: ast_usb_ram_1p_cfg @@ -18786,6 +19322,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: usbdev index: -1 } @@ -18796,6 +19333,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: usbdev default: "" end_idx: -1 @@ -18809,6 +19347,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" external: true @@ -18823,6 +19362,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -18836,6 +19376,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -18849,6 +19390,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -18862,6 +19404,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -18875,6 +19418,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -18889,6 +19433,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_tx @@ -18901,6 +19446,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: alert_handler_esc_rx @@ -18913,6 +19459,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rv_core_ibex_pwrmgr @@ -18924,6 +19471,7 @@ type: uni act: rcv width: 6 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -18938,6 +19486,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -18952,6 +19501,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -18964,6 +19514,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -18978,6 +19529,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" package: "" @@ -18994,6 +19546,7 @@ act: rcv width: 1 default: rom_ctrl_pkg::PWRMGR_DATA_DEFAULT + class: InterSignal inst_name: pwrmgr_aon top_signame: rom_ctrl_pwrmgr_data index: -1 @@ -19005,6 +19558,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19019,6 +19573,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_dft_en @@ -19031,6 +19586,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -19043,6 +19599,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" top_signame: rstmgr_aon_sw_rst_req @@ -19055,6 +19612,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pwrmgr_aon default: "" end_idx: -1 @@ -19072,6 +19630,7 @@ type: uni act: rcv width: 2 + class: InterSignal inst_name: rstmgr_aon default: "" package: "" @@ -19091,6 +19650,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" package: pwrmgr_pkg @@ -19105,6 +19665,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_resets @@ -19118,6 +19679,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rstmgr_aon_rst_en @@ -19131,6 +19693,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: alert_handler_crashdump @@ -19144,6 +19707,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" top_signame: rv_core_ibex_crash_dump @@ -19157,6 +19721,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -19171,6 +19736,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rstmgr_aon default: "" end_idx: -1 @@ -19184,6 +19750,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_clocks @@ -19196,6 +19763,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: clkmgr_aon_cg_en @@ -19208,6 +19776,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_hw_debug_en @@ -19220,6 +19789,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19234,6 +19804,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19248,6 +19819,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19262,6 +19834,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19276,6 +19849,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19290,6 +19864,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19304,6 +19879,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_req @@ -19316,6 +19892,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" top_signame: lc_ctrl_lc_clk_byp_ack @@ -19328,6 +19905,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" external: true @@ -19341,6 +19919,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" package: pwrmgr_pkg @@ -19354,6 +19933,7 @@ type: uni act: rcv width: 4 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -19370,6 +19950,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: clkmgr_aon external: true top_signame: calib_rdy @@ -19383,6 +19964,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: clkmgr_aon default: "" end_idx: -1 @@ -19395,6 +19977,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sysrst_ctrl_aon default: "" package: "" @@ -19407,6 +19990,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sysrst_ctrl_aon default: "" package: "" @@ -19420,6 +20004,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sysrst_ctrl_aon default: "" end_idx: -1 @@ -19433,6 +20018,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: adc_ctrl_aon default: "" external: true @@ -19446,6 +20032,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: adc_ctrl_aon default: "" package: "" @@ -19459,6 +20046,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: adc_ctrl_aon default: "" end_idx: -1 @@ -19472,6 +20060,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pwm_aon default: "" end_idx: -1 @@ -19487,6 +20076,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -19500,6 +20090,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_dft_en index: -1 @@ -19517,6 +20108,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -19537,6 +20129,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon top_signame: lc_ctrl_lc_check_byp_en index: -1 @@ -19554,6 +20147,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: pinmux_aon end_idx: -1 top_type: broadcast @@ -19568,6 +20162,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -19582,6 +20177,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -19596,6 +20192,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: pinmux_aon default: "" top_signame: pinmux_aon_dft_jtag @@ -19610,6 +20207,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: pinmux_aon external: true top_signame: dft_strap_test @@ -19624,6 +20222,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: pinmux_aon package: "" external: true @@ -19639,6 +20238,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_low_power @@ -19652,6 +20252,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_strap @@ -19671,6 +20272,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: lc_ctrl_strap_en_override @@ -19684,6 +20286,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -19696,6 +20299,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -19709,6 +20313,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -19723,6 +20328,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" external: true @@ -19738,6 +20344,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" external: true @@ -19753,6 +20360,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -19765,6 +20373,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -19778,6 +20387,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: pinmux_aon default: "" package: "" @@ -19792,6 +20402,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: usbdev_usb_aon_bus_not_idle @@ -19805,6 +20416,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: usbdev_usb_aon_bus_reset @@ -19818,6 +20430,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" top_signame: usbdev_usb_aon_sense_lost @@ -19831,6 +20444,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: pinmux_aon package: "" end_idx: -1 @@ -19845,6 +20459,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: pinmux_aon default: "" end_idx: -1 @@ -19858,6 +20473,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" end_idx: -1 @@ -19872,6 +20488,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_wakeups @@ -19884,6 +20501,7 @@ act: req width: 1 default: 1'b0 + class: InterSignal inst_name: aon_timer_aon package: "" top_signame: pwrmgr_aon_rstreqs @@ -19897,6 +20515,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aon_timer_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -19907,6 +20526,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" package: "" @@ -19920,6 +20540,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aon_timer_aon default: "" end_idx: -1 @@ -19933,6 +20554,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: ast index: -1 } @@ -19943,6 +20565,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" external: true @@ -19957,6 +20580,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" external: true @@ -19972,6 +20596,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi4True + class: InterSignal inst_name: sensor_ctrl_aon external: true top_signame: ast_init_done @@ -19984,6 +20609,7 @@ type: uni act: rcv width: 9 + class: InterSignal inst_name: sensor_ctrl_aon default: "" package: "" @@ -19998,6 +20624,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" package: "" @@ -20012,6 +20639,7 @@ act: req width: 4 default: "'0" + class: InterSignal inst_name: sensor_ctrl_aon external: true top_signame: sensor_ctrl_manual_pad_attr @@ -20025,6 +20653,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sensor_ctrl_aon default: "" end_idx: -1 @@ -20038,6 +20667,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" top_signame: otp_ctrl_sram_otp_key @@ -20053,14 +20683,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon external: true top_signame: sram_ctrl_ret_aon_cfg @@ -20077,14 +20708,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -20096,6 +20728,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20108,6 +20741,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -20119,6 +20753,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_ret_aon index: -1 } @@ -20129,6 +20764,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -20142,6 +20778,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_ret_aon default: "" end_idx: -1 @@ -20155,6 +20792,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -20168,6 +20806,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_nvm_debug_en @@ -20180,6 +20819,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" external: true @@ -20193,6 +20833,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -20207,6 +20848,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -20221,6 +20863,7 @@ type: io act: none width: 2 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -20235,6 +20878,7 @@ type: io act: none width: 1 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -20250,6 +20894,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_creator_seed_sw_rw_en @@ -20262,6 +20907,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_owner_seed_sw_rw_en @@ -20274,6 +20920,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_iso_part_sw_rd_en @@ -20286,6 +20933,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_iso_part_sw_wr_en @@ -20298,6 +20946,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_seed_hw_rd_en @@ -20310,6 +20959,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_escalate_en @@ -20322,6 +20972,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_flash_rma_req @@ -20334,6 +20985,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: lc_ctrl_lc_flash_rma_ack @@ -20346,6 +20998,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -20360,6 +21013,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: pwrmgr_aon_pwr_flash @@ -20372,6 +21026,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -20386,6 +21041,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: flash_ctrl default: "" top_signame: ast_obs_ctrl @@ -20397,6 +21053,7 @@ type: uni act: req width: 8 + class: InterSignal inst_name: flash_ctrl default: "" package: "" @@ -20412,6 +21069,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -20425,6 +21083,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -20438,6 +21097,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: flash_ctrl default: "" end_idx: -1 @@ -20457,6 +21117,7 @@ act: rcv width: 1 default: "'0" + class: InterSignal inst_name: rv_dm index: -1 } @@ -20468,6 +21129,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" top_signame: pinmux_aon_rv_jtag @@ -20486,6 +21148,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -20503,6 +21166,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: lc_ctrl_lc_dft_en index: -1 @@ -20522,6 +21186,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm top_signame: pinmux_aon_pinmux_hw_debug_en index: -1 @@ -20534,6 +21199,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: rv_dm top_signame: rv_dm_otp_dis_rv_dm_late_debug index: -1 @@ -20550,6 +21216,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20560,6 +21227,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -20579,6 +21247,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20589,6 +21258,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" package: "" @@ -20610,6 +21280,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -20629,6 +21300,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: rv_dm index: -1 } @@ -20640,6 +21312,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20657,6 +21330,7 @@ act: rcv width: 1 default: 1'b0 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20667,6 +21341,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_dm default: "" top_signame: main_tl_rv_dm__sba @@ -20679,6 +21354,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -20692,6 +21368,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm default: "" end_idx: -1 @@ -20705,6 +21382,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_dm index: -1 } @@ -20714,6 +21392,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -20728,6 +21407,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic index: -1 } @@ -20737,6 +21417,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_plic default: "" package: "" @@ -20752,6 +21433,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_plic default: "" end_idx: -1 @@ -20765,6 +21447,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: clkmgr_aon_idle @@ -20778,6 +21461,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: aes top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20789,6 +21473,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: aes default: "" top_signame: edn0_edn @@ -20801,6 +21486,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: aes default: "" top_signame: keymgr_aes_key @@ -20813,6 +21499,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: aes default: "" end_idx: -1 @@ -20826,6 +21513,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: hmac default: "" top_signame: clkmgr_aon_idle @@ -20838,6 +21526,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: hmac default: "" end_idx: -1 @@ -20851,6 +21540,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: keymgr_kmac_key @@ -20866,13 +21556,14 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -20887,6 +21578,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: edn0_edn @@ -20899,6 +21591,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" top_signame: clkmgr_aon_idle @@ -20910,6 +21603,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: kmac default: "" package: "" @@ -20926,6 +21620,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: kmac top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -20937,6 +21632,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: kmac default: "" end_idx: -1 @@ -20951,6 +21647,7 @@ act: req width: 1 default: "'0" + class: InterSignal inst_name: otbn top_signame: otp_ctrl_otbn_otp_key index: -1 @@ -20962,6 +21659,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn1_edn @@ -20974,6 +21672,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: edn0_edn @@ -20986,6 +21685,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: clkmgr_aon_idle @@ -20998,6 +21698,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: ast_ram_1p_cfg @@ -21010,6 +21711,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: ast_ram_1p_cfg @@ -21022,6 +21724,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn index: -1 } @@ -21032,6 +21735,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: otbn index: -1 } @@ -21043,6 +21747,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -21055,6 +21760,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_flash_rma_req index: -1 @@ -21067,6 +21773,7 @@ act: req width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: otbn top_signame: lc_ctrl_lc_flash_rma_ack index: 1 @@ -21078,6 +21785,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: otbn default: "" top_signame: keymgr_otbn_key @@ -21090,6 +21798,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: otbn default: "" end_idx: -1 @@ -21103,6 +21812,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: edn0_edn @@ -21115,6 +21825,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -21129,6 +21840,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -21143,6 +21855,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -21157,6 +21870,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: kmac_app @@ -21169,6 +21883,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: otp_ctrl_otp_keymgr_key @@ -21181,6 +21896,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: keymgr_otp_device_id @@ -21193,6 +21909,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: flash_ctrl_keymgr @@ -21206,6 +21923,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::On + class: InterSignal inst_name: keymgr top_signame: lc_ctrl_lc_keymgr_en index: -1 @@ -21217,6 +21935,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: lc_ctrl_lc_keymgr_div @@ -21229,6 +21948,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" top_signame: rom_ctrl_keymgr_data @@ -21240,6 +21960,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: keymgr default: "" package: "" @@ -21253,6 +21974,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: keymgr default: "" end_idx: -1 @@ -21266,6 +21988,7 @@ type: req_rsp act: rsp width: 2 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -21280,6 +22003,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -21298,6 +22022,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -21312,6 +22037,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: csrng top_signame: csrng_otp_en_csrng_sw_app_read index: -1 @@ -21324,6 +22050,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: csrng top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -21335,6 +22062,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: csrng default: "" end_idx: -1 @@ -21348,6 +22076,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: entropy_src default: "" top_signame: csrng_entropy_src_hw_if @@ -21367,6 +22096,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: entropy_src default: "" top_signame: csrng_cs_aes_halt @@ -21379,6 +22109,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: entropy_src default: "" external: true @@ -21393,6 +22124,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: entropy_src index: -1 } @@ -21404,6 +22136,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: entropy_src index: -1 } @@ -21415,6 +22148,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8True + class: InterSignal inst_name: entropy_src index: -1 } @@ -21424,6 +22158,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: entropy_src default: "" package: "" @@ -21439,6 +22174,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: entropy_src default: "" end_idx: -1 @@ -21453,6 +22189,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn0 default: "" top_signame: csrng_csrng_cmd @@ -21474,6 +22211,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn0 end_idx: -1 top_type: one-to-N @@ -21487,6 +22225,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn0 default: "" end_idx: -1 @@ -21501,6 +22240,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: edn1 default: "" top_signame: csrng_csrng_cmd @@ -21522,6 +22262,7 @@ act: rsp width: 8 default: "'0" + class: InterSignal inst_name: edn1 end_idx: 1 top_type: partial-one-to-N @@ -21535,6 +22276,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: edn1 default: "" end_idx: -1 @@ -21548,6 +22290,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" top_signame: otp_ctrl_sram_otp_key @@ -21563,14 +22306,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main external: true top_signame: sram_ctrl_main_cfg @@ -21587,14 +22331,15 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } default: "'0" + class: InterSignal inst_name: sram_ctrl_main index: -1 } @@ -21606,6 +22351,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_escalate_en index: -1 @@ -21618,6 +22364,7 @@ act: rcv width: 1 default: lc_ctrl_pkg::Off + class: InterSignal inst_name: sram_ctrl_main top_signame: lc_ctrl_lc_hw_debug_en index: -1 @@ -21630,6 +22377,7 @@ act: rcv width: 1 default: prim_mubi_pkg::MuBi8False + class: InterSignal inst_name: sram_ctrl_main top_signame: sram_ctrl_main_otp_en_sram_ifetch index: -1 @@ -21641,6 +22389,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -21654,6 +22403,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: sram_ctrl_main default: "" end_idx: -1 @@ -21667,6 +22417,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rom_ctrl default: "" top_signame: ast_rom_cfg @@ -21679,6 +22430,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -21693,6 +22445,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -21707,6 +22460,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rom_ctrl default: "" top_signame: kmac_app @@ -21719,6 +22473,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -21732,6 +22487,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rom_ctrl default: "" end_idx: -1 @@ -21744,6 +22500,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -21754,6 +22511,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: ast_ram_1p_cfg @@ -21769,13 +22527,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -21786,6 +22545,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: ast_ram_1p_cfg @@ -21801,13 +22561,14 @@ { name: ICacheNWays desc: Number of instruction cache ways - param_type: int unsigned - unpacked_dimensions: null - default: 2 - local: false - expose: true + type: int unsigned name_top: RvCoreIbexICacheNWays + default: 2 + local: "false" + expose: "true" + class: Parameter } + class: InterSignal inst_name: rv_core_ibex index: -1 } @@ -21817,6 +22578,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21829,6 +22591,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21841,6 +22604,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21853,6 +22617,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21865,6 +22630,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21878,6 +22644,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_tx @@ -21890,6 +22657,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: alert_handler_esc_rx @@ -21901,6 +22669,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21914,6 +22683,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -21928,6 +22698,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: lc_ctrl_lc_cpu_en @@ -21940,6 +22711,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: pwrmgr_aon_fetch_en @@ -21952,6 +22724,7 @@ type: uni act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -21965,6 +22738,7 @@ type: uni act: rcv width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -21978,6 +22752,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: edn0_edn @@ -21990,6 +22765,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: otp_ctrl_sram_otp_key @@ -22001,6 +22777,7 @@ type: uni act: rcv width: 32 + class: InterSignal inst_name: rv_core_ibex default: "" package: "" @@ -22016,6 +22793,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__corei @@ -22028,6 +22806,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" top_signame: main_tl_rv_core_ibex__cored @@ -22040,6 +22819,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: rv_core_ibex default: "" end_idx: -1 @@ -22053,6 +22833,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -22066,6 +22847,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -22079,6 +22861,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -22092,6 +22875,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_regs_tl_d @@ -22104,6 +22888,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_dm_mem_tl_d @@ -22116,6 +22901,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl_rom_tl @@ -22128,6 +22914,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rom_ctrl_regs_tl @@ -22140,6 +22927,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" end_idx: -1 @@ -22153,6 +22941,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: spi_host0_tl @@ -22165,6 +22954,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: spi_host1_tl @@ -22177,6 +22967,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: usbdev_tl @@ -22189,6 +22980,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: flash_ctrl_core_tl @@ -22201,6 +22993,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: flash_ctrl_prim_tl @@ -22213,6 +23006,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: flash_ctrl_mem_tl @@ -22225,6 +23019,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: hmac_tl @@ -22237,6 +23032,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: kmac_tl @@ -22249,6 +23045,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: aes_tl @@ -22261,6 +23058,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: entropy_src_tl @@ -22273,6 +23071,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: csrng_tl @@ -22285,6 +23084,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn0_tl @@ -22297,6 +23097,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: edn1_tl @@ -22309,6 +23110,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_plic_tl @@ -22321,6 +23123,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: otbn_tl @@ -22333,6 +23136,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: keymgr_tl @@ -22345,6 +23149,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: rv_core_ibex_cfg_tl_d @@ -22357,6 +23162,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_regs_tl @@ -22369,6 +23175,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: main default: "" top_signame: sram_ctrl_main_ram_tl @@ -22381,6 +23188,7 @@ type: req_rsp act: rsp width: 1 + class: InterSignal inst_name: peri default: "" top_signame: main_tl_peri @@ -22393,6 +23201,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart0_tl @@ -22405,6 +23214,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart1_tl @@ -22417,6 +23227,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart2_tl @@ -22429,6 +23240,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: uart3_tl @@ -22441,6 +23253,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c0_tl @@ -22453,6 +23266,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c1_tl @@ -22465,6 +23279,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: i2c2_tl @@ -22477,6 +23292,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pattgen_tl @@ -22489,6 +23305,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pwm_aon_tl @@ -22501,6 +23318,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: gpio_tl @@ -22513,6 +23331,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: spi_device_tl @@ -22525,6 +23344,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rv_timer_tl @@ -22537,6 +23357,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pwrmgr_aon_tl @@ -22549,6 +23370,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: rstmgr_aon_tl @@ -22561,6 +23383,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: clkmgr_aon_tl @@ -22573,6 +23396,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: pinmux_aon_tl @@ -22585,6 +23409,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_core_tl @@ -22597,6 +23422,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: otp_ctrl_prim_tl @@ -22609,6 +23435,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: lc_ctrl_regs_tl @@ -22621,6 +23448,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sensor_ctrl_aon_tl @@ -22633,6 +23461,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: alert_handler_tl @@ -22645,6 +23474,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_regs_tl @@ -22657,6 +23487,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sram_ctrl_ret_aon_ram_tl @@ -22669,6 +23500,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: aon_timer_aon_tl @@ -22681,6 +23513,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: sysrst_ctrl_aon_tl @@ -22693,6 +23526,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" top_signame: adc_ctrl_aon_tl @@ -22705,6 +23539,7 @@ type: req_rsp act: req width: 1 + class: InterSignal inst_name: peri default: "" external: true @@ -22915,12 +23750,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlMainNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -22937,12 +23772,12 @@ { name: NumRamInst desc: Number of internal RAM instances. Must be the same as ceil(MemSizeRam / InstSize) . - param_type: int - unpacked_dimensions: null - default: 1 - local: false - expose: true + type: int name_top: SramCtrlRetAonNumRamInst + default: 1 + local: "false" + expose: "true" + class: Parameter } type: uni default: "'0" @@ -24143,12 +24978,12 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } type: req_rsp end_idx: -1 @@ -24164,12 +24999,12 @@ { name: NumAppIntf desc: Number of application interfaces - param_type: int - unpacked_dimensions: null - default: 3 - local: false - expose: true + type: int name_top: KmacNumAppIntf + default: 3 + local: "false" + expose: "true" + class: Parameter } type: req_rsp end_idx: -1 diff --git a/util/reggen/inter_signal.py b/util/reggen/inter_signal.py index d9d98a12a48905..a686de8fb069e5 100644 --- a/util/reggen/inter_signal.py +++ b/util/reggen/inter_signal.py @@ -90,8 +90,21 @@ def _asdict(self) -> Dict[str, object]: ret['width'] = self.width if self.default is not None: ret['default'] = self.default + ret['class'] = 'InterSignal' # This will let fromdict() know it has to create the class return ret + @classmethod + def fromdict(cls, item: Dict[str, object]) -> object: + if 'class' not in item or item['class'] == 'InterSignal': + return item + item["package"] = item.get("package", None) + item["default"] = item.get("default", None) + item["signal_type"] = item["type"] + del item["type"] + c = cls.__new__(cls) + c.__dict__.update(**item) + return c + def as_dict(self) -> Dict[str, object]: return self._asdict() diff --git a/util/reggen/params.py b/util/reggen/params.py index bd006224296d41..36a2173bb9bbf9 100644 --- a/util/reggen/params.py +++ b/util/reggen/params.py @@ -55,8 +55,29 @@ def as_dict(self) -> Dict[str, object]: rd['type'] = self.param_type if self.unpacked_dimensions is not None: rd['unpacked_dimensions'] = self.unpacked_dimensions + # topgen sometimes manually adds a 'name_top' field after creation. + if getattr(self, "name_top", None): + rd['name_top'] = getattr(self, "name_top") return rd + def _asdict(self) -> Dict[str, object]: + # Add an attribute to distinguished between manual serialization (as_dict()) + # or automatic by hjson. + d = self.as_dict() + d['class'] = self.__class__.__name__ + return d + + @classmethod + def fromdict(cls, param: Dict[str, object]) -> object: + param['desc'] = param.get('desc', None) + param['unpacked_dimensions'] = param.get('unpacked_dimensions', None) + del param['class'] + param['param_type'] = param['type'] + del param['type'] + c = cls.__new__(cls) + c.__dict__.update(**param) + return c + class LocalParam(BaseParam): def __init__(self, @@ -82,6 +103,12 @@ def as_dict(self) -> Dict[str, object]: rd['default'] = self.value return rd + @classmethod + def fromdict(cls, param: Dict[str, object]) -> object: + assert param['local'] + del param['local'] + return super().fromdict.__func__(cls, param) # type: ignore + class Parameter(BaseParam): def __init__(self, @@ -106,6 +133,12 @@ def as_dict(self) -> Dict[str, object]: rd['name_top'] = self.name_top return rd + @classmethod + def fromdict(cls, param: Dict[str, object]) -> object: + param['local'] = param['local'] == 'true' + param['expose'] = param['expose'] == 'true' + return super().fromdict.__func__(cls, param) # type: ignore + class RandParameter(BaseParam): def __init__(self, @@ -131,6 +164,10 @@ def as_dict(self) -> Dict[str, object]: rd['randtype'] = self.randtype return rd + @classmethod + def fromdict(cls, param: Dict[str, object]) -> object: + return super().fromdict.__func__(cls, param) # type: ignore + class MemSizeParameter(BaseParam): def __init__(self, diff --git a/util/topgen.py b/util/topgen.py index 34aeac5486f88c..da0819e32efa85 100755 --- a/util/topgen.py +++ b/util/topgen.py @@ -40,6 +40,7 @@ from topgen.resets import Resets from topgen.rust import TopGenRust from topgen.top import Top +from topgen.topcfg import CompleteTopCfg # Common header for generated files warnhdr = """// @@ -91,6 +92,9 @@ def ipgen_render(template_name: str, topname: str, params: Dict[str, object], log.error(e.verbose_str()) sys.exit(1) + # Remote extra topname + params.pop("topname") + def generate_top(top: Dict[str, object], name_to_block: Dict[str, IpBlock], tpl_filename: str, **kwargs: Dict[str, object]) -> None: @@ -907,6 +911,12 @@ def _process_top( return completecfg, name_to_block, name_to_hjson +def test_topcfg_loader(genhjson_path: Path, completecfg: Dict[str, object]): + loaded_cfg = CompleteTopCfg.from_path(genhjson_path) + + CompleteTopCfg.check_equivalent(completecfg, loaded_cfg) + + def _check_countermeasures(completecfg: Dict[str, object], name_to_block: Dict[str, IpBlock], name_to_hjson: Dict[str, Path]) -> bool: @@ -1211,6 +1221,10 @@ def main(): genhjson_path.write_text(genhdr + gencmd + hjson.dumps(completecfg, for_json=True, default=vars) + '\n') + # We also run a sanity check on the topcfg loader to make sure that it roundtrips + # correctly when loading. + test_topcfg_loader(genhjson_path, completecfg) + # Generate Rust toplevel definitions if not args.no_rust: generate_rust(topname, completecfg, name_to_block, out_path.resolve(), diff --git a/util/topgen/clocks.py b/util/topgen/clocks.py index 948f9072210f05..18b46b572a6392 100644 --- a/util/topgen/clocks.py +++ b/util/topgen/clocks.py @@ -20,6 +20,10 @@ def _bool_to_yn(val: bool) -> str: return 'yes' if val else 'no' +def _bool_from_yn(val: str) -> bool: + return val == 'yes' + + def _to_int(val: object) -> int: if isinstance(val, int): return val @@ -66,6 +70,14 @@ def _asdict(self) -> Dict[str, object]: 'ref': self.ref } + @classmethod + def fromdict(cls, src: Dict[str, object]) -> object: + src['aon'] = _bool_from_yn(src['aon']) + src['freq'] = int(src['freq']) + c = cls.__new__(cls) + c.__dict__.update(**src) + return c + class DerivedSourceClock(SourceClock): '''A derived source clock (divided down from some other clock).''' @@ -82,6 +94,12 @@ def _asdict(self) -> Dict[str, object]: ret['src'] = self.src.name return ret + @classmethod + def fromdict(cls, src: Dict[str, object], clocks: Dict[str, SourceClock]) -> object: + src['div'] = int(src['div']) + src['src'] = clocks[src['src']] + return super().fromdict.__func__(cls, src) + class ClockSignal: '''A clock signal in the design.''' @@ -141,6 +159,17 @@ def _asdict(self) -> Dict[str, object]: for name, sig in self.clocks.items()} } + @classmethod + def fromdict(cls, src: Dict[str, object], clocks: Dict[str, SourceClock]) -> object: + src['unique'] = _bool_from_yn(src['unique']) + src['clocks'] = { + name: ClockSignal(name, clocks[sig_src_name]) + for (name, sig_src_name) in src['clocks'].items() + } + c = cls.__new__(cls) + c.__dict__.update(**src) + return c + class GroupProxy: """ @@ -158,6 +187,14 @@ def _asdict(self): "name": self._grp.name } + @classmethod + def fromdict(cls, proxy: Dict[str, object], clocks: object) -> object: + proxy['_grp'] = clocks.groups[proxy["name"]] + del proxy["name"] + c = cls.__new__(cls) + c.__dict__.update(**proxy) + return c + class TypedClocks(NamedTuple): # External clocks that are consumed only inside the clkmgr and are fed from @@ -290,6 +327,25 @@ def _asdict(self) -> Dict[str, object]: 'groups': list(self.groups.values()) } + @classmethod + def fromdict(cls, clocks: Dict[str, object]) -> object: + clocks['srcs'] = { + src["name"]: SourceClock.fromdict(src) for src in clocks['srcs'] + } + clocks['derived_srcs'] = { + src["name"]: DerivedSourceClock.fromdict(src, clocks['srcs']) + for src in clocks['derived_srcs'] + } + clocks['all_srcs'] = clocks['srcs'].copy() + clocks['all_srcs'].update(clocks['derived_srcs']) + all_clocks = clocks['all_srcs'] + clocks['groups'] = { + src["name"]: Group.fromdict(src, all_clocks) for src in clocks['groups'] + } + c = cls.__new__(cls) + c.__dict__.update(clocks) + return c + def add_clock_to_group(self, grp: Group, clk_name: str, src_name: str) -> ClockSignal: src = self.all_srcs.get(src_name) diff --git a/util/topgen/merge.py b/util/topgen/merge.py index 71385d4e937229..8be13c72972f81 100644 --- a/util/topgen/merge.py +++ b/util/topgen/merge.py @@ -917,7 +917,7 @@ def append_to_lpg_dict(lpg_dict): 'clock_connection': clock, 'unmanaged_clock': unmanaged_clock, 'unmanaged_reset': is_unmanaged_reset(top, reset_name), - 'reset_connection': primary_reset + 'reset_connection': primary_reset, }) alert_group = module.get('outgoing_alert') diff --git a/util/topgen/resets.py b/util/topgen/resets.py index 12a776280f670c..02134b7d025e0f 100644 --- a/util/topgen/resets.py +++ b/util/topgen/resets.py @@ -68,6 +68,17 @@ def _asdict(self) -> Dict[str, object]: return ret + @classmethod + def fromdict(cls, item: Dict[str, object], clocks: Clocks) -> object: + # rst_type can be None which is serialized as "null", also the name is different + item["rst_type"] = None if item["type"] == "null" else item["type"] + del item["type"] + item["clock"] = clocks.get_clock_by_name(item["clock"]) + item["parent"] = item.get("parent", "") + c = cls.__new__(cls) + c.__dict__.update(**item) + return c + class Resets: '''Resets for the chip''' @@ -93,6 +104,16 @@ def _asdict(self) -> Dict[str, object]: return ret + @classmethod + def fromdict(cls, resets: Dict[str, object], clocks: Clocks) -> object: + # Reconstruct dict. + resets['nodes'] = { + node["name"]: ResetItem.fromdict(node, clocks) for node in resets['nodes'] + } + c = cls.__new__(cls) + c.__dict__.update(**resets) + return c + def get_reset_by_name(self, name: str) -> ResetItem: ret = self.nodes.get(name, None) @@ -240,6 +261,12 @@ def _asdict(self) -> Dict[str, object]: 'rst_en_signal_name': self.rst_en_signal_name } + @classmethod + def fromdict(cls, param: Dict[str, object]) -> object: + c = cls.__new__(cls) + c.__dict__.update(**param) + return c + class UnmanagedResets: '''Unmanaged reset connections for the chip.''' @@ -250,6 +277,16 @@ def __init__(self, raw: List[object]): def _asdict(self) -> Dict[str, object]: return self.resets + @classmethod + def fromdict(cls, resets: Dict[str, object]) -> object: + resets = { + 'resets': UnmanagedReset.fromdict(r) + for r in resets + } + c = cls.__new__(cls) + c.resets = resets + return c + def get(self, name: str) -> object: try: return self.resets[name] diff --git a/util/topgen/validate.py b/util/topgen/validate.py index 9fa164d10eb4f7..cee4166b474e84 100644 --- a/util/topgen/validate.py +++ b/util/topgen/validate.py @@ -344,7 +344,9 @@ def check_values(self): raise ValueError('flash number of banks and pages per bank too large') def _asdict(self): + # Do not include base_addrs as it will get removed later. return { + 'class': 'Flash', 'banks': self.banks, 'pages_per_bank': self.pages_per_bank, 'program_resolution': self.program_resolution, @@ -357,6 +359,17 @@ def _asdict(self): 'size': self.size } + @classmethod + def fromdict(cls, item: Dict[str, object]) -> object: + del item["class"] + item["word_bytes"] = int(item["data_width"] / 8) + item["words_per_page"] = int(item["bytes_per_page"] / item["word_bytes"]) + item["pages_per_bank"] = int(item["bytes_per_bank"] / item["bytes_per_page"]) + item["info_types"] = len(item["infos_per_bank"]) + c = cls.__new__(cls) + c.__dict__.update(**item) + return c + # Check to see if each module/xbar defined in top.hjson exists as ip/xbar.hjson # Also check to make sure there are not multiple definitions of ip/xbar.hjson for each