diff --git a/rtl/ibex_counter.sv b/rtl/ibex_counter.sv
index c78e510ee..a24870d43 100644
--- a/rtl/ibex_counter.sv
+++ b/rtl/ibex_counter.sv
@@ -55,8 +55,12 @@ module ibex_counter #(
   localparam int DspPragma = CounterWidth < 49 ? "yes" : "no";
   (* use_dsp = DspPragma *) logic [CounterWidth-1:0] counter_q;
 
-  // DSP output register requires synchronous reset.
-  `define COUNTER_FLOP_RST posedge clk_i
+  if (CounterWidth < 49) begin : g_sync_reset
+    // DSP output register requires synchronous reset.
+    `define COUNTER_FLOP_RST posedge clk_i
+  end else begin : g_async_reset
+    `define COUNTER_FLOP_RST posedge clk_i or negedge rst_ni
+  end
 `else
   logic [CounterWidth-1:0] counter_q;