citations.bib

@inproceedings{Agarwal07,
  title={{The Tile Processor: A 64-Core Multicore for Embedded Processing}},
  author={Agarwal, A.},
  booktitle={{11th Annual Workshop on High Performance Embedded Computing (HPEC)}},
  year={2007}
}

@inproceedings{Ascia04,
  title={{Multi-objective Mapping for Mesh-based NoC Architectures}},
  author={Ascia, Giuseppe and Catania, Vincenzo and Palesi, Maurizio},
  booktitle={{Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis}},
  pages={182--187},
  year={2004},
  organization={ACM}
}

@inproceedings{Ayari16,
  title={{Schedulability-Guided Exploration of Multi-core Systems}},
  author={Ayari, Rabeh and Hafnaoui, Imane and Beltrame, Giovanni and Nicolescu, Gabriela},
  booktitle={{Proceedings of the 27th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype}},
  pages={121--127},
  year={2016},
  organization={ACM}
}

@article{Deb02,
  title={{A Fast and Elitist Multiobjective Genetic Algorithm: NSGA-II}},
  author={Deb, Kalyanmoy and Pratap, Amrit and Agarwal, Sameer and Meyarivan, TAMT},
  journal={{IEEE Transactions on Evolutionary Computation}},
  volume={6},
  number={2},
  pages={182--197},
  year={2002},
  publisher={IEEE}
}

@inproceedings{Dinechin14,
  title={{Guaranteed Services of the NoC of a Manycore Processor}},
  author={de Dinechin, Beno{\^\i}t Dupont and Durand, Yves and Van Amstel, Duco and Ghiti, Alexandre},
  booktitle={{Proceedings of the 2014 International Workshop on Network on Chip Architectures}},
  pages={11--16},
  year={2014},
  organization={ACM}
}

@article{Indrusiak14,
  title={{End-to-End Schedulability Tests for Multiprocessor Embedded Systems based on Networks-on-Chip with Priority-Preemptive Arbitration}},
  author={Indrusiak, Leandro Soares},
  journal={{Journal of Systems Architecture}},
  volume={60},
  number={7},
  pages={553--561},
  year={2014},
  publisher={Elsevier}
}

@article{Indrusiak16,
  title={{Analysis of Buffering Effects on Hard Real-Time Priority-Preemptive Wormhole Networks}},
  author={Indrusiak, Leandro Soares and Burns, Alan and Nikolic, Borislav},
  journal={{arXiv:1606.02942}},
  year={2016}
}

@article{Kashif15,
  title={{SLA: A Stage-Level Latency Analysis for Real-Time Communication in a Pipelined Resource Model}},
  author={Kashif, Hany and Gholamian, Sina and Patel, Hiren},
  journal={{IEEE Transactions on Computers}},
  volume={64},
  number={4},
  pages={1177--1190},
  year={2014},
  publisher={IEEE}
}

@inproceedings{Mesidis11,
  title={{Genetic Mapping of Hard Real-Time Applications onto NoC-based MPSoCs -- A First Approach}},
  author={Mesidis, Paris and Indrusiak, Leandro Soares},
  booktitle={{6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)}},
  pages={1--6},
  year={2011},
  organization={IEEE}
}

@inproceedings{Nikolic13,
  title={{Are Virtual Channels the Bottleneck of Priority-Aware Wormhole-Switched NoC-Based Many-Cores?}},
  author={Nikoli{\'c}, Borislav and Ali, Hazem Ismail and Petters, Stefan M and Pinho, Lu{\'\i}s Miguel},
  booktitle={{Proceedings of the 21st International Conference on Real-Time Networks and Systems}},
  pages={13--22},
  year={2013},
  organization={ACM}
}

@article{Palesi11,
  title={{Data Encoding Schemes in Networks on Chip}},
  author={Palesi, Maurizio and Ascia, Giuseppe and Fazzino, Fabrizio and Catania, Vincenzo},
  journal={{IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}},
  volume={30},
  number={5},
  pages={774--786},
  year={2011},
  publisher={IEEE}
}

@inproceedings{Sayuti13,
  title={{Real-Time Low-Power Task Mapping in Networks-on-Chip}},
  author={Sayuti, M Norazizi Sham Mohd and Indrusiak, Leandro Soares},
  booktitle={{2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}},
  pages={14--19},
  year={2013},
  organization={IEEE}
}

@inproceedings{Shi08,
  title={{Real-Time Communication Analysis for On-Chip Networks with Wormhole Switching}},
  author={Shi, Zheng and Burns, Alan},
  booktitle={{Second ACM/IEEE International Symposium on Networks-on-Chip (NoCs 2008)}},
  pages={161--170},
  year={2008},
  organization={IEEE}
}

@article{Shi10,
  title={{Schedulability Analysis for Real Time On-Chip Communication with Wormhole Switching}},
  author={Shi, Zheng and Burns, Alan and Indrusiak, Leandro Soares},
  journal={{"International Journal of Embedded and Real-Time Communication Systems (IJERTCS)}},
  volume={1},
  number={2},
  year={2010},
  publisher={IGI Global}
}

@inproceedings{Singh13,
  title={{Mapping on Multi/Many-core Systems: Survey of Current and Emerging Trends}},
  author={Singh, Amit Kumar and Shafique, Muhammad and Kumar, Akash and Henkel, J{\"o}rg},
  booktitle={{2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)}},
  pages={1--10},
  year={2013},
  organization={IEEE}
}

@article{Tindell92,
  title={{Allocating Hard Real-Time Tasks: An NP-Hard Problem Made Easy}},
  author={Tindell, Ken W and Burns, Alan and Wellings, Andy J.},
  journal={{Real-Time Systems}},
  volume={4},
  number={2},
  pages={145--165},
  year={1992},
  publisher={Springer}
}

@article{Xiong17,
  title={{Extending Real-Time Analysis for Wormhole NoCs}},
  author={Xiong, Qin and Wu, Fei and Lu, Zhonghai and Xie, Changsheng},
  journal={{IEEE Transactions on Computers}},
  volume={66},
  number={9},
  pages={1532--1546},
  year={2017},
  publisher={IEEE}
}