From e719732b3f06f5859a9cd7e1ffb52bd7da88e522 Mon Sep 17 00:00:00 2001 From: Pierre-Olivier Vauboin Date: Mon, 18 Nov 2024 18:15:38 +0100 Subject: [PATCH] cores/lcd/ssd1306: detect bus error (device NAK) --- lambdalib/cores/lcd/ssd1306.py | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/lambdalib/cores/lcd/ssd1306.py b/lambdalib/cores/lcd/ssd1306.py index 6748096..5e432cd 100644 --- a/lambdalib/cores/lcd/ssd1306.py +++ b/lambdalib/cores/lcd/ssd1306.py @@ -45,6 +45,7 @@ def __init__(self): ("data", 8), ]) self.source = stream.Endpoint(i2c_stream_description) + self.i2c_error = Signal() def elaborate(self, platform): sink = self.sink @@ -62,7 +63,10 @@ def elaborate(self, platform): source.valid.eq(sink.valid), ] with m.If(source.valid & source.ready): - m.next = "CONTROL" + with m.If(self.i2c_error): + m.next = "ERROR" + with m.Else(): + m.next = "CONTROL" with m.State("CONTROL"): m.d.comb += [ @@ -85,6 +89,13 @@ def elaborate(self, platform): with m.If(source.valid & source.ready & source.last): m.next = "ADDR" + with m.State("ERROR"): + # The I2C target device is not present on the bus (NAK) + # drop the sink until `last`. + m.d.comb += sink.ready.eq(1) + with m.If(sink.valid & sink.last): + m.next = "ADDR" + return m @@ -132,6 +143,7 @@ def __init__(self, width, height, por_init=True): self.sink = stream.Endpoint([("data", 8)]) self.source = stream.Endpoint(i2c_stream_description) + self.i2c_error = Signal() def elaborate(self, platform): sink = self.sink @@ -183,6 +195,7 @@ def elaborate(self, platform): # Instanciate the I2C address and control byte wrapper m.submodules.wrapper = wrapper = SSD1306_Wrapper() m.d.comb += wrapper.source.connect(source) + m.d.comb += wrapper.i2c_error.eq(self.i2c_error) cnt = Signal(range(self._size))