The cpu of k210 can not halt at reset vector through JTAG?

[D0ot]

A problem about debugging through JTAG.

I find this in OpenOCD documentation

In the best case, OpenOCD can hold SRST, then reset the TAPs via TRST and send
commands through JTAG to halt the CPU at the reset vector before the 1st instruction
is executed. Then when it finally releases the SRST signal, the system is halted under
debugger control before any code has executed. This is the behavior required to support
the reset halt and reset init commands; after reset init a board-specific script might
do things like setting up DRAM. (See [Reset Command], page 122.)

it seems that the best case above does not applies to K210.

when the SRST is low, the OpenOCD can not commuicate with the cpu.

GDB oupput when type montor reset halt

Reading symbols from hello_world...
(gdb) target remote localhost:3333
Remote debugging using localhost:3333
core1_function (ctx=<optimized out>) at /home/xxxx/projects/k210helloworld/src/hello_world/main.c:22
22	    while(1);
(gdb) monitor reset halt
JTAG scan chain interrogation failed: all ones
Check JTAG interface, timings, target power, etc.
Trying to use configured scan chain anyway...
Bypassing JTAG setup events due to errors

and the cpu is not reseted.

is there any way to make cpu halt at reset?

thanks.

[D0ot]

My adapter is a FT4232H breakout and the board is maix bit v2. The other debug features(breakpoint step display etc. )function.

The nSRST singal in OpenOCD is correctly define. because I can type monitor jtag arp_init-reset to reset the board without halt.

So my hardware should be fine.

[D0ot]

it seems that writing 1 to ndreset bit of DCSR takes no effect... Is it a hardware bug of k210?

RISC-V External Debug Support Version 0.11