| layout | title | permalink |
|---|---|---|
page |
Q34774: FWAIT Prefixes Generated for Processor Control Instructions |
/pubs/pc/reference/microsoft/kb/Q34774/ |
Article: Q34774
Version(s): 5.10 | 5.10
Operating System: MS-DOS | OS/2
Flags: ENDUSER | buglist5.10
Last Modified: 12-JAN-1989
For a 80287 or 80387, MASM should not be generating FWAIT prefixes for
processor control instructions that do not have no-wait forms,
including the following:
FLDCW, FLDENV, FRSTOR, FINCSTP, FDECSTP, FFREE, and FNOP.
The following is an example of the wait incorrectly generated by MASM for
the FLDCW instruction:
.386
.387
.model small
.data
d1 dw 0
.code
fldcw d1
end
The fldcw generates the opcodes "9B D9 2D" when it should only
generate "D9 2D" without the "9B" wait.
Microsoft has confirmed this to be problem in Version 5.10. We are
researching this problem and will post new information as it becomes
available.