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chipset.js
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/**
* @fileoverview Implements the PCx86 ChipSet component
* @author <a href="mailto:[email protected]">Jeff Parsons</a>
* @copyright © 2012-2019 Jeff Parsons
*
* This file is part of PCjs, a computer emulation software project at <https://www.pcjs.org>.
*
* PCjs is free software: you can redistribute it and/or modify it under the terms of the
* GNU General Public License as published by the Free Software Foundation, either version 3
* of the License, or (at your option) any later version.
*
* PCjs is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without
* even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with PCjs. If not,
* see <http://www.gnu.org/licenses/gpl.html>.
*
* You are required to include the above copyright notice in every modified copy of this work
* and to display that copyright notice when the software starts running; see COPYRIGHT in
* <https://www.pcjs.org/modules/shared/lib/defines.js>.
*
* Some PCjs files also attempt to load external resource files, such as character-image files,
* ROM files, and disk image files. Those external resource files are not considered part of PCjs
* for purposes of the GNU General Public License, and the author does not claim any copyright
* as to their contents.
*/
"use strict";
if (typeof module !== "undefined") {
var Str = require("../../shared/lib/strlib");
var Usr = require("../../shared/lib/usrlib");
var Web = require("../../shared/lib/weblib");
var Component = require("../../shared/lib/component");
var State = require("../../shared/lib/state");
var PCX86 = require("./defines");
var Interrupts = require("./interrupts");
var Keyboard = require("./keyboard");
var Messages = require("./messages");
var X86 = require("./x86");
}
/**
* @typedef {Object} Timer
* @property {Array.<number>} countInit
* @property {Array.<number>} countStart
* @property {Array.<number>} countCurrent
* @property {Array.<number>} countLatched
* @property {number} bcd (CTRL.BCD: bit 0)
* @property {number} mode (CTRL.MODE: bits 1-3)
* @property {number} rw (CTRL.RW: bits 4-5)
* @property {number} countIndex
* @property {number} countBytes
* @property {boolean} fOUT
* @property {boolean} fCountLatched
* @property {boolean} fCounting
* @property {number} nCyclesStart
* @property {number} bStatus
* @property {boolean} fStatusLatched
*/
/**
* class ChipSet
* @unrestricted (allows the class to define properties, both dot and named, outside of the constructor)
*/
class ChipSet extends Component {
/**
* ChipSet(parmsChipSet)
*
* The ChipSet component has the following component-specific (parmsChipSet) properties:
*
* model: eg, "5150", "5160", "5170", "deskpro386" (should be a member of ChipSet.MODELS)
* sw1: 8-character binary string representing the SW1 DIP switches (SW1[1-8]); see Switches Overview
* sw2: 8-character binary string representing the SW2 DIP switches (SW2[1-8]) (MODEL_5150 only)
* sound: true (or non-zero) to enable sounds (default), false (or 0) to disable; number used as initial volume
* scaleTimers: true to divide timer cycle counts by the CPU's cycle multiplier (default is false)
* floppies: array of floppy drive sizes in Kb (default is "[360, 360]" if no sw1 value provided)
* monitor: none|tv|color|mono|ega|vga (if no sw1 value provided, default is "ega" for 5170, "mono" otherwise)
* dateRTC: optional RTC date/time (in GMT) to use on reset; use the ISO 8601 format; eg: "2014-10-01T08:00:00"
*
* TODO: As support for IBM-compatible machines grows, we should refrain from adding new model strings (eg, "att6300")
* and corresponding model checks, and instead add more ChipSet configuration properties, such as:
*
* portPIT1: 0x48 to enable PIT1 at base port 0x48 (as used by COMPAQ_DESKPRO386); default to undefined
* chipKBD: 8041 to select 8041 emulation (eg, for ATT_6300); default to 8255 for MODEL_5150/MODEL_5160, 8042 for MODEL_5170
*
* @this {ChipSet}
* @param {Object} parmsChipSet
*/
constructor(parmsChipSet)
{
super("ChipSet", parmsChipSet, Messages.CHIPSET);
let model = parmsChipSet['model'];
/*
* this.model is a numeric version of the 'model' string; when comparing this.model to standard IBM
* model numbers, you should generally compare (this.model|0) to the target value, which truncates it.
*/
if (model && !ChipSet.MODELS[model]) {
Component.notice("Unrecognized ChipSet model: " + model);
}
this.model = ChipSet.MODELS[model] || ChipSet.MODEL_5150_OTHER;
let bSwitches;
this.aDIPSwitches = [];
/*
* SW1 describes the number of floppy drives, the amount of base memory, the primary monitor type,
* and (on the MODEL_5160) whether or not a coprocessor is installed. If no SW1 settings are provided,
* we look for individual 'floppies' and 'monitor' settings and build a default SW1 value.
*
* The defaults below select max memory, monochrome monitor (EGA monitor for MODEL_5170), and two floppies.
* Don't get too excited about "max memory" either: on a MODEL_5150, the max was 64Kb, and on a MODEL_5160,
* the max was 256Kb. However, the RAM component is free to install as much base memory as it likes,
* overriding the SW1 memory setting.
*
* Given that the ROM BIOS is hard-coded to load boot sectors @0000:7C00, the minimum amount of system RAM
* required to boot is therefore 32Kb. Whether that's actually enough to run any or all versions of PC-DOS is
* a separate question. FYI, with only 16Kb, the ROM BIOS will still try to boot, and fail miserably.
*/
bSwitches = this.parseDIPSwitches(parmsChipSet[ChipSet.CONTROLS.SW1]);
this.aDIPSwitches[0] = [bSwitches, bSwitches];
if (bSwitches == null) {
this.aFloppyDrives = [360, 360];
let aFloppyDrives = parmsChipSet['floppies'];
if (aFloppyDrives && aFloppyDrives.length) this.aFloppyDrives = aFloppyDrives;
this.setDIPSwitches(ChipSet.SWITCH_TYPE.FLOPNUM, this.aFloppyDrives.length);
let sMonitor = parmsChipSet['monitor'] || (this.model < ChipSet.MODEL_5170? "mono" : "ega");
this.setDIPSwitches(ChipSet.SWITCH_TYPE.MONITOR, sMonitor);
}
/*
* SW2 describes the number of 32Kb blocks of I/O expansion RAM that's present in the system. The MODEL_5150
* ROM BIOS only checked/supported the first four switches, so the maximum amount of additional RAM specifiable
* was 15 * 32Kb, or 480Kb. So with a 16Kb-64Kb motherboard, the MODEL_5150 ROM BIOS could support a grand
* total of 544Kb. With the 64Kb-256Kb motherboard revision, a 5150 could use the first FIVE SW2 switches,
* allowing for a grand total as high as 640Kb.
*
* For MODEL_5160 (PC XT) and up, memory expansion cards had their own switches, and the motherboard
* SW2 switches for I/O expansion RAM were eliminated. Instead, the ROM BIOS scans the entire address space
* (up to 0xA0000) looking for additional memory. As a result, the only mechanism we provide for adding RAM
* (above the maximum of 256Kb supported on the motherboard) is the "size" parameter of the RAM component.
*
* NOTE: If you use the "size" parameter, you will not be able to dynamically alter the memory configuration;
* the RAM component will ignore any changes to SW1.
*/
bSwitches = this.parseDIPSwitches(parmsChipSet[ChipSet.CONTROLS.SW2]);
this.aDIPSwitches[1] = [bSwitches, bSwitches];
this.sCellClass = PCX86.CSSCLASS + "-bitCell";
this.cDMACs = this.cPICs = 1;
if (this.model >= ChipSet.MODEL_5170) {
this.cDMACs = this.cPICs = 2;
}
this.fScaleTimers = parmsChipSet['scaleTimers'] || false;
this.sDateRTC = parmsChipSet['dateRTC'];
/*
* Here, I'm finally getting around to trying the Web Audio API. Fortunately, based on what little
* I know about sound generation, using the API to make the same noises as the IBM PC speaker seems
* straightforward.
*
* To start, we create an audio context, unless the 'sound' parameter has been explicitly set to false
* or 0; the boolean value true (along with any illegal number) now defaults to 0.5 instead of 1.0.
*/
this.volumeInit = 0;
let sound = parmsChipSet['sound'];
if (sound) {
this.volumeInit = (typeof sound != "number" || sound < 0 || sound > 1)? 0.5 : sound;
this.classAudio = this.contextAudio = null;
if (window) {
this.classAudio = window['AudioContext'] || window['webkitAudioContext'];
}
if (this.classAudio) {
this.contextAudio = new this.classAudio();
} else {
if (DEBUG) this.log("AudioContext not available");
}
}
/*
* fSpeakerEnabled indicates whether the speaker is *logically* on, whereas fSpeakerOn indicates
* whether we have ACTUALLY turned the speaker on. And finally, fUserSound is set to true only after
* we have have created the audio oscillator in the context of a user event (a requirement for most
* browsers before they'll actually emit any sound).
*/
this.fSpeakerEnabled = this.fSpeakerOn = this.fUserSound = false;
/*
* I used to defer ChipSet's reset() to powerUp(), which then gave us the option of doing either
* reset() OR restore(), instead of both. However, on MODEL_5170 machines, the initial CMOS data
* needs to be created earlier, so that when other components are initializing their state (eg, when
* HDC calls setCMOSDriveType() or RAM calls addCMOSMemory()), the CMOS will be ready to take their calls.
*/
this.reset(true);
}
/**
* initBus(cmp, bus, cpu, dbg)
*
* @this {ChipSet}
* @param {Computer} cmp
* @param {Bus} bus
* @param {CPUX86} cpu
* @param {DebuggerX86} dbg
*/
initBus(cmp, bus, cpu, dbg)
{
this.bus = bus;
this.cpu = cpu;
this.dbg = dbg;
this.cmp = cmp;
this.fpu = cmp.getMachineComponent("FPU");
this.setDIPSwitches(ChipSet.SWITCH_TYPE.FPU, this.fpu? 1 : 0, true);
this.kbd = cmp.getMachineComponent("Keyboard");
let sound = cmp.getMachineParm('sound');
if (sound != null) {
let volume = +sound || 0;
this.volumeInit = (sound == "true" || volume < 0 || volume > 1? 0.5 : volume);
}
if (!this.volumeInit) this.println("note: speaker disabled");
/*
* This divisor is invariant, so we calculate it as soon as we're able to query the CPU's base speed.
*/
this.nTicksDivisor = (cpu.getBaseCyclesPerSecond() / ChipSet.TIMER_TICKS_PER_SEC);
bus.addPortInputTable(this, ChipSet.aPortInput);
bus.addPortOutputTable(this, ChipSet.aPortOutput);
if (this.model == ChipSet.MODEL_4860) {
bus.addPortInputTable(this, ChipSet.aPortInput4860);
bus.addPortOutputTable(this, ChipSet.aPortOutput4860);
}
else {
bus.addPortInputTable(this, ChipSet.aPortInput5xxx);
bus.addPortOutputTable(this, ChipSet.aPortOutput5xxx);
if (this.model < ChipSet.MODEL_5170) {
if (this.model == ChipSet.MODEL_ATT_6300) {
bus.addPortInputTable(this, ChipSet.aPortInput6300);
bus.addPortOutputTable(this, ChipSet.aPortOutput6300);
} else {
bus.addPortInputTable(this, ChipSet.aPortInput5150);
bus.addPortOutputTable(this, ChipSet.aPortOutput5150);
}
} else {
bus.addPortInputTable(this, ChipSet.aPortInput5170);
bus.addPortOutputTable(this, ChipSet.aPortOutput5170);
if (DESKPRO386 && (this.model|0) == ChipSet.MODEL_COMPAQ_DESKPRO386) {
bus.addPortInputTable(this, ChipSet.aPortInputDeskPro386);
bus.addPortOutputTable(this, ChipSet.aPortOutputDeskPro386);
}
}
}
if (DEBUGGER) {
if (dbg) {
let chipset = this;
/*
* TODO: Add more "dumpers" (eg, for DMA, RTC, 8042, etc)
*/
dbg.messageDump(Messages.PIC, function onDumpPIC() {
chipset.dumpPIC();
});
dbg.messageDump(Messages.TIMER, function onDumpTimer(asArgs) {
chipset.dumpTimer(asArgs);
});
if (this.model >= ChipSet.MODEL_5170) {
dbg.messageDump(Messages.CMOS, function onDumpCMOS() {
chipset.dumpCMOS();
});
}
}
cpu.addIntNotify(Interrupts.TIMER, this.intBIOSTimer.bind(this));
}
this.setReady();
}
/**
* setBinding(sHTMLType, sBinding, control, sValue)
*
* @this {ChipSet}
* @param {string} sHTMLType is the type of the HTML control (eg, "button", "list", "text", "submit", "textarea", "canvas")
* @param {string} sBinding is the value of the 'binding' parameter stored in the HTML control's "data-value" attribute (eg, "sw1")
* @param {HTMLElement} control is the HTML control DOM object (eg, HTMLButtonElement)
* @param {string} [sValue] optional data value
* @return {boolean} true if binding was successful, false if unrecognized binding request
*/
setBinding(sHTMLType, sBinding, control, sValue)
{
switch (sBinding) {
case ChipSet.CONTROLS.SW1:
this.bindings[sBinding] = control;
this.addDIPSwitches(0, sBinding);
return true;
case ChipSet.CONTROLS.SW2:
if ((this.model|0) == ChipSet.MODEL_5150 || this.model == ChipSet.MODEL_ATT_6300) {
this.bindings[sBinding] = control;
this.addDIPSwitches(1, sBinding);
return true;
}
break;
case ChipSet.CONTROLS.SWDESC:
this.bindings[sBinding] = control;
return true;
default:
break;
}
return false;
}
/**
* powerUp(data, fRepower)
*
* @this {ChipSet}
* @param {Object|null} data
* @param {boolean} [fRepower]
* @return {boolean} true if successful, false if failure
*/
powerUp(data, fRepower)
{
if (!fRepower) {
if (!data) {
this.reset();
} else {
if (!this.restore(data)) return false;
}
}
return true;
}
/**
* powerDown(fSave, fShutdown)
*
* @this {ChipSet}
* @param {boolean} [fSave]
* @param {boolean} [fShutdown]
* @return {Object|boolean} component state if fSave; otherwise, true if successful, false if failure
*/
powerDown(fSave, fShutdown)
{
return fSave? this.save() : true;
}
/**
* reset(fHard)
*
* @this {ChipSet}
* @param {boolean} [fHard] true on the initial reset (not a normal "soft" reset)
*/
reset(fHard)
{
/*
* We propagate the initial DIP switch values to the current DIP switch values on reset;
* the user is only allowed to tweak the initial values, which require a reset to take effect.
*/
let i;
this.updateDIPSwitches();
/*
* DMA (Direct Memory Access) Controller initialization
*/
this.aDMACs = new Array(this.cDMACs);
for (i = 0; i < this.cDMACs; i++) {
this.initDMAController(i);
}
/*
* PIC (Programmable Interupt Controller) initialization
*/
this.aPICs = new Array(this.cPICs);
this.initPIC(ChipSet.PIC0.INDEX, ChipSet.PIC0.PORT_LO);
if (this.cPICs > 1) {
this.initPIC(ChipSet.PIC1.INDEX, ChipSet.PIC1.PORT_LO);
}
/*
* PIT (Programmable Interval Timer) initialization
*
* Although the DeskPro 386 refers to the timers in the first PIT as "Timer 1, Counter 0",
* "Timer 1, Counter 1" and "Timer 1, Counter 2", we're sticking with IBM's nomenclature:
* TIMER0, TIMER1 and TIMER2. Which means that we refer to the "counters" in the second PIT
* as TIMER3, TIMER4 and TIMER5; that numbering also matches their indexes in the aTimers array.
*/
this.bPIT0Ctrl = null; // tracks writes to port 0x43
this.bPIT1Ctrl = null; // tracks writes to port 0x4B (MODEL_COMPAQ_DESKPRO386 only)
this.aTimers = /** @type {Array.<Timer>} */ (new Array((this.model|0) == ChipSet.MODEL_COMPAQ_DESKPRO386? 6 : 3));
for (i = 0; i < this.aTimers.length; i++) {
this.initTimer(i);
}
/*
* PPI and other misc ports
*/
this.bPPIA = null; // tracks writes to port 0x60, in case PPI_CTRL.A_IN is not set
this.bPPIB = null; // tracks writes to port 0x61, in case PPI_CTRL.B_IN is not set
this.bPPIC = null; // tracks writes to port 0x62, in case PPI_CTRL.C_IN_LO or PPI_CTRL.C_IN_HI is not set
this.bPPICtrl = null; // tracks writes to port 0x63 (eg, 0x99); read-only
this.bNMI = ChipSet.NMI.RESET; // tracks writes to the NMI Mask Register
this.bKbdData = 0; // records last byte received via receiveKbdData(); for machines without an 8042 (eg, PC/PC XT/PCjr)
if (this.model == ChipSet.MODEL_ATT_6300) {
this.b8041Status = 0; // similar to b8042Status (but apparently only bits 0 and 1 are used)
}
/*
* ChipSet state introduced by the MODEL_5170
*/
if (this.model >= ChipSet.MODEL_5170) {
/*
* The 8042 input buffer is treated as a "command byte" when written via port 0x64 and as a "data byte"
* when written via port 0x60. So, whenever the C8042.CMD.WRITE_CMD "command byte" is written to the input
* buffer, the subsequent command data byte is saved in b8042CmdData. Similarly, for C8042.CMD.WRITE_OUTPORT,
* the subsequent data byte is saved in b8042OutPort.
*
* TODO: Consider a UI for the Keyboard INHIBIT switch. By default, our keyboard is never inhibited
* (ie, locked). Also, note that the hardware changes this bit only when new data is sent to b8042OutBuff.
*/
this.b8042Status = ChipSet.C8042.STATUS.NO_INHIBIT;
this.b8042InBuff = 0;
this.b8042CmdData = ChipSet.C8042.DATA.CMD.NO_CLOCK;
this.b8042OutBuff = 0;
/*
* TODO: Provide more control over these 8042 "Input Port" bits (eg, the keyboard lock)
*/
this.b8042InPort = ChipSet.C8042.INPORT.MFG_OFF | ChipSet.C8042.INPORT.KBD_UNLOCKED;
if (this.getDIPMemorySize() >= 512) {
this.b8042InPort |= ChipSet.C8042.INPORT.ENABLE_256KB;
}
if (this.getDIPVideoMonitor() == ChipSet.MONITOR.MONO) {
this.b8042InPort |= ChipSet.C8042.INPORT.MONO;
}
if (DESKPRO386 && (this.model|0) == ChipSet.MODEL_COMPAQ_DESKPRO386) {
this.b8042InPort |= ChipSet.C8042.INPORT.COMPAQ_NO80387 | ChipSet.C8042.INPORT.COMPAQ_NOWEITEK;
}
this.b8042OutPort = ChipSet.C8042.OUTPORT.NO_RESET | ChipSet.C8042.OUTPORT.A20_ON;
this.abDMAPageSpare = new Array(8);
this.bCMOSAddr = 0; // NMI is enabled, since the ChipSet.CMOS.ADDR.NMI_DISABLE bit is not set in bCMOSAddr
/*
* Now that we call reset() from the ChipSet constructor, enabling other components to update
* their own CMOS information as needed, we must distinguish between the initial ("hard") reset
* and any later ("soft") resets (eg, from powerUp() calls), and make sure the latter preserves
* existing CMOS information.
*/
if (fHard) {
this.abCMOSData = new Array(ChipSet.CMOS.ADDR.TOTAL);
}
this.initRTCTime(this.sDateRTC);
/*
* initCMOSData() will initialize a variety of "legacy" CMOS bytes, but it will NOT overwrite any memory
* size or hard drive type information that might have been set, via addCMOSMemory() or setCMOSDriveType().
*/
this.initCMOSData();
}
if (DEBUGGER && MAXDEBUG) {
/*
* Arrays for interrupt counts (one count per IRQ) and timer data
*/
this.acInterrupts = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0];
this.acTimersFired = [0, 0, 0];
this.acTimer0Counts = [];
}
}
/**
* initRTCTime(sDate)
*
* Initialize the RTC portion of the CMOS registers to match the specified date/time (or if none is specified,
* the current date/time). The date/time should be expressed in the ISO 8601 format; eg: "2011-10-10T14:48:00".
*
* NOTE: There are two approaches we could take here: always store the RTC bytes in binary, and convert them
* to/from BCD on-demand (ie, as the simulation reads/writes the CMOS RTC registers); or init/update them in the
* format specified by CMOS.STATUSB.BINARY (1 for binary, 0 for BCD). Both approaches require BCD conversion
* functions, but the former seems more efficient, in part because the periodic calls to updateRTCTime() won't
* require any conversions.
*
* We take the same approach with the CMOS.STATUSB.HOUR24 setting: internally, we always operate in 24-hour mode,
* but externally, we convert the RTC hour values to the 12-hour format as needed.
*
* Thus, all I/O to the RTC bytes must be routed through the getRTCByte() and setRTCByte() functions, to ensure
* that all the necessary on-demand conversions occur.
*
* @this {ChipSet}
* @param {string} [sDate]
*/
initRTCTime(sDate)
{
/*
* NOTE: I've already been burned once by a JavaScript library function that did NOT treat an undefined
* parameter (ie, a parameter === undefined) the same as an omitted parameter (eg, the async parameter in
* xmlHTTP.open() in IE), so I'm taking no chances here: if sDate is undefined, then explicitly call Date()
* with no parameters.
*/
let date = sDate? new Date(sDate) : new Date();
/*
* Example of a valid Date string:
*
* 2014-10-01T08:00:00 (interpreted as GMT, resulting in "Wed Oct 01 2014 01:00:00 GMT-0700 (PDT)")
*
* Examples of INVALID Date strings:
*
* 2014-10-01T08:00:00PST
* 2014-10-01T08:00:00-0700 (actually, this DOES work in Chrome, but NOT in Safari)
*
* In the case of INVALID Date strings, the Date object is invalid, but there's no obvious test for an "invalid"
* object, so I've adapted the following test from StackOverflow.
*
* See http://stackoverflow.com/questions/1353684/detecting-an-invalid-date-date-instance-in-javascript
*/
if (Object.prototype.toString.call(date) !== "[object Date]" || isNaN(date.getTime())) {
date = new Date();
this.println("CMOS date invalid (" + sDate + "), using " + date);
} else if (sDate) {
this.println("CMOS date: " + date);
}
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_SEC] = date.getSeconds();
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_SEC_ALRM] = 0;
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MIN] = date.getMinutes();
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MIN_ALRM] = 0;
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_HOUR] = date.getHours();
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_HOUR_ALRM] = 0;
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_WEEK_DAY] = date.getDay() + 1;
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH_DAY] = date.getDate();
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH] = date.getMonth() + 1;
let nYear = date.getFullYear();
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_YEAR] = nYear % 100;
let nCentury = (nYear / 100);
this.abCMOSData[ChipSet.CMOS.ADDR.CENTURY_DATE] = (nCentury % 10) | ((nCentury / 10) << 4);
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSA] = 0x26; // hard-coded default; refer to ChipSet.CMOS.STATUSA.DV and ChipSet.CMOS.STATUSA.RS
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] = ChipSet.CMOS.STATUSB.HOUR24; // default to BCD mode (ChipSet.CMOS.STATUSB.BINARY not set)
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] = 0x00;
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSD] = ChipSet.CMOS.STATUSD.VRB;
this.nRTCCyclesLastUpdate = this.nRTCCyclesNextUpdate = 0;
this.nRTCPeriodsPerSecond = this.nRTCCyclesPerPeriod = null;
}
/**
* getRTCByte(iRTC)
*
* @param {number} iRTC
* @return {number} b
*/
getRTCByte(iRTC)
{
this.assert(iRTC >= 0 && iRTC <= ChipSet.CMOS.ADDR.STATUSD);
let b = this.abCMOSData[iRTC];
if (iRTC < ChipSet.CMOS.ADDR.STATUSA) {
let f12HourValue = false;
if (iRTC == ChipSet.CMOS.ADDR.RTC_HOUR || iRTC == ChipSet.CMOS.ADDR.RTC_HOUR_ALRM) {
if (!(this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.HOUR24)) {
if (b < 12) {
b = (!b? 12 : b);
} else {
b -= 12;
b = (!b? 0x8c : b + 0x80);
}
f12HourValue = true;
}
}
if (!(this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.BINARY)) {
/*
* We're in BCD mode, so we must convert b from BINARY to BCD. But first:
*
* If b is a 12-hour value (ie, we're in 12-hour mode) AND the hour is a PM value
* (ie, in the range 0x81-0x8C), then it must be adjusted to yield 81-92 in BCD.
*
* AM hour values (0x01-0x0C) need no adjustment; they naturally convert to 01-12 in BCD.
*/
if (f12HourValue && b > 0x80) {
b -= (0x81 - 81);
}
b = (b % 10) | ((b / 10) << 4);
}
} else {
if (iRTC == ChipSet.CMOS.ADDR.STATUSA) {
/*
* Make sure that the "Update-In-Progress" bit we set in updateRTCTime() doesn't stay set for
* more than one read.
*/
this.abCMOSData[iRTC] &= ~ChipSet.CMOS.STATUSA.UIP;
}
}
return b;
}
/**
* setRTCByte(iRTC, b)
*
* @param {number} iRTC
* @param {number} b proposed byte to write
* @return {number} actual byte to write
*/
setRTCByte(iRTC, b)
{
this.assert(iRTC >= 0 && iRTC <= ChipSet.CMOS.ADDR.STATUSD);
if (iRTC < ChipSet.CMOS.ADDR.STATUSA) {
let fBCD = false;
if (!(this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.BINARY)) {
/*
* We're in BCD mode, so we must convert b from BCD to BINARY (we assume it's valid
* BCD; ie, that both nibbles contain only 0-9, not A-F).
*/
b = (b >> 4) * 10 + (b & 0xf);
fBCD = true;
}
if (iRTC == ChipSet.CMOS.ADDR.RTC_HOUR || iRTC == ChipSet.CMOS.ADDR.RTC_HOUR_ALRM) {
if (fBCD) {
/*
* If the original BCD hour was 0x81-0x92, then the previous BINARY-to-BCD conversion
* transformed it to 0x51-0x5C, so we must add 0x30.
*/
if (b > 23) {
this.assert(b >= 0x51 && b <= 0x5c);
b += 0x30;
}
}
if (!(this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.HOUR24)) {
if (b <= 12) {
b = (b == 12? 0 : b);
} else {
b -= (0x80 - 12);
b = (b == 24? 12 : b);
}
}
}
}
return b;
}
/**
* calcRTCCyclePeriod()
*
* This should be called whenever the timings in STATUSA may have changed.
*
* TODO: 1024 is a hard-coded number of periods per second based on the default interrupt rate of 976.562us
* (ie, 1000000 / 976.562). Calculate the actual number based on the values programmed in the STATUSA register.
*
* @this {ChipSet}
*/
calcRTCCyclePeriod()
{
this.nRTCCyclesLastUpdate = this.cpu.getCycles(this.fScaleTimers);
this.nRTCPeriodsPerSecond = 1024;
this.nRTCCyclesPerPeriod = Math.floor(this.cpu.getBaseCyclesPerSecond() / this.nRTCPeriodsPerSecond);
this.setRTCCycleLimit();
}
/**
* getRTCCycleLimit(nCycles)
*
* This is called by the CPU to determine the maximum number of cycles it can process for the current burst.
*
* @this {ChipSet}
* @param {number} nCycles desired
* @return {number} maximum number of cycles (<= nCycles)
*/
getRTCCycleLimit(nCycles)
{
if (this.abCMOSData && this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.PIE) {
let nCyclesUpdate = this.nRTCCyclesNextUpdate - this.cpu.getCycles(this.fScaleTimers);
if (nCyclesUpdate > 0) {
if (nCycles > nCyclesUpdate) {
if (DEBUG) this.printf(Messages.RTC, "getRTCCycleLimit(%d): reduced to %d cycles\n", nCycles, nCyclesUpdate);
nCycles = nCyclesUpdate;
} else {
if (DEBUG) this.printf(Messages.RTC, "getRTCCycleLimit(%d): already less than %d cycles\n", nCycles, nCyclesUpdate);
}
} else {
if (DEBUG) this.printf(Messages.RTC, "RTC next update has passed by %d cycles\n", nCyclesUpdate);
}
}
return nCycles;
}
/**
* setRTCCycleLimit()
*
* This should be called when PIE becomes set in STATUSB (and whenever PF is cleared in STATUSC while PIE is still set).
*
* @this {ChipSet}
*/
setRTCCycleLimit()
{
let nCycles = this.nRTCCyclesPerPeriod;
this.nRTCCyclesNextUpdate = this.cpu.getCycles(this.fScaleTimers) + nCycles;
if (this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.PIE) {
this.cpu.setBurstCycles(nCycles);
}
}
/**
* updateRTCTime()
*
* @this {ChipSet}
*/
updateRTCTime()
{
let nCyclesPerSecond = this.cpu.getBaseCyclesPerSecond();
let nCyclesUpdate = this.cpu.getCycles(this.fScaleTimers);
/*
* We must arrange for the very first calcRTCCyclePeriod() call to occur here, on the very first
* updateRTCTime() call, because this is the first point we can be guaranteed that CPU cycle counts
* are initialized (the CPU is the last component to be powered up/restored).
*
* TODO: A side-effect of this is that it undermines the save/restore code's preservation of last
* and next RTC cycle counts, which may affect when the next RTC event is delivered.
*/
if (this.nRTCCyclesPerPeriod == null) this.calcRTCCyclePeriod();
/*
* Step 1: Deal with Periodic Interrupts
*/
if (nCyclesUpdate >= this.nRTCCyclesNextUpdate) {
let bPrev = this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC];
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] |= ChipSet.CMOS.STATUSC.PF;
if (this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.PIE) {
/*
* When PIE is set, setBurstCycles() should be getting called as needed to ensure
* that updateRTCTime() is called more frequently, so let's assert that we don't have
* an excess of cycles and thus possibly some missed Periodic Interrupts.
*/
if (DEBUG) {
if (nCyclesUpdate - this.nRTCCyclesNextUpdate > this.nRTCCyclesPerPeriod) {
if (bPrev & ChipSet.CMOS.STATUSC.PF) {
this.printf(Messages.RTC, "RTC interrupt handler failed to clear STATUSC\n");
} else {
this.printf(Messages.RTC, "CPU took too long trigger new RTC periodic interrupt\n");
}
}
}
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] |= ChipSet.CMOS.STATUSC.IRQF;
this.setIRR(ChipSet.IRQ.RTC);
/*
* We could also call setRTCCycleLimit() at this point, but I don't think there's any
* benefit until the interrupt had been acknowledged and STATUSC has been read, thereby
* clearing the way for another Periodic Interrupt; it seems to me that when STATUSC
* is read, that's the more appropriate time to call setRTCCycleLimit().
*/
}
this.nRTCCyclesNextUpdate = nCyclesUpdate + this.nRTCCyclesPerPeriod;
}
/*
* Step 2: Deal with Alarm Interrupts
*/
if (this.abCMOSData[ChipSet.CMOS.ADDR.RTC_SEC] == this.abCMOSData[ChipSet.CMOS.ADDR.RTC_SEC_ALRM]) {
if (this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MIN] == this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MIN_ALRM]) {
if (this.abCMOSData[ChipSet.CMOS.ADDR.RTC_HOUR] == this.abCMOSData[ChipSet.CMOS.ADDR.RTC_HOUR_ALRM]) {
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] |= ChipSet.CMOS.STATUSC.AF;
if (this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.AIE) {
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] |= ChipSet.CMOS.STATUSC.IRQF;
this.setIRR(ChipSet.IRQ.RTC);
}
}
}
}
/*
* Step 3: Update the RTC date/time and deal with Update Interrupts
*/
let nCyclesDelta = nCyclesUpdate - this.nRTCCyclesLastUpdate;
// DEBUG: this.assert(nCyclesDelta >= 0);
let nSecondsDelta = Math.floor(nCyclesDelta / nCyclesPerSecond);
/*
* We trust that updateRTCTime() is being called as part of updateAllTimers(), and is therefore
* being called often enough to ensure that nSecondsDelta will never be greater than one. In fact,
* it would always be LESS than one if it weren't also for the fact that we plow any "unused" cycles
* (nCyclesDelta % nCyclesPerSecond) back into nRTCCyclesLastUpdate, so that we will eventually
* see a one-second delta.
*/
// DEBUG: this.assert(nSecondsDelta <= 1);
/*
* Make sure that CMOS.STATUSB.SET isn't set; if it is, then the once-per-second RTC updates must be
* disabled so that software can write new RTC date/time values without interference.
*/
if (nSecondsDelta && !(this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.SET)) {
while (nSecondsDelta--) {
if (++this.abCMOSData[ChipSet.CMOS.ADDR.RTC_SEC] >= 60) {
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_SEC] = 0;
if (++this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MIN] >= 60) {
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MIN] = 0;
if (++this.abCMOSData[ChipSet.CMOS.ADDR.RTC_HOUR] >= 24) {
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_HOUR] = 0;
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_WEEK_DAY] = (this.abCMOSData[ChipSet.CMOS.ADDR.RTC_WEEK_DAY] % 7) + 1;
let nDayMax = Usr.getMonthDays(this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH], this.abCMOSData[ChipSet.CMOS.ADDR.RTC_YEAR]);
if (++this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH_DAY] > nDayMax) {
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH_DAY] = 1;
if (++this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH] > 12) {
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_MONTH] = 1;
this.abCMOSData[ChipSet.CMOS.ADDR.RTC_YEAR] = (this.abCMOSData[ChipSet.CMOS.ADDR.RTC_YEAR] + 1) % 100;
}
}
}
}
}
}
/*
* Obviously, setting the "Update-In-Progress" bit now might seem rather pointless, since we just
* updated the RTC "atomically" as far as the machine is concerned; however, the bit must be set at
* at some point, in order to make the MODEL_5170 BIOS ("POST2_RTCUP") happy.
*/
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSA] |= ChipSet.CMOS.STATUSA.UIP;
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] |= ChipSet.CMOS.STATUSC.UF;
if (this.abCMOSData[ChipSet.CMOS.ADDR.STATUSB] & ChipSet.CMOS.STATUSB.UIE) {
this.abCMOSData[ChipSet.CMOS.ADDR.STATUSC] |= ChipSet.CMOS.STATUSC.IRQF;
this.setIRR(ChipSet.IRQ.RTC);
}
}
this.nRTCCyclesLastUpdate = nCyclesUpdate - (nCyclesDelta % nCyclesPerSecond);
}
/**
* initCMOSData()
*
* Initialize all the CMOS configuration bytes in the range 0x0E-0x2F (TODO: Decide what to do about 0x30-0x3F)
*
* Note that the MODEL_5170 "SETUP" utility is normally what sets all these bytes, including the checksum, and then
* the BIOS verifies it, but since we want our machines to pass BIOS verification "out of the box", we go the extra
* mile here, even though it's not really our responsibility.
*
* @this {ChipSet}
*/
initCMOSData()
{
/*
* On all reset() calls, the RAM component(s) will (re)add their totals, so we have to make sure that
* the addition always starts with 0. That also means that ChipSet must always be initialized before RAM.
*/
let iCMOS;
for (iCMOS = ChipSet.CMOS.ADDR.BASEMEM_LO; iCMOS <= ChipSet.CMOS.ADDR.EXTMEM_HI; iCMOS++) {
this.abCMOSData[iCMOS] = 0;
}
/*
* Make sure all the "checksummed" CMOS bytes are initialized (not just the handful we set below) to ensure
* that the checksum will be valid.
*/
for (iCMOS = ChipSet.CMOS.ADDR.DIAG; iCMOS < ChipSet.CMOS.ADDR.CHKSUM_HI; iCMOS++) {
if (this.abCMOSData[iCMOS] === undefined) this.abCMOSData[iCMOS] = 0;
}
/*
* We propagate all compatible "legacy" SW1 bits to the CMOS.EQUIP byte using the old SW masks, but any further
* access to CMOS.ADDR.EQUIP should use the new CMOS_EQUIP flags (eg, CMOS.EQUIP.FPU, CMOS.EQUIP.MONITOR.CGA80, etc).
*/
this.abCMOSData[ChipSet.CMOS.ADDR.EQUIP] = this.getDIPLegacyBits(0);
this.abCMOSData[ChipSet.CMOS.ADDR.FDRIVE] = (this.getDIPFloppyDriveType(0) << 4) | this.getDIPFloppyDriveType(1);
/*
* The final step is calculating the CMOS checksum, which we then store into the CMOS as a courtesy, so that the
* user doesn't get unnecessary CMOS errors.
*/
this.updateCMOSChecksum();
}
/**
* setCMOSByte(iCMOS, b)
*
* This is ONLY for use by components that need to update CMOS configuration bytes to match their internal configuration.
*
* @this {ChipSet}
* @param {number} iCMOS
* @param {number} b
* @return {boolean} true if successful, false if not (eg, CMOS not initialized yet, or no CMOS on this machine)
*/
setCMOSByte(iCMOS, b)
{
if (this.abCMOSData) {
this.assert(iCMOS >= ChipSet.CMOS.ADDR.FDRIVE && iCMOS < ChipSet.CMOS.ADDR.CHKSUM_HI);
this.abCMOSData[iCMOS] = b;
this.updateCMOSChecksum();
return true;
}
return false;
}
/**
* addCMOSMemory(addr, size)
*
* For use by the RAM component, to dynamically update the CMOS memory configuration.
*
* @this {ChipSet}
* @param {number} addr (if 0, BASEMEM_LO/BASEMEM_HI is updated; if >= 0x100000, then EXTMEM_LO/EXTMEM_HI is updated)
* @param {number} size (in bytes; we convert to Kb)
* @return {boolean} true if successful, false if not (eg, CMOS not initialized yet, or no CMOS on this machine)
*/
addCMOSMemory(addr, size)
{
if (this.abCMOSData) {
let iCMOS = (addr < 0x100000? ChipSet.CMOS.ADDR.BASEMEM_LO : ChipSet.CMOS.ADDR.EXTMEM_LO);
let wKb = this.abCMOSData[iCMOS] | (this.abCMOSData[iCMOS+1] << 8);
wKb += (size >> 10);
this.abCMOSData[iCMOS] = wKb & 0xff;
this.abCMOSData[iCMOS+1] = wKb >> 8;
this.updateCMOSChecksum();
return true;
}
return false;
}
/**
* setCMOSDriveType(iDrive, bType)
*
* For use by the HDC component, to update the CMOS drive configuration to match HDC's internal configuration.
*
* TODO: Consider extending this to support FDC drive updates, so that the FDC can specify diskette drive types
* (ie, FD360 or FD1200) in the same way that HDC does. However, historically, the ChipSet has been responsible for
* floppy drive configuration, at least in terms of *number* of drives, through the use of SW1 settings, and we've
* continued that tradition with the addition of the ChipSet 'floppies' parameter, which allows both the number *and*
* capacity of drives to be specified with a simple array (eg, [360, 360] for two 360Kb drives).
*
* @this {ChipSet}
* @param {number} iDrive (0 or 1)
* @param {number} bType (0 for none, 1-14 for original drive type, 16-255 for extended drive type; 15 reserved)
* @return {boolean} true if successful, false if not (eg, CMOS not initialized yet, or no CMOS on this machine)
*/
setCMOSDriveType(iDrive, bType)
{
if (this.abCMOSData) {
let bExt = null, iExt;
let bOrig = this.abCMOSData[ChipSet.CMOS.ADDR.HDRIVE];
if (bType > 15) {
bExt = bType; bType = 15;
}
if (iDrive) {
bOrig = (bOrig & ChipSet.CMOS.HDRIVE.D0_MASK) | bType;
iExt = ChipSet.CMOS.ADDR.EXTHDRIVE1;
} else {
bOrig = (bOrig & ChipSet.CMOS.HDRIVE.D1_MASK) | (bType << 4);
iExt = ChipSet.CMOS.ADDR.EXTHDRIVE0;
}
this.setCMOSByte(ChipSet.CMOS.ADDR.HDRIVE, bOrig);
if (bExt != null) this.setCMOSByte(iExt, bExt);
return true;
}
return false;
}
/**
* updateCMOSChecksum()
*
* This sums all the CMOS bytes from 0x10-0x2D, creating a 16-bit checksum. That's a total of 30 (unsigned) 8-bit
* values which could sum to at most 30*255 or 7650 (0x1DE2). Since there's no way that can overflow 16 bits, we don't
* worry about masking it with 0xffff.
*
* WARNING: The IBM PC AT TechRef, p.1-53 (p.75) claims that the checksum is on bytes 0x10-0x20, but that's simply wrong.
*
* @this {ChipSet}
*/
updateCMOSChecksum()
{
let wChecksum = 0;
for (let iCMOS = ChipSet.CMOS.ADDR.FDRIVE; iCMOS < ChipSet.CMOS.ADDR.CHKSUM_HI; iCMOS++) {
wChecksum += this.abCMOSData[iCMOS];
}
this.abCMOSData[ChipSet.CMOS.ADDR.CHKSUM_LO] = wChecksum & 0xff;
this.abCMOSData[ChipSet.CMOS.ADDR.CHKSUM_HI] = wChecksum >> 8;
}
/**
* save()
*
* This implements save support for the ChipSet component.
*