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Add clk200 as a port to enclustra_ax3_pm3_infra.vhd #36

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DavidCussans opened this issue Feb 20, 2018 · 1 comment
Open

Add clk200 as a port to enclustra_ax3_pm3_infra.vhd #36

DavidCussans opened this issue Feb 20, 2018 · 1 comment
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@dmnewbold

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@DavidCussans
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It would be useful it the 200MHz clock generated inside enclustra_ax3_pm3_infra.vhd was connected as a top-level port.

A 200MHz clock is needed to as an input to the Input delay calibration block.

boards/enclustra_ax3_pm3/base_fw/synth/firmware/hdl/enclustra_ax3_pm3_infra.vhd
@tswilliams tswilliams added this to the Release 1.3 milestone May 30, 2018
@tswilliams tswilliams modified the milestones: Release 1.3, Release 1.4 Dec 20, 2018
@tswilliams tswilliams modified the milestones: Release 1.4, Release 1.5 May 3, 2019
@alessandrothea
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Hi David, is this still needed?

@tswilliams tswilliams modified the milestones: Release 1.5, Release 1.6 Aug 20, 2019
@tswilliams tswilliams modified the milestones: Release 1.6, Release 1.7 Oct 22, 2019
@tswilliams tswilliams removed this from the Release 1.7 milestone Jan 30, 2020
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@alessandrothea @tswilliams @DavidCussans @dmnewbold