From 2f75893ae70d0b806719dca072db7b88304bc7e9 Mon Sep 17 00:00:00 2001
From: hujun5 <hujun5@xiaomi.com>
Date: Sat, 25 Jan 2025 13:34:54 +0800
Subject: [PATCH] arch: use raw_spin_[un]lock to replace spin_[un]lock, fix
 regression b69111d16a2a330fa272af8175c832e08881844b of
 https://github.com/apache/nuttx/pull/14578

reason:
Due to the addition of sched_lock in the spinlock, using a spinlock in the *cpustart file during the boot phase
is quite special. CPU0 waits for CPU1 to start up, using a spinlock as a multi-core synchronization strategy.
However, the matching calls are not made within the same task,
resulting in a mismatch in the scheduler lock count and preventing the system from booting.
The sequence is:
CPU0 spin_lock, spin_lock, spin_unlock;
CPU1 spin_unlock.
CPU0 and CPU1 are running different tasks.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
---
 arch/arm/src/cxd56xx/cxd56_cpustart.c      | 8 ++++----
 arch/arm/src/lc823450/lc823450_cpustart.c  | 8 ++++----
 arch/arm/src/rp2040/rp2040_cpustart.c      | 8 ++++----
 arch/arm/src/rp23xx/rp23xx_cpustart.c      | 8 ++++----
 arch/arm/src/sam34/sam4cm_cpustart.c       | 8 ++++----
 arch/sparc/src/s698pm/s698pm_cpustart.c    | 8 ++++----
 arch/xtensa/src/esp32/esp32_cpustart.c     | 8 ++++----
 arch/xtensa/src/esp32s3/esp32s3_cpustart.c | 8 ++++----
 8 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm/src/cxd56xx/cxd56_cpustart.c b/arch/arm/src/cxd56xx/cxd56_cpustart.c
index af9d074a5f6ee..27209b8270d08 100644
--- a/arch/arm/src/cxd56xx/cxd56_cpustart.c
+++ b/arch/arm/src/cxd56xx/cxd56_cpustart.c
@@ -122,7 +122,7 @@ static void appdsp_boot(void)
   irq_attach(CXD56_IRQ_SMP_CALL, cxd56_smp_call_handler, NULL);
   up_enable_irq(CXD56_IRQ_SMP_CALL);
 
-  spin_unlock(&g_appdsp_boot);
+  raw_spin_unlock(&g_appdsp_boot);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify that this CPU has started */
@@ -189,7 +189,7 @@ int up_cpu_start(int cpu)
                      tcb->adj_stack_size, VECTOR_ISTACK);
   putreg32((uint32_t)appdsp_boot, VECTOR_RESETV);
 
-  spin_lock(&g_appdsp_boot);
+  raw_spin_lock(&g_appdsp_boot);
 
   /* See 3.13.4.16.3 ADSP Startup */
 
@@ -238,11 +238,11 @@ int up_cpu_start(int cpu)
       up_enable_irq(CXD56_IRQ_SMP_CALL);
     }
 
-  spin_lock(&g_appdsp_boot);
+  raw_spin_lock(&g_appdsp_boot);
 
   /* APP_DSP(cpu) boot done */
 
-  spin_unlock(&g_appdsp_boot);
+  raw_spin_unlock(&g_appdsp_boot);
 
   return 0;
 }
diff --git a/arch/arm/src/lc823450/lc823450_cpustart.c b/arch/arm/src/lc823450/lc823450_cpustart.c
index 9fceef96af831..28d1d3addc711 100644
--- a/arch/arm/src/lc823450/lc823450_cpustart.c
+++ b/arch/arm/src/lc823450/lc823450_cpustart.c
@@ -112,7 +112,7 @@ static void cpu1_boot(void)
       up_enable_irq(LC823450_IRQ_SMP_CALL_01);
     }
 
-  spin_unlock(&g_cpu_wait[0]);
+  raw_spin_unlock(&g_cpu_wait[0]);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify that this CPU has started */
@@ -177,7 +177,7 @@ int up_cpu_start(int cpu)
                      tcb->adj_stack_size, CPU1_VECTOR_ISTACK);
   putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_RESETV);
 
-  spin_lock(&g_cpu_wait[0]);
+  raw_spin_lock(&g_cpu_wait[0]);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify of the start event */
@@ -198,7 +198,7 @@ int up_cpu_start(int cpu)
   irq_attach(LC823450_IRQ_SMP_CALL_11, lc823450_smp_call_handler, NULL);
   up_enable_irq(LC823450_IRQ_SMP_CALL_11);
 
-  spin_lock(&g_cpu_wait[0]);
+  raw_spin_lock(&g_cpu_wait[0]);
 
   /* CPU1 boot done */
 
@@ -208,7 +208,7 @@ int up_cpu_start(int cpu)
   putreg32(backup[1], CPU1_VECTOR_RESETV);
   putreg32(0x0, REMAP); /* remap disable */
 
-  spin_unlock(&g_cpu_wait[0]);
+  raw_spin_unlock(&g_cpu_wait[0]);
 
   return 0;
 }
diff --git a/arch/arm/src/rp2040/rp2040_cpustart.c b/arch/arm/src/rp2040/rp2040_cpustart.c
index ad7cb1f47e4b6..ab2f1b48104d8 100644
--- a/arch/arm/src/rp2040/rp2040_cpustart.c
+++ b/arch/arm/src/rp2040/rp2040_cpustart.c
@@ -156,7 +156,7 @@ static void core1_boot(void)
   irq_attach(RP2040_SMP_CALL_PROC1, rp2040_smp_call_handler, NULL);
   up_enable_irq(RP2040_SMP_CALL_PROC1);
 
-  spin_unlock(&g_core1_boot);
+  raw_spin_unlock(&g_core1_boot);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify that this CPU has started */
@@ -221,7 +221,7 @@ int up_cpu_start(int cpu)
     ;
   clrbits_reg32(RP2040_PSM_PROC1, RP2040_PSM_FRCE_OFF);
 
-  spin_lock(&g_core1_boot);
+  raw_spin_lock(&g_core1_boot);
 
   /* Send initial VTOR, MSP, PC for Core 1 boot */
 
@@ -252,11 +252,11 @@ int up_cpu_start(int cpu)
   irq_attach(RP2040_SMP_CALL_PROC0, rp2040_smp_call_handler, NULL);
   up_enable_irq(RP2040_SMP_CALL_PROC0);
 
-  spin_lock(&g_core1_boot);
+  raw_spin_lock(&g_core1_boot);
 
   /* CPU Core 1 boot done */
 
-  spin_unlock(&g_core1_boot);
+  raw_spin_unlock(&g_core1_boot);
 
   return 0;
 }
diff --git a/arch/arm/src/rp23xx/rp23xx_cpustart.c b/arch/arm/src/rp23xx/rp23xx_cpustart.c
index 26c401151c751..4ee2a828772e1 100644
--- a/arch/arm/src/rp23xx/rp23xx_cpustart.c
+++ b/arch/arm/src/rp23xx/rp23xx_cpustart.c
@@ -156,7 +156,7 @@ static void core1_boot(void)
   irq_attach(RP23XX_SIO_IRQ_FIFO, rp23xx_smp_call_handler, NULL);
   up_enable_irq(RP23XX_SIO_IRQ_FIFO);
 
-  spin_unlock(&g_core1_boot);
+  raw_spin_unlock(&g_core1_boot);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify that this CPU has started */
@@ -221,7 +221,7 @@ int up_cpu_start(int cpu)
     ;
   clrbits_reg32(RP23XX_PSM_PROC1, RP23XX_PSM_FRCE_OFF);
 
-  spin_lock(&g_core1_boot);
+  raw_spin_lock(&g_core1_boot);
 
   /* Send initial VTOR, MSP, PC for Core 1 boot */
 
@@ -252,11 +252,11 @@ int up_cpu_start(int cpu)
   irq_attach(RP23XX_SIO_IRQ_FIFO, rp23xx_smp_call_handler, NULL);
   up_enable_irq(RP23XX_SIO_IRQ_FIFO);
 
-  spin_lock(&g_core1_boot);
+  raw_spin_lock(&g_core1_boot);
 
   /* CPU Core 1 boot done */
 
-  spin_unlock(&g_core1_boot);
+  raw_spin_unlock(&g_core1_boot);
 
   return 0;
 }
diff --git a/arch/arm/src/sam34/sam4cm_cpustart.c b/arch/arm/src/sam34/sam4cm_cpustart.c
index 00a3629d02d7a..65e8fdac7082d 100644
--- a/arch/arm/src/sam34/sam4cm_cpustart.c
+++ b/arch/arm/src/sam34/sam4cm_cpustart.c
@@ -114,7 +114,7 @@ static void cpu1_boot(void)
       up_enable_irq(SAM_IRQ_SMP_CALL1);
     }
 
-  spin_unlock(&g_cpu1_boot);
+  raw_spin_unlock(&g_cpu1_boot);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify that this CPU has started */
@@ -209,7 +209,7 @@ int up_cpu_start(int cpu)
                      tcb->adj_stack_size, CPU1_VECTOR_ISTACK);
   putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_RESETV);
 
-  spin_lock(&g_cpu1_boot);
+  raw_spin_lock(&g_cpu1_boot);
 
   /* Unreset coprocessor */
 
@@ -223,11 +223,11 @@ int up_cpu_start(int cpu)
   irq_attach(SAM_IRQ_SMP_CALL0, sam4cm_smp_call_handler, NULL);
   up_enable_irq(SAM_IRQ_SMP_CALL0);
 
-  spin_lock(&g_cpu1_boot);
+  raw_spin_lock(&g_cpu1_boot);
 
   /* CPU1 boot done */
 
-  spin_unlock(&g_cpu1_boot);
+  raw_spin_unlock(&g_cpu1_boot);
 
   return 0;
 }
diff --git a/arch/sparc/src/s698pm/s698pm_cpustart.c b/arch/sparc/src/s698pm/s698pm_cpustart.c
index fbe2a51bd897d..92297e6296394 100644
--- a/arch/sparc/src/s698pm/s698pm_cpustart.c
+++ b/arch/sparc/src/s698pm/s698pm_cpustart.c
@@ -79,7 +79,7 @@ void s698pm_cpu_boot(void)
 
   s698pm_cpuint_initialize();
 
-  spin_unlock(&g_cpu_boot);
+  raw_spin_unlock(&g_cpu_boot);
 
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Notify that this CPU has started */
@@ -150,17 +150,17 @@ int up_cpu_start(int cpu)
   regaddr = S698PM_DSU_BASE + (0x1000000 * cpu) + S698PM_DSU_NPC_OFFSET;
   putreg32(0x40001004, regaddr);
 
-  spin_lock(&g_cpu_boot);
+  raw_spin_lock(&g_cpu_boot);
 
   /* set 1 to bit n of multiprocessor status register to active cpu n */
 
   putreg32(1 << cpu, S698PM_IRQREG_MPSTATUS);
 
-  spin_lock(&g_cpu_boot);
+  raw_spin_lock(&g_cpu_boot);
 
   /* prev cpu boot done */
 
-  spin_unlock(&g_cpu_boot);
+  raw_spin_unlock(&g_cpu_boot);
 
   return 0;
 }
diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c
index ed2fac49fca1b..a370009b7295d 100644
--- a/arch/xtensa/src/esp32/esp32_cpustart.c
+++ b/arch/xtensa/src/esp32/esp32_cpustart.c
@@ -133,7 +133,7 @@ void IRAM_ATTR xtensa_appcpu_start(void)
    */
 
   g_appcpu_started = true;
-  spin_unlock(&g_appcpu_interlock);
+  raw_spin_unlock(&g_appcpu_interlock);
 
   /* Reset scheduler parameters */
 
@@ -242,7 +242,7 @@ int up_cpu_start(int cpu)
        */
 
       spin_lock_init(&g_appcpu_interlock);
-      spin_lock(&g_appcpu_interlock);
+      raw_spin_lock(&g_appcpu_interlock);
 
       /* Unstall the APP CPU */
 
@@ -288,11 +288,11 @@ int up_cpu_start(int cpu)
 
       /* And wait until the APP CPU starts and releases the spinlock. */
 
-      spin_lock(&g_appcpu_interlock);
+      raw_spin_lock(&g_appcpu_interlock);
 
       /* prev cpu boot done */
 
-      spin_unlock(&g_appcpu_interlock);
+      raw_spin_unlock(&g_appcpu_interlock);
       DEBUGASSERT(g_appcpu_started);
     }
 
diff --git a/arch/xtensa/src/esp32s3/esp32s3_cpustart.c b/arch/xtensa/src/esp32s3/esp32s3_cpustart.c
index 13763c643ad7d..5244cce365d9d 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_cpustart.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_cpustart.c
@@ -132,7 +132,7 @@ void xtensa_appcpu_start(void)
    */
 
   g_appcpu_started = true;
-  spin_unlock(&g_appcpu_interlock);
+  raw_spin_unlock(&g_appcpu_interlock);
 
   /* Reset scheduler parameters */
 
@@ -227,7 +227,7 @@ int up_cpu_start(int cpu)
        */
 
       spin_lock_init(&g_appcpu_interlock);
-      spin_lock(&g_appcpu_interlock);
+      raw_spin_lock(&g_appcpu_interlock);
 
       /* OpenOCD might have already enabled clock gating and taken APP CPU
        * out of reset.  Don't reset the APP CPU if that's the case as this
@@ -272,11 +272,11 @@ int up_cpu_start(int cpu)
 
       /* And wait until the APP CPU starts and releases the spinlock. */
 
-      spin_lock(&g_appcpu_interlock);
+      raw_spin_lock(&g_appcpu_interlock);
 
       /* prev cpu boot done */
 
-      spin_unlock(&g_appcpu_interlock);
+      raw_spin_unlock(&g_appcpu_interlock);
       DEBUGASSERT(g_appcpu_started);
     }