From 92e57309ee95e8489b7e9e773f484f57626d5f70 Mon Sep 17 00:00:00 2001 From: clabby Date: Wed, 7 Aug 2024 10:38:34 -0600 Subject: [PATCH] works! --- cannon/mipsevm/exec/mips_instructions.go | 25 +++++++++++++------ cannon/mipsevm/exec/mips_syscalls.go | 1 + .../multithreaded/instrumented_test.go | 2 +- cannon/mipsevm/multithreaded/mips.go | 1 + cannon/mipsevm/program/patch.go | 7 +++--- cannon/testdata/example/Makefile | 2 +- 6 files changed, 24 insertions(+), 14 deletions(-) diff --git a/cannon/mipsevm/exec/mips_instructions.go b/cannon/mipsevm/exec/mips_instructions.go index 8e0e4c0934b5f..4da382ac89c03 100644 --- a/cannon/mipsevm/exec/mips_instructions.go +++ b/cannon/mipsevm/exec/mips_instructions.go @@ -51,7 +51,7 @@ func ExecMipsCoreStepLogic(cpu *mipsevm.CpuScalars, registers *[32]uint64, memor // SignExtImm rt = SignExtend(insn&0xFFFF, 16) } - } else if opcode >= 0x28 || opcode == 0x22 || opcode == 0x26 || opcode == 0x1A || opcode == 0x1B { + } else if opcode >= 0x27 || opcode == 0x22 || opcode == 0x26 || opcode == 0x1A || opcode == 0x1B { // store rt value with store rt = registers[rtReg] @@ -63,7 +63,7 @@ func ExecMipsCoreStepLogic(cpu *mipsevm.CpuScalars, registers *[32]uint64, memor return HandleBranch(cpu, registers, opcode, insn, rtReg, rs) } - storeAddr := uint64(0xFF_FF_FF_FF_FF_FF_FF_FF) + storeAddr := ^uint64(0) // memory fetch (all I-type) // we do the load for stores also mem := uint64(0) @@ -114,7 +114,7 @@ func ExecMipsCoreStepLogic(cpu *mipsevm.CpuScalars, registers *[32]uint64, memor } // write memory - if storeAddr != 0xFF_FF_FF_FF_FF_FF_FF_FF { + if storeAddr != ^uint64(0) { memTracker.TrackMemAccess(storeAddr) memory.SetDoubleWord(storeAddr, val) } @@ -281,7 +281,7 @@ func ExecuteMipsInstruction(insn, opcode, fun, rs, rt, mem uint64) uint64 { case 0x22: // lwl val := mem << ((rs & 3) * 8) mask := uint64(uint32(0xFFFFFFFF) << ((rs & 3) * 8)) - return SignExtend((rt & ^mask)|val, 32) + return SignExtend(((rt & ^mask)|val)&0xFFFFFFFF, 32) case 0x23: // lw return SignExtend((mem>>(32-((rs&0x4)<<3)))&0xFFFFFFFF, 32) case 0x24: // lbu @@ -291,7 +291,7 @@ func ExecuteMipsInstruction(insn, opcode, fun, rs, rt, mem uint64) uint64 { case 0x26: // lwr val := mem >> (24 - (rs&3)*8) mask := uint64(uint32(0xFFFFFFFF) >> (24 - (rs&3)*8)) - return SignExtend((rt & ^mask)|val, 32) + return SignExtend(((rt & ^mask)|val)&0xFFFFFFFF, 32) case 0x28: // sb val := (rt & 0xFF) << (56 - (rs&7)*8) mask := 0xFFFFFFFFFFFFFFFF ^ uint64(0xFF<<(56-(rs&7)*8)) @@ -319,7 +319,10 @@ func ExecuteMipsInstruction(insn, opcode, fun, rs, rt, mem uint64) uint64 { case 0x30: // ll return SignExtend((mem>>(32-((rs&0x4)<<3)))&0xFFFFFFFF, 32) case 0x38: // sc - return rt + sl := 32 - ((rs & 0x4) << 3) + val := (rt & 0xFFFFFFFF) << sl + mask := 0xFFFFFFFFFFFFFFFF ^ uint64(0xFFFFFFFF<.elf # result is mips64, big endian, R3000 bin/%.elf: bin - cd $(@:bin/%.elf=%) && GOOS=linux GODEBUG=memprofilerate=0 GOARCH=mips64 GOMIPS64=softfloat go build -o ../$@ . + cd $(@:bin/%.elf=%) && GOOS=linux GOARCH=mips64 GOMIPS64=softfloat go build -o ../$@ . # take any ELF and dump it # TODO: currently have the little-endian toolchain, but should use the big-endian one. The -EB compat flag works though.