-*- org -*-
- using scan/distribute matrix
- not using the procon
- not using the rest of it either
- 4 static name leads (procon -> sd)
- wired-logic, no need
- 4 address leads (procon -> sd)
- 16 data leads (procon <-> sd)
- 012345 are bidir (procon <-> sd)
- 6789 can be in-only (procon <- sd)
- abcdef no connection
- 1 control lead (procon -> sd)
- 0 for read from scan points
- read is 4b address x 10b wide
- 160 bits in the field
- 1 for write to distribute points
- write is 2b address x 6b wide
- 24 bits in the field
- bit assignments are in SD-28111-01-B2
- 0 for read from scan points
- 1 master strobe lead (procon -> sd)
- 1 slave strobe-confirm lead (sd -> procon)
- optional in this application, i suppose
- in sum
- 4 address leads
- 10 data leads (that matter)
- 2 control leads
- total: 16 leads
- 6 out-only
- 4 in-only
- 6 bidir
- gpio assignments
gpio dir function conn term color 13 procon-> a1 23 blue-bk 15 procon-> a2 11 orange-bk 14 procon-> a3 21 green-bk 18 procon-> a4 9 brown-bk 19 procon-> C1 = rdwr 15 slate-bk 21 procon-> MSYN 63 white-bk 22 <-procon SSYN 39 red-bk 23 <-procon-> d00 71 blue 25 <-procon-> d01 59 orange 26 <-procon-> d02 47 green 27 <-procon-> d03 35 brown 32 <-procon-> d04 69 slate 33 <-procon-> d05 57 white 34 <-procon d06 45 red 35 <-procon d07 33 black 4 <-procon d08 67 yellow 5 <-procon d09 55 violet gnd — ground 4 violet-bk Vin — power 6? yellow-bk 15 2
- esp32 output: 3v3
- esp32 input: 3v3,
- s/d bus: (cd-94851-01 page 3, sec. 2.02)
- 1: 0v0 - 0v4
- 0: 3v0 - 3v8
- hah holy crap no level shifters needed nice
- [addr]:bit
- dist
- STR [02]:5 start
- STRA [02]:4 start auxiliary (test call)
- ARLK [02]:3 automatic reset lock
- CMN [02]:2 minor alarm
- CMJ [02]:1 major alarm
- MB [02]:0 make busy
- TRC [01]:5 trouble record complete
- scan
- STR [00]:9 start
- STRA1 [00]:8 start auxiliary (test call)
- SPL [01]:9 special (test card)
- TRC [01]:8 trouble record complete
- MB [02]:9 make busy
- ROS [02]:8 recorder out of service
- BWX0 [03]:1
- BWX1 [03]:0
- BWX2 [013]:3
- BWX3 [013]:2
CMJ DP is [02]:1 CMN DP is [02]:2
- routines
- read-row
- write-row
- read-all
- read-relay-row
- close distribute point S-
- wait 32ms
- read all trouble card scan points
- open distribute point S-
- wait a moment?
- read-full-card
- read-relay-row 8 thru 0
- nine rows total
- init routine (ref SD-28111-01-E1, SC 1 )
- write appropriate thing to MB dist pt to clear the initial busy condition
- basic operation cycle (ref SD-28111-01-E1, SC 2 )
- read STR and STRA scan pts continuously
- address 0, bits 8 and 9
- wait for bit set
- read-full-card
- do something with that data
- post to somewhere?
- close dist pt TRC
- wait for open scan pt STR or STRA
- wait 0.5s
- open dist pt TRC
- read STR and STRA scan pts continuously
- bus terminator drawing
- connector pinout drawing
- KS-19162, L17 plug
- mdt connectorized switchboard cable assembly and connecting information
- db25 stuff
- scan this one!
- psd A: assembly, equipment, and wiring
- psd controller: assembly, equipment, and wiring
- combo unit logic
- set the commands to write CLOSED to CMJ DP [02]:1
- cmj: [2]:1 -> (DM0) eql 28 -> D conn #12 -> D201A -> CMJ 1L
- cmj ground is on -> D conn #37
- cmn: [2]:2 -> (DM1) eql 30 -> D conn #11 -> D202A -> CMN 1U
- known bus elements
- bit 1
- row 2 (0010)
- d0 f (hi)
- 0-1d0 (dm0 pin 5)
- 0-en1 (dm0 pin 4)
- d1 true (lo)
- 0-0d1 (dm0 pin 2)
- 0-en0 (dm0 pin 1)
- d2 f
- d3 f
- d4 f
- d5 f
- a1 f
- a2 true
- a3 f
- a4 f
- overthinking it
- this should be on DM0 lead “D201A”
- pin 25, DA21
- relay 5 on the card is active
- ic4 pin 13 output is high
- ic2 pin 15 output is low
- pins into the card that should bring this about
- en0 (1) false (hi)
- tied externally to
- 0d1 (2)
- en1 (4) asserted (lo)
- tied externally to
- 1d0 (5)
- clk2 (8) pulsed (hi-lo-hi)
- 1d0 (5) false (hi)
- 1d1 (3) asserted (lo)
- test plan pins for A1074 eql 28
- [X] 1d1 3 - lo (yes, wired to ground)
- run 263
- [X] 0d0 0 - lo (yes, wired to ground)
- run 263
- [X] 1d1 3 - lo (yes, wired to ground)
- 28/0
- 28/3
- 28/10
- grd/28
- [X] en0 1 - lo (wired to d1)
- [X] 0d1 2 - lo (tied to en0)
- run 230
- in/59
- out/59
- 18/9
- 28/1
- 28/2
- [ ] en1 4 - hi (wired to d0)
- [ ] 1d0 5 - hi (tied to en1)
- run 225
- in/71
- out/71
- 17/9
- 28/4 (dm0-en1)
- 28/5 (dm0-1d0)
- [ ] clk3 8 - pulse hi-lo-hi
- run 246
- [ ] clk3 8 - pulse hi-lo-hi
- 16/2
- 28/8 (dm0-clk3)
- 30/8 (dm1-clk3)
- 32/8 (dm2-clk3)
- table of infos
-
lead expect find 0 lo lo 1 lo lo 2 lo lo 3 lo lo 4 hi lo 5 hi lo 6 hi 7 hi 8 hi 9 hi - what
-
- thinkins
- !(1d0 & en1) = !(f & t) = !(f) = true [ic2-ffA]
- !(1d1 & en1) = !(t & t) = !(t) = false [ic2-ffB]
- yep this makes sense
- test plan pins for A1075
- a3 - 4 - hi
- run 215
- a3 - 4 - hi
- table of infos
- in/21
- out/21
- 16/4
- c1 - 5 - ?
- run 218
- c1 - 5 - ?
- in/15
- out/15
- 16/5
- a1 - 7 - hi
- run 214
- a1 - 7 - hi
- in/23
- out/23
- 16/7
- a2 - 8 - lo
- run 219
- a2 - 8 - lo
- in/11
- out/11
- 16/8
- a4 - 9 - hi
- run 220
- a4 - 9 - hi
- in/9
- out/9
- 16/9
gpio.config({gpio = 25, dir = gpio.IN_OUT, opendrain = 1, pull = gpio.FLOATING}) print(gpio.read(25))