From 30f20735f6af31b83d0f76c39672c87367c925f7 Mon Sep 17 00:00:00 2001 From: Luchian Mihai Date: Thu, 30 Jan 2025 12:53:08 +0200 Subject: [PATCH 1/2] boards/stm32/nucleo-f429zi: update netnsh defconfig This PR updates the netnsh defconfig for nucleo-f429zi board, as currently the board would not get ip. Few changes comes with this PR: * enabled CONFIG_NETINIT_NOMAC option. * enabled CONFIG_NETINIT_DHCPC and CONFIG_NETUTILS_TELNETD as I wanted to get a telnet shell and did not care about ip handling * disabled legacy pinmap and updated the board.h config to get the board to compile --- .../nucleo-f429zi/configs/netnsh/defconfig | 4 ++ .../arm/stm32/nucleo-f429zi/include/board.h | 59 +++++++++++-------- 2 files changed, 37 insertions(+), 26 deletions(-) diff --git a/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig b/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig index 30a6f8b9f8a3c..29c6c75a3fcca 100644 --- a/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig +++ b/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig @@ -7,6 +7,7 @@ # # CONFIG_ARCH_FPU is not set # CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-f429zi" CONFIG_ARCH_BOARD_NUCLEO_F429ZI=y @@ -30,7 +31,10 @@ CONFIG_LINE_MAX=64 CONFIG_MM_REGIONS=2 CONFIG_NET=y CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETINIT_DHCPC=y +CONFIG_NETINIT_NOMAC=y CONFIG_NETUTILS_DISCOVER=y +CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NET_ARP_IPIN=y CONFIG_NET_BROADCAST=y diff --git a/boards/arm/stm32/nucleo-f429zi/include/board.h b/boards/arm/stm32/nucleo-f429zi/include/board.h index a0f2a9c476b04..fd2213c1f395b 100644 --- a/boards/arm/stm32/nucleo-f429zi/include/board.h +++ b/boards/arm/stm32/nucleo-f429zi/include/board.h @@ -247,10 +247,10 @@ /* TIM */ -#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 -#define GPIO_TIM2_CH1OUT GPIO_TIM2_CH1OUT_1 -#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1 -#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_1 +#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) +#define GPIO_TIM2_CH1OUT (GPIO_TIM2_CH1OUT_1|GPIO_SPEED_50MHz) +#define GPIO_TIM3_CH1OUT (GPIO_TIM3_CH1OUT_1|GPIO_SPEED_50MHz) +#define GPIO_TIM4_CH1OUT (GPIO_TIM4_CH1OUT_1|GPIO_SPEED_50MHz) #if defined(CONFIG_NUCLEO_F429ZI_CONSOLE_ARDUINO) @@ -268,8 +268,8 @@ * -- ----- --------- ----- */ - # define GPIO_USART6_RX GPIO_USART6_RX_2 - # define GPIO_USART6_TX GPIO_USART6_TX_2 + # define GPIO_USART6_RX (GPIO_USART6_RX_2|GPIO_SPEED_100MHz) + # define GPIO_USART6_TX (GPIO_USART6_TX_2|GPIO_SPEED_100MHz) #endif /* USART3: @@ -277,8 +277,8 @@ */ #if defined(CONFIG_NUCLEO_F429ZI_CONSOLE_VIRTUAL) - # define GPIO_USART3_RX GPIO_USART3_RX_3 - # define GPIO_USART3_TX GPIO_USART3_TX_3 + # define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz) + # define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz) #endif /* DMA channels *************************************************************/ @@ -305,17 +305,17 @@ * PB3 SPI3_SCK CN12-31 */ -#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 -#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 -#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 +#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz) +#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz) +#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz) -#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 -#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 -#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3 +#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz) +#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz) +#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_3|GPIO_SPEED_50MHz) -#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1 -#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 -#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1 +#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_1|GPIO_SPEED_50MHz) +#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz) +#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_1|GPIO_SPEED_50MHz) /* I2C * @@ -331,14 +331,14 @@ * */ -#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 -#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 +#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz) +#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz) -#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 -#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz) +#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz) -#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1 -#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1 +#define GPIO_I2C3_SCL (GPIO_I2C3_SCL_1|GPIO_SPEED_50MHz) +#define GPIO_I2C3_SDA (GPIO_I2C3_SDA_1|GPIO_SPEED_50MHz) /* The STM32 F4 connects to a SMSC LAN8742A PHY using these pins: * @@ -362,8 +362,15 @@ * PG2 is not controlled but appears to result in a PHY address of 0. */ -#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 -#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 -#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1 +#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_1|GPIO_SPEED_100MHz) + +#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz) #endif /* __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_INCLUDE_BOARD_H */ From b3cea35bf66da332d524e90325cee7dea70aacc2 Mon Sep 17 00:00:00 2001 From: Luchian Mihai Date: Thu, 30 Jan 2025 19:17:24 +0200 Subject: [PATCH 2/2] feat: drop legacy pinmap for nsh config migrate from legacy pinmap for nucleo-f429zi board nsh config --- boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig b/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig index 521ab7f9b3881..26f18c9972a17 100644 --- a/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig +++ b/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig @@ -7,6 +7,7 @@ # # CONFIG_ARCH_FPU is not set # CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-f429zi" CONFIG_ARCH_BOARD_NUCLEO_F429ZI=y