From 7582bfc0ecde478ea67ac5b6e93d928829a3c564 Mon Sep 17 00:00:00 2001
From: "github-actions[bot]"
 <41898282+github-actions[bot]@users.noreply.github.com>
Date: Thu, 5 Dec 2024 00:15:04 +0000
Subject: [PATCH] Update revisions ibex 0945aa84 Revert "[rtl] Fix counter
 reset value on FPGA" Cores-VeeR-EL2 6988797d462 Merge pull request #283 from
 antmicro/kiryk/increase-jtag-coverage 24adcd47492 Exclude signals driven by
 constants

---
 deps.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/deps.json b/deps.json
index f09ce38..6a68ae9 100644
--- a/deps.json
+++ b/deps.json
@@ -1 +1 @@
-{"cores": [{"repository_name": "ibex", "repository_url": "https://github.com/lowRISC/ibex", "repository_branch": "master", "repository_revision": "54985d21b055967c39d0a77b45ae0d573b55b0f7"}, {"repository_name": "Cores-VeeR-EL2", "repository_url": "https://github.com/chipsalliance/Cores-VeeR-EL2", "repository_branch": "main", "repository_revision": "2a612d13fc02cc893eefa247433f76de9ddccb9d"}, {"repository_name": "caliptra-rtl", "repository_url": "https://github.com/chipsalliance/caliptra-rtl", "repository_branch": "main", "repository_revision": "00730026cdf11841d20a6085ea3909ea3bd4a21b"}]}
\ No newline at end of file
+{"cores": [{"repository_name": "ibex", "repository_url": "https://github.com/lowRISC/ibex", "repository_branch": "master", "repository_revision": "0945aa84c635a1756311c076a6a7a5b5c239532f"}, {"repository_name": "Cores-VeeR-EL2", "repository_url": "https://github.com/chipsalliance/Cores-VeeR-EL2", "repository_branch": "main", "repository_revision": "6988797d46267c2aeb273beb817e39697219efb6"}, {"repository_name": "caliptra-rtl", "repository_url": "https://github.com/chipsalliance/caliptra-rtl", "repository_branch": "main", "repository_revision": "00730026cdf11841d20a6085ea3909ea3bd4a21b"}]}
\ No newline at end of file