From 2b5c529bd03c722dade00f21515894a85a2a1de0 Mon Sep 17 00:00:00 2001 From: Wiktoria Kuna Date: Thu, 14 Nov 2024 08:44:43 +0100 Subject: [PATCH] Cleanup imports Remove unused, import explicitly. Internal-tag: [#68702] Signed-off-by: Wiktoria Kuna --- rowhammer_tester/gateware/bist.py | 2 +- rowhammer_tester/gateware/payload_executor.py | 13 ++++++++++++- rowhammer_tester/gateware/rowhammer.py | 2 +- rowhammer_tester/scripts/analyzer.py | 8 ++++++-- rowhammer_tester/scripts/execute_payload.py | 4 +--- rowhammer_tester/scripts/hw_rowhammer.py | 14 +------------- rowhammer_tester/scripts/logs2plot.py | 1 - rowhammer_tester/scripts/logs2vis.py | 1 - rowhammer_tester/scripts/mem.py | 19 +++++++++++-------- .../half_double_analysis.py | 11 ++++++----- .../payload_generators/hammer_tolerance.py | 4 +++- .../playbook/payload_generators/row_list.py | 14 +++++++++----- rowhammer_tester/scripts/playbook/playbook.py | 10 +++++++--- .../playbook/row_generators/even_rows.py | 6 ------ .../playbook/row_generators/half_double.py | 6 ------ rowhammer_tester/scripts/read_level.py | 14 +++++++++++++- rowhammer_tester/scripts/rowhammer.py | 2 -- rowhammer_tester/scripts/spd_eeprom.py | 5 +---- rowhammer_tester/scripts/utils.py | 2 +- rowhammer_tester/targets/arty.py | 2 +- rowhammer_tester/targets/common.py | 8 ++++---- .../targets/ddr4_datacenter_test_board.py | 5 +---- rowhammer_tester/targets/ddr5_test_board.py | 7 ++----- rowhammer_tester/targets/ddr5_tester.py | 7 +------ rowhammer_tester/targets/ddr5_tester_linux.py | 1 - rowhammer_tester/targets/lpddr4_test_board.py | 5 +---- rowhammer_tester/targets/lpddr5_test_board.py | 5 +---- .../targets/sodimm_ddr5_tester.py | 7 +------ .../targets/sodimm_lpddr5_tester.py | 8 +------- rowhammer_tester/targets/zcu104.py | 4 +--- setup.py | 2 -- tests/test_bist.py | 3 ++- tests/test_payload_executor.py | 14 +++++++++++--- 33 files changed, 100 insertions(+), 116 deletions(-) diff --git a/rowhammer_tester/gateware/bist.py b/rowhammer_tester/gateware/bist.py index d73d79954..d0cf89404 100644 --- a/rowhammer_tester/gateware/bist.py +++ b/rowhammer_tester/gateware/bist.py @@ -2,7 +2,7 @@ from litex.soc.integration.doc import AutoDoc, ModuleDoc from litex.soc.interconnect import stream from litex.soc.interconnect.csr import CSR, AutoCSR, CSRStatus, CSRStorage -from migen import * +from migen import FSM, READ_FIRST, If, Memory, Module, NextState, NextValue, Signal from migen.genlib.coding import Decoder as OneHotDecoder diff --git a/rowhammer_tester/gateware/payload_executor.py b/rowhammer_tester/gateware/payload_executor.py index c86cfc864..1c3e48a64 100644 --- a/rowhammer_tester/gateware/payload_executor.py +++ b/rowhammer_tester/gateware/payload_executor.py @@ -5,7 +5,18 @@ from litedram.core.refresher import Refresher from litex.soc.integration.doc import AutoDoc, ModuleDoc from litex.soc.interconnect.csr import CSR, AutoCSR, CSRField, CSRStatus, CSRStorage -from migen import * +from migen import ( + FSM, + Cat, + If, + Module, + NextState, + NextValue, + Replicate, + ResetInserter, + Signal, + log2_int, +) from migen.genlib.coding import Decoder as OneHotDecoder diff --git a/rowhammer_tester/gateware/rowhammer.py b/rowhammer_tester/gateware/rowhammer.py index ff124e1b6..5eaa5eef0 100644 --- a/rowhammer_tester/gateware/rowhammer.py +++ b/rowhammer_tester/gateware/rowhammer.py @@ -1,6 +1,6 @@ from litex.soc.integration.doc import AutoDoc, ModuleDoc from litex.soc.interconnect.csr import AutoCSR, CSRStatus, CSRStorage -from migen import * +from migen import Case, If, Module, Signal class RowHammerDMA(Module, AutoCSR, AutoDoc, ModuleDoc): diff --git a/rowhammer_tester/scripts/analyzer.py b/rowhammer_tester/scripts/analyzer.py index 6632c63ae..6c913b38d 100755 --- a/rowhammer_tester/scripts/analyzer.py +++ b/rowhammer_tester/scripts/analyzer.py @@ -1,9 +1,13 @@ #!/usr/bin/env python3 -import argparse import sys -from litescope.software.litescope_cli import * +from litescope.software.litescope_cli import ( + LiteScopeAnalyzerDriver, + add_triggers, + get_signals, + parse_args, +) from rowhammer_tester.scripts.utils import RemoteClient, get_generated_file, read_ident diff --git a/rowhammer_tester/scripts/execute_payload.py b/rowhammer_tester/scripts/execute_payload.py index d70d619c7..726d02cc6 100755 --- a/rowhammer_tester/scripts/execute_payload.py +++ b/rowhammer_tester/scripts/execute_payload.py @@ -1,11 +1,9 @@ #!/usr/bin/env python3 import itertools -import os -import sys import time -from rowhammer_tester.gateware.payload_executor import Decoder, Encoder, OpCode +from rowhammer_tester.gateware.payload_executor import Encoder, OpCode from rowhammer_tester.scripts.utils import ( DRAMAddressConverter, RemoteClient, diff --git a/rowhammer_tester/scripts/hw_rowhammer.py b/rowhammer_tester/scripts/hw_rowhammer.py index 6e710435d..2f5c4811f 100755 --- a/rowhammer_tester/scripts/hw_rowhammer.py +++ b/rowhammer_tester/scripts/hw_rowhammer.py @@ -1,22 +1,10 @@ #!/usr/bin/env python3 -import argparse -import random import time from collections import defaultdict -from math import ceil -from rowhammer_tester.gateware.payload_executor import Decoder, Encoder, OpCode from rowhammer_tester.scripts.rowhammer import RowHammer, main -from rowhammer_tester.scripts.utils import ( - DRAMAddressConverter, - RemoteClient, - hw_memset, - hw_memtest, - litex_server, - memwrite, - setup_inverters, -) +from rowhammer_tester.scripts.utils import hw_memset, hw_memtest, memwrite, setup_inverters ################################################################################ diff --git a/rowhammer_tester/scripts/logs2plot.py b/rowhammer_tester/scripts/logs2plot.py index 3cb1ea49b..1bc1db648 100644 --- a/rowhammer_tester/scripts/logs2plot.py +++ b/rowhammer_tester/scripts/logs2plot.py @@ -6,7 +6,6 @@ import argparse import json -import os from math import floor from pathlib import Path diff --git a/rowhammer_tester/scripts/logs2vis.py b/rowhammer_tester/scripts/logs2vis.py index ec1fa67f1..872731ffb 100644 --- a/rowhammer_tester/scripts/logs2vis.py +++ b/rowhammer_tester/scripts/logs2vis.py @@ -7,7 +7,6 @@ import argparse import datetime import json -import os from pathlib import Path from rowhammer_tester.scripts.utils import get_generated_file diff --git a/rowhammer_tester/scripts/mem.py b/rowhammer_tester/scripts/mem.py index 6fa8c4af9..1f89297d9 100755 --- a/rowhammer_tester/scripts/mem.py +++ b/rowhammer_tester/scripts/mem.py @@ -2,17 +2,20 @@ import argparse import itertools -import os import random import sys - -from rowhammer_tester.scripts.read_level import ( - Settings, - read_level, - read_level_hardcoded, - write_level_hardcoded, +import time + +from rowhammer_tester.scripts.utils import ( + RemoteClient, + compare, + litex_server, + memread, + memspeed, + memwrite, + read_ident, + sdram_hardware_control, ) -from rowhammer_tester.scripts.utils import * # Perform a memory test using a random data pattern and linear addressing diff --git a/rowhammer_tester/scripts/playbook/payload_generators/half_double_analysis.py b/rowhammer_tester/scripts/playbook/payload_generators/half_double_analysis.py index 76672be7e..0badd5aa5 100644 --- a/rowhammer_tester/scripts/playbook/payload_generators/half_double_analysis.py +++ b/rowhammer_tester/scripts/playbook/payload_generators/half_double_analysis.py @@ -1,22 +1,23 @@ import math -from collections import OrderedDict, defaultdict +from collections import defaultdict from enum import Enum -from rowhammer_tester.gateware.payload_executor import Decoder, Encoder, OpCode from rowhammer_tester.scripts.playbook.lib import ( generate_payload_from_row_list, get_range_from_rows, ) from rowhammer_tester.scripts.playbook.payload_generators import PayloadGenerator -from rowhammer_tester.scripts.playbook.row_generators import RowGenerator + +# The following imports allow to fetch appropriate classes via `get_by_name` method +from rowhammer_tester.scripts.playbook.row_generators import RowGenerator # noqa: F401 from rowhammer_tester.scripts.playbook.row_generators.half_double import HalfDoubleRowGenerator -from rowhammer_tester.scripts.playbook.row_mappings import ( +from rowhammer_tester.scripts.playbook.row_mappings import ( # noqa: F401 RowMapping, TrivialRowMapping, TypeARowMapping, TypeBRowMapping, ) -from rowhammer_tester.scripts.utils import get_expected_execution_cycles, validate_keys +from rowhammer_tester.scripts.utils import validate_keys class HalfDoubleAnalysisState(Enum): diff --git a/rowhammer_tester/scripts/playbook/payload_generators/hammer_tolerance.py b/rowhammer_tester/scripts/playbook/payload_generators/hammer_tolerance.py index 0b9deed37..76b133bdc 100644 --- a/rowhammer_tester/scripts/playbook/payload_generators/hammer_tolerance.py +++ b/rowhammer_tester/scripts/playbook/payload_generators/hammer_tolerance.py @@ -5,7 +5,9 @@ get_range_from_rows, ) from rowhammer_tester.scripts.playbook.payload_generators import PayloadGenerator -from rowhammer_tester.scripts.playbook.row_mappings import ( + +# The following imports allow to fetch appropriate Row Mapping class via `get_by_name` method +from rowhammer_tester.scripts.playbook.row_mappings import ( # noqa: F401 RowMapping, TrivialRowMapping, TypeARowMapping, diff --git a/rowhammer_tester/scripts/playbook/payload_generators/row_list.py b/rowhammer_tester/scripts/playbook/payload_generators/row_list.py index dff733ac7..3ae917b42 100644 --- a/rowhammer_tester/scripts/playbook/payload_generators/row_list.py +++ b/rowhammer_tester/scripts/playbook/payload_generators/row_list.py @@ -1,11 +1,15 @@ -from collections import OrderedDict, defaultdict - from rowhammer_tester.scripts.playbook.lib import generate_payload_from_row_list from rowhammer_tester.scripts.playbook.payload_generators import PayloadGenerator from rowhammer_tester.scripts.playbook.row_generators import RowGenerator -from rowhammer_tester.scripts.playbook.row_generators.even_rows import EvenRowGenerator -from rowhammer_tester.scripts.playbook.row_generators.half_double import HalfDoubleRowGenerator -from rowhammer_tester.scripts.playbook.row_mappings import ( + +# The following imports allow to fetch appropriate classes via `get_by_name` method +from rowhammer_tester.scripts.playbook.row_generators.even_rows import ( # noqa: F401 + EvenRowGenerator, +) +from rowhammer_tester.scripts.playbook.row_generators.half_double import ( # noqa: F401 + HalfDoubleRowGenerator, +) +from rowhammer_tester.scripts.playbook.row_mappings import ( # noqa: F401 RowMapping, TrivialRowMapping, TypeARowMapping, diff --git a/rowhammer_tester/scripts/playbook/playbook.py b/rowhammer_tester/scripts/playbook/playbook.py index 6889337b9..5b3077acc 100644 --- a/rowhammer_tester/scripts/playbook/playbook.py +++ b/rowhammer_tester/scripts/playbook/playbook.py @@ -5,13 +5,17 @@ from collections import defaultdict from rowhammer_tester.scripts.playbook.payload_generators import PayloadGenerator -from rowhammer_tester.scripts.playbook.payload_generators.half_double_analysis import ( + +# The following imports allow to fetch an appropriate Payload Generator with `get_by_name` method +from rowhammer_tester.scripts.playbook.payload_generators.half_double_analysis import ( # noqa: F401, E501 HalfDoubleAnalysisPayloadGenerator, ) -from rowhammer_tester.scripts.playbook.payload_generators.hammer_tolerance import ( +from rowhammer_tester.scripts.playbook.payload_generators.hammer_tolerance import ( # noqa: F401 HammerTolerancePayloadGenerator, ) -from rowhammer_tester.scripts.playbook.payload_generators.row_list import RowListPayloadGenerator +from rowhammer_tester.scripts.playbook.payload_generators.row_list import ( # noqa: F401 + RowListPayloadGenerator, +) from rowhammer_tester.scripts.utils import ( DRAMAddressConverter, RemoteClient, diff --git a/rowhammer_tester/scripts/playbook/row_generators/even_rows.py b/rowhammer_tester/scripts/playbook/row_generators/even_rows.py index b1a669ec7..0f6ebeee1 100644 --- a/rowhammer_tester/scripts/playbook/row_generators/even_rows.py +++ b/rowhammer_tester/scripts/playbook/row_generators/even_rows.py @@ -1,11 +1,5 @@ from rowhammer_tester.scripts.playbook.lib import get_range_from_rows from rowhammer_tester.scripts.playbook.row_generators import RowGenerator -from rowhammer_tester.scripts.playbook.row_mappings import ( - RowMapping, - TrivialRowMapping, - TypeARowMapping, - TypeBRowMapping, -) from rowhammer_tester.scripts.utils import validate_keys diff --git a/rowhammer_tester/scripts/playbook/row_generators/half_double.py b/rowhammer_tester/scripts/playbook/row_generators/half_double.py index c0836a36a..0f0f88e9e 100644 --- a/rowhammer_tester/scripts/playbook/row_generators/half_double.py +++ b/rowhammer_tester/scripts/playbook/row_generators/half_double.py @@ -1,12 +1,6 @@ from collections import defaultdict from rowhammer_tester.scripts.playbook.row_generators import RowGenerator -from rowhammer_tester.scripts.playbook.row_mappings import ( - RowMapping, - TrivialRowMapping, - TypeARowMapping, - TypeBRowMapping, -) from rowhammer_tester.scripts.utils import validate_keys diff --git a/rowhammer_tester/scripts/read_level.py b/rowhammer_tester/scripts/read_level.py index 26567795f..e64419f9e 100755 --- a/rowhammer_tester/scripts/read_level.py +++ b/rowhammer_tester/scripts/read_level.py @@ -6,7 +6,19 @@ from functools import reduce from operator import or_ -from rowhammer_tester.scripts.utils import * +from rowhammer_tester.scripts.utils import ( + RemoteClient, + compare, + get_litedram_settings, + read_ident, + sdram_software_control, +) + +# Fetch DFII command signals form the generated sdram_init.py file +try: + from sdram_init import * +except ModuleNotFoundError: + raise ModuleNotFoundError("sdram_init not loaded") # DRAM commands ---------------------------------- diff --git a/rowhammer_tester/scripts/rowhammer.py b/rowhammer_tester/scripts/rowhammer.py index da55f224d..82b6c81ec 100755 --- a/rowhammer_tester/scripts/rowhammer.py +++ b/rowhammer_tester/scripts/rowhammer.py @@ -5,7 +5,6 @@ import os import random import subprocess -import sys import time from pathlib import Path @@ -20,7 +19,6 @@ litex_server, memcheck, memfill, - memwrite, read_ident, ) diff --git a/rowhammer_tester/scripts/spd_eeprom.py b/rowhammer_tester/scripts/spd_eeprom.py index 6b3c55670..847a631c4 100755 --- a/rowhammer_tester/scripts/spd_eeprom.py +++ b/rowhammer_tester/scripts/spd_eeprom.py @@ -2,14 +2,11 @@ import argparse import itertools -import math import os -import sys import time import pexpect -from litedram.modules import SDRAMModule, parse_spd_hexdump -from pexpect import replwrap +from litedram.modules import SDRAMModule from rowhammer_tester.scripts.utils import ( RemoteClient, diff --git a/rowhammer_tester/scripts/utils.py b/rowhammer_tester/scripts/utils.py index c7e750f96..8b2fec5de 100755 --- a/rowhammer_tester/scripts/utils.py +++ b/rowhammer_tester/scripts/utils.py @@ -12,7 +12,7 @@ from migen import log2_int -from rowhammer_tester.gateware.payload_executor import Decoder, Encoder, OpCode +from rowhammer_tester.gateware.payload_executor import OpCode # ########################################################################### diff --git a/rowhammer_tester/targets/arty.py b/rowhammer_tester/targets/arty.py index 731202931..0036c23ba 100644 --- a/rowhammer_tester/targets/arty.py +++ b/rowhammer_tester/targets/arty.py @@ -6,7 +6,7 @@ from litex.soc.cores.clock import S7IDELAYCTRL, S7PLL from litex.soc.integration.builder import Builder from litex_boards.platforms import digilent_arty -from migen import * +from migen import ClockDomain, Module from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/common.py b/rowhammer_tester/targets/common.py index b1dc13018..7abaeb603 100644 --- a/rowhammer_tester/targets/common.py +++ b/rowhammer_tester/targets/common.py @@ -4,7 +4,6 @@ import logging import math import os -import time import git import litedram.modules as litedram_modules @@ -19,7 +18,8 @@ from liteeth.frontend.etherbone import LiteEthEtherbone from liteeth.phy import LiteEthS7PHYRGMII from liteeth.phy.model import LiteEthPHYModel -from litex.build.generic_platform import * +from litex.build.generic_platform import Pins, Subsignal +from litex.build.io import CRG from litex.build.sim import SimPlatform as _SimPlatform from litex.build.sim.config import SimConfig from litex.soc import doc @@ -29,9 +29,9 @@ from litex.soc.integration.soc import SoCRegion from litex.soc.integration.soc_core import SoCCore, colorer, soc_core_argdict, soc_core_args from litex.soc.interconnect import wishbone -from litex.soc.interconnect.csr import AutoCSR, CSRStatus, CSRStorage +from litex.soc.interconnect.csr import AutoCSR, CSRStorage from litex.tools.litex_sim import get_sdram_phy_settings -from migen import * +from migen import READ_FIRST, Constant, Memory, Module, Signal import rowhammer_tester.targets.modules as local_modules from rowhammer_tester.gateware.bist import PatternMemory, Reader, Writer diff --git a/rowhammer_tester/targets/ddr4_datacenter_test_board.py b/rowhammer_tester/targets/ddr4_datacenter_test_board.py index efc55f843..4379a19e2 100644 --- a/rowhammer_tester/targets/ddr4_datacenter_test_board.py +++ b/rowhammer_tester/targets/ddr4_datacenter_test_board.py @@ -1,15 +1,12 @@ #!/usr/bin/env python3 -import math - from litedram.phy import k7ddrphy -from liteeth.phy import LiteEthS7PHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.bitbang import I2CMaster, I2CMasterSim from litex.soc.cores.clock import S7IDELAYCTRL, S7PLL from litex.soc.integration.builder import Builder from litex_boards.platforms import antmicro_datacenter_ddr4_test_board -from migen import * +from migen import ClockDomain, Module from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/ddr5_test_board.py b/rowhammer_tester/targets/ddr5_test_board.py index e5a2acb8b..b59a77878 100644 --- a/rowhammer_tester/targets/ddr5_test_board.py +++ b/rowhammer_tester/targets/ddr5_test_board.py @@ -1,16 +1,13 @@ #!/usr/bin/env python3 -import math - from litedram.phy import ddr5 from litedram.phy.ddr5.s7phy import Xilinx7SeriesAsyncFIFOWrap -from liteeth.phy import LiteEthS7PHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.clock import S7IDELAYCTRL, S7MMCM, S7PLL from litex.soc.integration.builder import Builder -from litex.soc.interconnect.csr import CSR, AutoCSR, CSRStatus, CSRStorage +from litex.soc.interconnect.csr import AutoCSR, CSRStorage from litex_boards.platforms import antmicro_ddr5_test_board -from migen import * +from migen import ClockDomain, ClockSignal, If, Instance, Module, Signal from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/ddr5_tester.py b/rowhammer_tester/targets/ddr5_tester.py index 7b59af910..4085826d3 100644 --- a/rowhammer_tester/targets/ddr5_tester.py +++ b/rowhammer_tester/targets/ddr5_tester.py @@ -1,18 +1,13 @@ #!/usr/bin/env python3 -import math - from litedram.phy import ddr5 -from liteeth.phy import LiteEthS7PHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.bitbang import I2CMaster from litex.soc.cores.clock import S7IDELAYCTRL, S7MMCM, S7PLL from litex.soc.integration.builder import Builder from litex.soc.integration.doc import ModuleDoc from litex_boards.platforms import antmicro_ddr5_tester -from migen import * -from migen.genlib.cdc import MultiReg -from migen.genlib.resetsync import AsyncResetSynchronizer +from migen import ClockDomain, ClockSignal, Module from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/ddr5_tester_linux.py b/rowhammer_tester/targets/ddr5_tester_linux.py index 77fc7e504..9e8480bdf 100755 --- a/rowhammer_tester/targets/ddr5_tester_linux.py +++ b/rowhammer_tester/targets/ddr5_tester_linux.py @@ -7,7 +7,6 @@ from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.cpu.vexriscv_smp.core import VexRiscvSMP from litex.soc.integration.builder import Builder -from migen import * # SoC ---------------------------------------------------------------------------------------------- diff --git a/rowhammer_tester/targets/lpddr4_test_board.py b/rowhammer_tester/targets/lpddr4_test_board.py index e33777cde..41c0e470d 100644 --- a/rowhammer_tester/targets/lpddr4_test_board.py +++ b/rowhammer_tester/targets/lpddr4_test_board.py @@ -1,14 +1,11 @@ #!/usr/bin/env python3 -import math - from litedram.phy import lpddr4 -from liteeth.phy import LiteEthS7PHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.clock import S7IDELAYCTRL, S7PLL from litex.soc.integration.builder import Builder from litex_boards.platforms import antmicro_lpddr4_test_board -from migen import * +from migen import ClockDomain, Module from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/lpddr5_test_board.py b/rowhammer_tester/targets/lpddr5_test_board.py index ac79609ee..61338ae4e 100644 --- a/rowhammer_tester/targets/lpddr5_test_board.py +++ b/rowhammer_tester/targets/lpddr5_test_board.py @@ -1,14 +1,11 @@ #!/usr/bin/env python3 -import math - from litedram.phy import lpddr5 -from liteeth.phy import LiteEthS7PHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.clock import S7IDELAYCTRL, S7PLL from litex.soc.integration.builder import Builder from litex_boards.platforms import antmicro_lpddr5_test_board -from migen import * +from migen import ClockDomain, Module from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/sodimm_ddr5_tester.py b/rowhammer_tester/targets/sodimm_ddr5_tester.py index d69bd94b7..28dacfa13 100644 --- a/rowhammer_tester/targets/sodimm_ddr5_tester.py +++ b/rowhammer_tester/targets/sodimm_ddr5_tester.py @@ -1,9 +1,6 @@ #!/usr/bin/env python3 -import math - from litedram.phy import ddr5 -from liteeth.phy import LiteEthS7PHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.bitbang import I2CMaster from litex.soc.cores.clock import S7IDELAYCTRL, S7MMCM, S7PLL @@ -11,9 +8,7 @@ from litex.soc.integration.builder import Builder from litex.soc.integration.doc import ModuleDoc from litex_boards.platforms import antmicro_sodimm_ddr5_tester -from migen import * -from migen.genlib.cdc import MultiReg -from migen.genlib.resetsync import AsyncResetSynchronizer +from migen import ClockDomain, ClockSignal, Module, Signal from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/sodimm_lpddr5_tester.py b/rowhammer_tester/targets/sodimm_lpddr5_tester.py index 8f475e2dc..4f0097723 100644 --- a/rowhammer_tester/targets/sodimm_lpddr5_tester.py +++ b/rowhammer_tester/targets/sodimm_lpddr5_tester.py @@ -1,19 +1,13 @@ #!/usr/bin/env python3 -import math -import os - from litedram.phy import lpddr5 -from liteeth.phy import LiteEthS7PHYRGMII -from litepcie.phy.s7pciephy import S7PCIEPHY -from litepcie.software import generate_litepcie_software from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.bitbang import I2CMaster from litex.soc.cores.clock import S7IDELAYCTRL, S7PLL from litex.soc.cores.gpio import GPIOIn, GPIOOut from litex.soc.integration.builder import Builder from litex_boards.platforms import antmicro_sodimm_ddr5_tester -from migen import * +from migen import ClockDomain, Module, Signal from rowhammer_tester.targets import common diff --git a/rowhammer_tester/targets/zcu104.py b/rowhammer_tester/targets/zcu104.py index 6230c5674..62855f691 100644 --- a/rowhammer_tester/targets/zcu104.py +++ b/rowhammer_tester/targets/zcu104.py @@ -1,7 +1,6 @@ #!/usr/bin/env python3 from litedram.phy import usddrphy -from liteeth.phy.usrgmii import LiteEthPHYRGMII from litex.build.xilinx.vivado import vivado_build_argdict, vivado_build_args from litex.soc.cores.bitbang import I2CMaster from litex.soc.cores.clock import USIDELAYCTRL, USMMCM @@ -9,8 +8,7 @@ from litex.soc.integration.soc_core import colorer from litex.soc.interconnect import axi, wishbone from litex_boards.platforms import xilinx_zcu104 -from migen import * -from migen.genlib.resetsync import AsyncResetSynchronizer +from migen import ClockDomain, ClockSignal, Instance, Module, Signal from rowhammer_tester.targets import common diff --git a/setup.py b/setup.py index 35b113c90..d2907595b 100644 --- a/setup.py +++ b/setup.py @@ -1,8 +1,6 @@ #!/usr/bin/env python3 from setuptools import setup -from setuptools import find_packages - setup( name="rowhammer_tester", diff --git a/tests/test_bist.py b/tests/test_bist.py index d5ed40fdf..40eaf3e4b 100644 --- a/tests/test_bist.py +++ b/tests/test_bist.py @@ -2,7 +2,8 @@ import unittest from litedram.common import LiteDRAMNativePort -from migen import * +from litex.gen.sim import passive, run_simulation +from migen import Module from rowhammer_tester.gateware.bist import PatternMemory, Reader, Writer diff --git a/tests/test_payload_executor.py b/tests/test_payload_executor.py index 2c50528af..83d7ad0c4 100644 --- a/tests/test_payload_executor.py +++ b/tests/test_payload_executor.py @@ -3,11 +3,19 @@ from litedram.dfii import DFIInjector from litedram.phy import dfi -from litex.gen.sim import * -from migen import * +from litex.gen.sim import passive, run_simulation +from migen import Memory, Module, Signal from migen.genlib.coding import Decoder as OneHotDecoder -from rowhammer_tester.gateware.payload_executor import * +from rowhammer_tester.gateware.payload_executor import ( + Decoder, + DFIExecutor, + DFISwitch, + Encoder, + OpCode, + PayloadExecutor, + Scratchpad, +) class Hex: