From b340bca353fb4c26da5f22d4ec431738a828005f Mon Sep 17 00:00:00 2001
From: Daniel Schultz <dnltz@aesc-silicon.de>
Date: Tue, 21 Jan 2025 10:56:18 +0100
Subject: [PATCH] .github: Add first nightly check

Build and check this design every night with IHP's dev branch.

Next step would be to also use ORFS master and check for zero
DRC issues.

Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
---
 .github/workflows/nightly.yaml | 39 ++++++++++++++++++++++++++++++++++
 Taskfile.yml                   |  3 ++-
 manifest-nightly.xml           | 14 ++++++++++++
 3 files changed, 55 insertions(+), 1 deletion(-)
 create mode 100644 .github/workflows/nightly.yaml
 create mode 100644 manifest-nightly.xml

diff --git a/.github/workflows/nightly.yaml b/.github/workflows/nightly.yaml
new file mode 100644
index 0000000..b3730a8
--- /dev/null
+++ b/.github/workflows/nightly.yaml
@@ -0,0 +1,39 @@
+name: Check Design Flow from RTL to GDS
+
+on:
+  schedule:
+    - cron: '0 4 * * *'
+
+jobs:
+  build:
+
+    runs-on: ubuntu-latest
+    timeout-minutes: 60
+
+    steps:
+    - uses: actions/checkout@v4
+
+    - name: Install dependencies
+      run: |
+        sudo snap install task --classic
+        sudo apt install virtualenv
+
+    - name: Prepare the project
+      run: |
+        task install nightly=true
+
+    - name: Prepare files
+      run: |
+        IS_HEADLESS=true task prepare
+
+    - name: Generate layout
+      run: |
+        IS_HEADLESS=true task layout
+
+    - name: Add metal fill
+      run: |
+        IS_HEADLESS=true task filler
+
+    - name: RUN maximal DRC
+      run: |
+        IS_HEADLESS=true task run-drc
diff --git a/Taskfile.yml b/Taskfile.yml
index f6b78ec..2a35727 100644
--- a/Taskfile.yml
+++ b/Taskfile.yml
@@ -32,7 +32,7 @@ tasks:
       - venv/bin/pip3 install podman-compose==1.0.6
       - curl https://storage.googleapis.com/git-repo-downloads/repo > repo
       - chmod a+rx repo
-      - ./repo init -u https://github.com/aesc-silicon/i2c-gpio-expander.git -b {{if .branch}}{{.branch}}{{else}}main{{end}} -m manifest.xml
+      - ./repo init -u https://github.com/aesc-silicon/i2c-gpio-expander.git -b {{if .branch}}{{.branch}}{{else}}main{{end}} -m manifest{{if .nightly}}-nightly{{end}}.xml
 
   build-container:
     desc: Creates a container with all necessary host requirements pre-installed.
@@ -50,6 +50,7 @@ tasks:
       - task: repo-sync
     vars:
       branch: "main"
+      nightly: "false"
 
   fpga-prepare:
     desc: Produces the Verilog file and metadata needed for FPGA operations.
diff --git a/manifest-nightly.xml b/manifest-nightly.xml
new file mode 100644
index 0000000..1ff1cf0
--- /dev/null
+++ b/manifest-nightly.xml
@@ -0,0 +1,14 @@
+<?xml version='1.0' encoding='UTF-8'?>
+<manifest>
+	<remote fetch="https://github.com" name="github" />
+
+	<default remote="github" sync-j="8" />
+
+	<project name="aesc-silicon/elements-nafarr" path="modules/elements/nafarr" revision="627f70ec179a7689fa7e10a181f1e20b2296d299" />
+	<project name="aesc-silicon/elements-zibal" path="modules/elements/zibal" revision="b4212a426d1bd8142399874ec2eed01f1bba583d" />
+	<project name="SpinalHDL/SpinalCrypto" path="modules/elements/SpinalCrypto" revision="f2a4ae9db5e9434c5589d0651efec8719103498e" />
+	<project name="aesc-silicon/elements-vexriscv" path="modules/elements/vexriscv" revision="7f2bccbef256b3ad40fb8dc8ba08a266f9c6256b" />
+	<project name="aesc-silicon/gdsiistl" path="tools/gdsiistl" revision="5884b20565a765f10918eedc0787a2beb6a682fd" />
+	<project name="The-OpenROAD-Project/OpenROAD-flow-scripts" path="tools/OpenROAD-flow-scripts" revision="master" />
+	<project name="IHP-GmbH/IHP-Open-PDK" sync-s="true" path="pdks/IHP-Open-PDK" revision="dev" />
+</manifest>