From 9dc8927f05400be42444c6e066fd753656578754 Mon Sep 17 00:00:00 2001
From: Amit Levy <aalevy@gmail.com>
Date: Wed, 20 Nov 2024 10:13:47 -0800
Subject: [PATCH] sifive: plic: add TODO comment for MAX_INTERRUPTS

---
 chips/sifive/src/plic.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/chips/sifive/src/plic.rs b/chips/sifive/src/plic.rs
index aed9603fb4..3be43a7ede 100644
--- a/chips/sifive/src/plic.rs
+++ b/chips/sifive/src/plic.rs
@@ -18,6 +18,8 @@ use kernel::utilities::StaticRef;
 ///    https://github.com/riscv/riscv-plic-spec/blob/master/riscv-plic.adoc
 ///    is defining maximum of 1023 interrupt sources
 
+// TODO: replace with const generic for `priority` and `_reserved1` field
+// in the [PlicRegisters] when const generic expressions are stable
 const MAX_INTERRUPTS: usize = 1023;
 /// maximum number of bit-coded registers, 1 bit per interrupt
 const MAX_BIT_REGS: usize = MAX_INTERRUPTS.div_ceil(32);