-
+ The imaginary unit is \(\sqrt{-1}\). It is often referred - to as \(i\), but in - electronics, often \(I\) is - used for a DC current (time independent) and \(i\) is used for an AC current - (time dependent)… also sometimes this convention is flipped. - For sake of clarity, even if \(i\) is not being used to represent - current, \(j\) is often used - in the context of electronics for representing the imaginary - unit
+The imaginary unit is \(\sqrt{-1}\). It is often referred to as \(i\), but in electronics, often \(I\) is used for a DC current (time independent) and \(i\) is used for an AC current (time dependent)… also sometimes this convention is flipped. For sake of clarity, even if \(i\) is not being used to represent current, \(j\) is often used in the context of electronics for representing the imaginary unit
\[j=\sqrt{-1}\]
-Complex numbers, generically are represented with the - variable \(z\). In general, - complex numbers have real and imaginary parts
+Complex numbers, generically are represented with the variable \(z\). In general, complex numbers have real and imaginary parts
\[z=a+jb\]
-where \(a\) is the real - part and \(b\) is the - imaginary part
-\[\text{Re}{[z]} = a\] - \[\text{Im}{[z]} = b\]
-It is easy to add and subtract complex numbers in this - form
-\[z_1 + z_2 = (a_1 + a_2) + j - (b_1 + b_2)\]
+where \(a\) is the real part and \(b\) is the imaginary part
+\[\text{Re}{[z]} = a\] \[\text{Im}{[z]} = b\]
+It is easy to add and subtract complex numbers in this form
+\[z_1 + z_2 = (a_1 + a_2) + j (b_1 + b_2)\]
Multiplying and dividing in this form is a bit trickier
-\[z_1\cdot z_2 = (a_1a_2-b_1b_2) - + j(a_1b_2+a_2b_1)\]
-\[\frac{z_1}{z_2} = \text{no - thanks}\]
-\[z_1\cdot z_2 = (a_1a_2-b_1b_2) + j(a_1b_2+a_2b_1)\]
+\[\frac{z_1}{z_2} = \text{no thanks}\]
+
-
+ Another common representation of complex numbers is to write - them in terms of their amplitude and phase
+Another common representation of complex numbers is to write them in terms of their amplitude and phase
\[z=|z|e^{j\phi}\]
where
-\[|z| = - \sqrt{a^2+b^2}\]
-\[\tan\phi = - \frac{b}{a}\]
-This representation is better for multiplication and - division
-\[z_1\cdot z_2 = |z_1|\cdot|z_2|\ - e^{j(\phi_1 + \phi_2)}\]
-\[\frac{z_1}{z_2} = - \frac{|z_1|}{|z_2|}\ e^{j(\phi_1 - \phi_2)}\]
-A complex conjugate \(z^*\) - can be determined by replacing all instances of \(j\) with \(-j\).
+\[|z| = \sqrt{a^2+b^2}\]
+\[\tan\phi = \frac{b}{a}\]
+This representation is better for multiplication and division
+\[z_1\cdot z_2 = |z_1|\cdot|z_2|\ e^{j(\phi_1 + \phi_2)}\]
+\[\frac{z_1}{z_2} = \frac{|z_1|}{|z_2|}\ e^{j(\phi_1 - \phi_2)}\]
+A complex conjugate \(z^*\) can be determined by replacing all instances of \(j\) with \(-j\).
If
-\[z = a+jb = - |z|e^{j\phi}\]
+\[z = a+jb = |z|e^{j\phi}\]
then
-\[z^* = a - jb = - |z|e^{-j\phi}\]
-The magnitude of a complex number \(|z|\) can be calculated by taking - the square root of the product of the complex number with its - complex conjugate
+\[z^* = a - jb = |z|e^{-j\phi}\]
+The magnitude of a complex number \(|z|\) can be calculated by taking the square root of the product of the complex number with its complex conjugate
\[|z| = \sqrt{zz^*}\]
-This is the best form for keeping track of the phase of a - wave.
-A transfer function is a time-independent relationship - between an input and an output. It can be defined as
-\[T = \frac{\text{output - function}}{\text{input function}}\]
-In this course, we will mostly use transfer functions to - relate output voltages to input voltages, such that
-\[V_\text{out}(t) = - TV_\text{in}(t)\]
-A transfer function can be complex. This means that applying - it will not only scale the magnitude, but also shift the phase. - A generic complex \(T\) is - best put into the form
+This is the best form for keeping track of the phase of a wave.
+A transfer function is a time-independent relationship between an input and an output. It can be defined as
+\[T = \frac{\text{output function}}{\text{input function}}\]
+In this course, we will mostly use transfer functions to relate output voltages to input voltages, such that
+\[V_\text{out}(t) = TV_\text{in}(t)\]
+A transfer function can be complex. This means that applying it will not only scale the magnitude, but also shift the phase. A generic complex \(T\) is best put into the form
\[T = |T|e^{j\delta}\]
so that
-\[V_\text{out}(t) = - |T|V_\text{in}(t)e^{j\delta}\]
-All waves can be represented in terms of sine or cosine wave - components in a Fourier series.
-\[\begin{split}V_\text{in}(t)
- =& \sum_i a_i \cos{(\omega_i t + \phi_i)}\\
- V_\text{out}(t) =&\ T\sum_i a_i \cos{(\omega_i t +
- \phi_i)}\\
+ \[V_\text{out}(t) = |T|V_\text{in}(t)e^{j\delta}\] All waves can be represented in terms of sine or cosine wave components in a Fourier series. \[\begin{split}V_\text{in}(t) =& \sum_i a_i \cos{(\omega_i t + \phi_i)}\\
+ V_\text{out}(t) =&\ T\sum_i a_i \cos{(\omega_i t + \phi_i)}\\
=&\ \sum_i a_i |T| \cos{(\omega_i t + \phi_i)}e^{j\delta}
\end{split}\] However \(\cos(\omega_i
- t+\phi_i)e^{j\delta}\) is not the easiest to work with.
- Instead, you can represent all cosines and sines as the real
- and imaginary parts of a single complex exponential \[\cos{(\omega t + \phi)}
- \rightarrow e^{j(\omega t + \phi)}\] This will make the math much easier to work with and then at
- the end, you can just take the real part. The equations above
- become \[\begin{split}\tilde{V}_\text{in}(t)
- =& \sum_i a_i e^{j(\omega_i t + \phi_i)}\\
- \tilde{V}_\text{out}(t) =& \sum_i a_i |T| e^{j(\omega_i t +
- \phi_i)}e^{j\delta}\\
+ However \(\cos(\omega_i t+\phi_i)e^{j\delta}\) is not the easiest to work with. Instead, you can represent all cosines and sines as the real and imaginary parts of a single complex exponential \[\cos{(\omega t + \phi)} \rightarrow e^{j(\omega t + \phi)}\] This will make the math much easier to work with and then at the end, you can just take the real part. The equations above become \[\begin{split}\tilde{V}_\text{in}(t) =& \sum_i a_i e^{j(\omega_i t + \phi_i)}\\
+ \tilde{V}_\text{out}(t) =& \sum_i a_i |T| e^{j(\omega_i t + \phi_i)}e^{j\delta}\\
=& \sum_i a_i |T| e^{j(\omega_i t + \phi_i+\delta)}
\end{split}\] And then the real part can be taken to find \(V_\text{out}\) And then the real part can be taken to find \(V_\text{out}\) \[\begin{split}
V_\text{out}&=\text{Re}[\tilde{V}_\text{out}]\\
&= \sum_i a_i |T| \cos{(\omega_i t + \phi_i+\delta)}
\end{split}\] So each cosine component gets scaled by \(|T|\) and shifted by an amount of
- time of \(\delta/\omega_i\)
- (aka a phase shift). So each cosine component gets scaled by \(|T|\) and shifted by an amount of time of \(\delta/\omega_i\) (aka a phase shift). Write the following complex numbers in terms of
- magnitude and phase Write the following complex numbers in terms of magnitude and phase \[z=\frac{A}{1+jx}\] \[z=\frac{jx}{1+jx}\] \[z=\frac{A}{1+jx}\] \[z=\frac{jx}{1+jx}\] Let \(z_1=\sqrt{8}e^{j\frac{3\pi}{4}}\),
- \(z_2=2e^{j\frac{\pi}{6}}\) Let \(z_1=\sqrt{8}e^{j\frac{3\pi}{4}}\), \(z_2=2e^{j\frac{\pi}{6}}\) Represent \(z_1\) and
- \(z_2\) in the complex plane
- and find their real and imaginary parts Evaluate \(z_1 + z_2\)
- and \(z_1^2z_2^3\) Represent \(z_1\) and \(z_2\) in the complex plane and find their real and imaginary parts Evaluate \(z_1 + z_2\) and \(z_1^2z_2^3\) By writing out \(\cos\theta\) in terms of
- exponentials and using the binomial expansion, express \((\cos\theta)^5\) in terms of \(\cos\theta\), \(\cos 3\theta\), and \(\cos 5\theta\). By writing out \(\cos\theta\) in terms of exponentials and using the binomial expansion, express \((\cos\theta)^5\) in terms of \(\cos\theta\), \(\cos 3\theta\), and \(\cos 5\theta\). Evaluate the sum \[\sum_{n=-N}^N\cos(\theta+n\phi)\] \[\sum_{n=-N}^N\cos(\theta+n\phi)\] \[A_0\cos\omega_1 t
- +A_0\cos\omega_2 t\] (where \(A_0\)
- is a constant) in the form of \[A(t)\cos\frac{\omega_1+\omega_2}{2}t\] where \(A(t)\)
- is a slowly varying function of time. \[A_0\cos\omega_1 t +A_0\cos\omega_2 t\] (where \(A_0\) is a constant) in the form of \[A(t)\cos\frac{\omega_1+\omega_2}{2}t\] where \(A(t)\) is a slowly varying function of time. In this lab you will get your first exposure with op-amps
- and use them to build two incredibly useful circuits: the
- voltage buffer (aka voltage follower), and the non-inverting
- amplifier. These two circuits are closely related and are used
- in many applications. Op-amps serve many purposes, but one of the main uses is to
- amplify a small signal by increasing the voltage level while
- preserving as accurately as possible the original waveform. In
- real physics experiments, transducers are used to convert basic
- physical quantities into electric signals, as shown in Figure
- 1. An amplifier is usually
- needed to raise the small transducer voltage (μV to mV) to a
- useful level (mV to V) for the signal to be measured
- reliably. In this lab you will get your first exposure with op-amps and use them to build two incredibly useful circuits: the voltage buffer (aka voltage follower), and the non-inverting amplifier. These two circuits are closely related and are used in many applications. Op-amps serve many purposes, but one of the main uses is to amplify a small signal by increasing the voltage level while preserving as accurately as possible the original waveform. In real physics experiments, transducers are used to convert basic physical quantities into electric signals, as shown in Figure 1. An amplifier is usually needed to raise the small transducer voltage (μV to mV) to a useful level (mV to V) for the signal to be measured reliably. Even though there are commercial amplifiers available for
- purchase, they are often very expensive (>$1000) and have
- many features that may not be needed. Meanwhile, you can design
- your own simple amplifier with an op-amp which could cost less
- than a dollar. To prepare for this lab, you will learn to apply new
- analysis techniques (the op-amp golden rules) to predict the
- behavior and inform the design of op-amp circuits. In this lab,
- you will: Even though there are commercial amplifiers available for purchase, they are often very expensive (>$1000) and have many features that may not be needed. Meanwhile, you can design your own simple amplifier with an op-amp which could cost less than a dollar. To prepare for this lab, you will learn to apply new analysis techniques (the op-amp golden rules) to predict the behavior and inform the design of op-amp circuits. In this lab, you will: Explore obstacles due to the function generator’s output
- impedance. Learn how to easily test an op-amp to see if it’s
- working. Explore obstacles due to the function generator’s output impedance. Learn how to easily test an op-amp to see if it’s working. Build a voltage buffer (follower) to Build a non-inverting amplifier to amplify small signals
- and test Build a non-inverting amplifier to amplify small signals and test The op-amp is, essentially, a “perfect part”: a complete
- integrated amplifier gain block, best thought of as a
- dc-coupled differential amplifier with single-ended output, and
- with extraordinarily high gain. It also excels in precise input
- symmetry and nearly zero input current. Op-amps are designed as
- “gain engines” for negative feedback, with such high gain that
- the circuit performance is set almost entirely by the feedback
- circuitry. Op-amps are small and inexpensive, and they should
- be the starting point for nearly every analog circuit you
- design. In most op-amp circuit designs we’re in the regime
- where they are essentially perfect: with them we will learn to
- build nearly perfect amplifiers, current sources, integrators,
- filters, regulators, current-to voltage converters, and a host
- of other modules. (Horowitz and Hill 3rd Ed.
- 223) The op-amp is, essentially, a “perfect part”: a complete integrated amplifier gain block, best thought of as a dc-coupled differential amplifier with single-ended output, and with extraordinarily high gain. It also excels in precise input symmetry and nearly zero input current. Op-amps are designed as “gain engines” for negative feedback, with such high gain that the circuit performance is set almost entirely by the feedback circuitry. Op-amps are small and inexpensive, and they should be the starting point for nearly every analog circuit you design. In most op-amp circuit designs we’re in the regime where they are essentially perfect: with them we will learn to build nearly perfect amplifiers, current sources, integrators, filters, regulators, current-to voltage converters, and a host of other modules. (Horowitz and Hill 3rd Ed. 223) In this lab, you will use op-amps to build a voltage buffer
- and a non-inverting amplifier. Op-amps are ICs (integrated
- circuits) made up of many transistors. Most textbooks discuss
- transistors prior to op-amps; we are going in the opposite
- order because we are not particularly interested in how op-amps
- are designed and the details of the inner workings (however,
- this could be explored in a final project). When considering
- how op-amps work at a higher level, the analysis is often far
- easier than that of transistor circuits. The GOLDEN
- RULES can be used to solve most op-amp circuits
- with relative ease; these golden rules are approximations
- (which most of the time are quite accurate) that greatly reduce
- the complexity of op-amp circuit analysis. In this lab, you will use op-amps to build a voltage buffer and a non-inverting amplifier. Op-amps are ICs (integrated circuits) made up of many transistors. Most textbooks discuss transistors prior to op-amps; we are going in the opposite order because we are not particularly interested in how op-amps are designed and the details of the inner workings (however, this could be explored in a final project). When considering how op-amps work at a higher level, the analysis is often far easier than that of transistor circuits. The GOLDEN RULES can be used to solve most op-amp circuits with relative ease; these golden rules are approximations (which most of the time are quite accurate) that greatly reduce the complexity of op-amp circuit analysis. The op-amp has two inputs (inverting and non-inverting) and
- one output. It can be thought of as a “black-box” (as seen in
- Figure 2) which has an internal
- voltage source that is controlled by the potential difference
- between the non-inverting input and the inverting input. The
- op-amp’s output is the difference between the inputs times
- the open-loop gain \(A\). \[V_\text{out} = A
- (V_+-V_-)\] Note that this is true when there is no voltage drop across
- \(R_o\). Op-amps have very
- small output impedance, and for an ideal op-amp, \(R_o=0\). Definition 1: Open-loop gain, \(A\) - the gain of the
- op-amp when there is no feedback. The open-loop gain depends on frequency according to the
- following equation: \[A(f) =
- \frac{A_\text{VOL}}{1+j\frac{f}{f_0}}\] where \(A_\text{VOL}\) is
- the open-loop DC gain and \(f_0\) is the open-loop 3
- dB point. Notice that this is the same kind of
- equation as a low-pass filter. At low frequencies, this
- equation is flat and equal to \(A_\text{VOL}\), but near the 3 dB
- point, it starts to drop (this drop is typically described in
- dB/octave or dB/decade) and can be reported in strange units
- like V/mV (which is essentially a weird way of writing \(10^3\)). Definition 2: Open-loop DC gain, \(A_\text{VOL}\) - The
- open-loop gain at low frequencies before the frequency
- dependence starts to take over and the open-loop gain starts to
- decrease. This is cited in any op-amp datasheet (sometimes as
- \(A_\text{OL}\) or \(A_\text{VO}\)). Definition 3: Open-loop 3 dB point, \(f_0\) - The frequency
- that the open-loop gain falls -3 dB from \(A_\text{VOL}\). Beyond this
- frequency, \(A\) typically
- continues to fall with a constant dB per log-scale (quoted in
- dB/octave (log2) or dB/decade (log10)). This value is usually
- not quoted in datasheets. It can be
- calculated from other values, and people often aren’t concerned
- with the value of \(f_0\). An ideal op-amp has an open-loop gain of
- infinity and does not depend on frequency. Treating
- the gain as infinite is usually a really good approximation
- because real op-amps have open-loop gain values of \(10^5-10^8\). This approximation is
- known as the first GOLDEN RULE of
- op-amps. GOLDEN RULE 1: The open-loop gain is
- infinitely large: \(A\rightarrow\infty\). In this lab, you will be using the LF356 op-amp. Open up its
- datasheet on the Datasheets and Instrument
- Manuals page. You should keep this open, as you’ll refer to
- it multiple times throughout the prelab and lab activities.
- Starting on page 2 there are tables with values for various
- properties of this op-amp and other closely related op-amps
- (make sure you pull values from the right column). What is the open-loop DC gain, \(A_\text{VOL}\)? Report it as a
- unitless number. Op-amps have input terminals that are designed to have very
- large input impedances (\(R_i\) in Figure 2), such that virtually no current
- can flow into or out of the inputs. The second
- GOLDEN RULE assumes that the input
- impedance is infinitely large and no
- current flows in or out of the inputs. GOLDEN RULE 2: No current flows in or out
- of the inputs: \(I_+=I_-=0\). According to the datasheet, what is the input impedance
- (resistance) \(R_i\)? Op-amps have very low output impedances (\(R_o\) in Figure 2) allowing them to efficiently drive
- loads (think back to the input and output impedance
- considerations from lab 2). However, regardless of the output
- impedance, there is current limit inherent to each op-amp
- design. The current limit (maximum output current) is an
- important consideration when it comes to the ability of an
- op-amp to drive a load. What is the maximum output positive current at \(0\text{ V}\) for a supply voltage
- of \(\pm 15 \text{ V}\) at
- \(25 ^{\circ} \text{C}\) (look
- for a graph on page 5)? Negative feedback is at the heart of nearly every op-amp
- circuit. The op-amp itself doesn’t have negative feedback; it
- has to be externally applied by feeding back part of (or all
- of) the output voltage back into the inverting input \(V_-\). Negative feedback results
- in a circuit with a closed-loop gain, \(G<A\), which depends on the
- amount of \(V_\text{out}\)
- that is fed back into \(V_-\).
- The feedback also improves the linearity and stability of the
- output and greatly increases the bandwidth: the 3 dB
- point \(f_b >
- f_0\). In fact, the bandwidth times the DC gain is a
- constant value called the gain bandwidth
- product (\(\text{GBW}\)), so the smaller the
- gain, the wider the bandwidth. When the gain is 1, the 3 dB
- point is equal to the \(\text{GBW}\) and is referred to as
- the unity gain frequency, \(f_T\) (unity means 1). Often
- unity gain frequency and gain
- bandwidth product are used interchangeably since they
- are mathematically the same value. All these values can be
- related to each other with the following equations: \[\text{GBW} = G_0 f_B = 1\cdot
- f_T = A_\text{VOL}f_0\] The frequency dependence of \(G\) follows the same form as for
- \(A\), but with a larger
- bandwidth: \[G(f)=\frac{G_0}{1+j\frac{f}{f_B}}\] Definition 4: Closed-loop gain, \(G\) - when a fraction of
- the output is fed back into the inverting input \(V_-\), the op-amp’s gain is
- greatly reduced from \(A\) to
- some value \(G\). Just like
- the open-loop gain, this value is frequency dependent and
- starts to fall from \(G_0\)
- near the 3 dB point, \(f_B\). Definition 5: Closed-loop DC gain, \(G_0\) - the closed-loop
- gain at frequencies well below the 3 dB point. Except in active
- filter design, the point of an op-amp is to operate at a
- frequency such that \(G(f)=G_0\), so almost always, the
- closed-loop DC gain is referred to simply as
- THE gain. Definition 6: 3 dB point, \(f_B\) - the frequency
- where \(G\) drops -3 dB from
- \(G_0\). This is also often
- referred to as the bandwidth or operating bandwidth, as typical
- operation should be done below this frequency. Definition 7: gain bandwidth product, \(\text{GBW}\) - the
- product of the DC gain and the 3 dB point is a constant value.
- This should be cited in datasheets as it’s a foundational
- property of each op-amp’s internal design. Just like resistor
- values, however, the precise \(\text{GBW}\) varies from op-amp to
- op-amp of the same name. Definition 8: unity gain frequency, \(f_T\) - the 3 dB point
- when the gain is 1 (unity). Since this is mathematically
- equivalent to the \(\text{GBW}\), these terms are
- often used interchangeably. Find the gain bandwidth product in the datasheet. Report
- this property, and calculate \(f_0\) using the open-loop DC gain
- found earlier in the datasheet. Create a Bode plot (which is a log-log plot of a property vs
- frequency) for the magnitude of various gain values shown
- above. (The template from last week’s lab should be useful
- here). The op-amp has two inputs (inverting and non-inverting) and one output. It can be thought of as a “black-box” (as seen in Figure 2) which has an internal voltage source that is controlled by the potential difference between the non-inverting input and the inverting input. The op-amp’s output is the difference between the inputs times the open-loop gain \(A\). \[V_\text{out} = A (V_+-V_-)\] Note that this is true when there is no voltage drop across \(R_o\). Op-amps have very small output impedance, and for an ideal op-amp, \(R_o=0\). Definition 1: Open-loop gain, \(A\) - the gain of the op-amp when there is no feedback. The open-loop gain depends on frequency according to the following equation: \[A(f) = \frac{A_\text{VOL}}{1+j\frac{f}{f_0}}\] where \(A_\text{VOL}\) is the open-loop DC gain and \(f_0\) is the open-loop 3 dB point. Notice that this is the same kind of equation as a low-pass filter. At low frequencies, this equation is flat and equal to \(A_\text{VOL}\), but near the 3 dB point, it starts to drop (this drop is typically described in dB/octave or dB/decade) and can be reported in strange units like V/mV (which is essentially a weird way of writing \(10^3\)). Definition 2: Open-loop DC gain, \(A_\text{VOL}\) - The open-loop gain at low frequencies before the frequency dependence starts to take over and the open-loop gain starts to decrease. This is cited in any op-amp datasheet (sometimes as \(A_\text{OL}\) or \(A_\text{VO}\)). Definition 3: Open-loop 3 dB point, \(f_0\) - The frequency that the open-loop gain falls -3 dB from \(A_\text{VOL}\). Beyond this frequency, \(A\) typically continues to fall with a constant dB per log-scale (quoted in dB/octave (log2) or dB/decade (log10)). This value is usually not quoted in datasheets. It can be calculated from other values, and people often aren’t concerned with the value of \(f_0\). An ideal op-amp has an open-loop gain of infinity and does not depend on frequency. Treating the gain as infinite is usually a really good approximation because real op-amps have open-loop gain values of \(10^5-10^8\). This approximation is known as the first GOLDEN RULE of op-amps. GOLDEN RULE 1: The open-loop gain is infinitely large: \(A\rightarrow\infty\). In this lab, you will be using the LF356 op-amp. Open up its datasheet on the Datasheets and Instrument Manuals page. You should keep this open, as you’ll refer to it multiple times throughout the prelab and lab activities. Starting on page 2 there are tables with values for various properties of this op-amp and other closely related op-amps (make sure you pull values from the right column). What is the open-loop DC gain, \(A_\text{VOL}\)? Report it as a unitless number. Op-amps have input terminals that are designed to have very large input impedances (\(R_i\) in Figure 2), such that virtually no current can flow into or out of the inputs. The second GOLDEN RULE assumes that the input impedance is infinitely large and no current flows in or out of the inputs. GOLDEN RULE 2: No current flows in or out of the inputs: \(I_+=I_-=0\). According to the datasheet, what is the input impedance (resistance) \(R_i\)? Op-amps have very low output impedances (\(R_o\) in Figure 2) allowing them to efficiently drive loads (think back to the input and output impedance considerations from lab 2). However, regardless of the output impedance, there is current limit inherent to each op-amp design. The current limit (maximum output current) is an important consideration when it comes to the ability of an op-amp to drive a load. What is the maximum output positive current at \(0\text{ V}\) for a supply voltage of \(\pm 15 \text{ V}\) at \(25 ^{\circ} \text{C}\) (look for a graph on page 5)? Negative feedback is at the heart of nearly every op-amp circuit. The op-amp itself doesn’t have negative feedback; it has to be externally applied by feeding back part of (or all of) the output voltage back into the inverting input \(V_-\). Negative feedback results in a circuit with a closed-loop gain, \(G<A\), which depends on the amount of \(V_\text{out}\) that is fed back into \(V_-\). The feedback also improves the linearity and stability of the output and greatly increases the bandwidth: the 3 dB point \(f_b > f_0\). In fact, the bandwidth times the DC gain is a constant value called the gain bandwidth product (\(\text{GBW}\)), so the smaller the gain, the wider the bandwidth. When the gain is 1, the 3 dB point is equal to the \(\text{GBW}\) and is referred to as the unity gain frequency, \(f_T\) (unity means 1). Often unity gain frequency and gain bandwidth product are used interchangeably since they are mathematically the same value. All these values can be related to each other with the following equations: \[\text{GBW} = G_0 f_B = 1\cdot f_T = A_\text{VOL}f_0\] The frequency dependence of \(G\) follows the same form as for \(A\), but with a larger bandwidth: \[G(f)=\frac{G_0}{1+j\frac{f}{f_B}}\] Definition 4: Closed-loop gain, \(G\) - when a fraction of the output is fed back into the inverting input \(V_-\), the op-amp’s gain is greatly reduced from \(A\) to some value \(G\). Just like the open-loop gain, this value is frequency dependent and starts to fall from \(G_0\) near the 3 dB point, \(f_B\). Definition 5: Closed-loop DC gain, \(G_0\) - the closed-loop gain at frequencies well below the 3 dB point. Except in active filter design, the point of an op-amp is to operate at a frequency such that \(G(f)=G_0\), so almost always, the closed-loop DC gain is referred to simply as THE gain. Definition 6: 3 dB point, \(f_B\) - the frequency where \(G\) drops -3 dB from \(G_0\). This is also often referred to as the bandwidth or operating bandwidth, as typical operation should be done below this frequency. Definition 7: gain bandwidth product, \(\text{GBW}\) - the product of the DC gain and the 3 dB point is a constant value. This should be cited in datasheets as it’s a foundational property of each op-amp’s internal design. Just like resistor values, however, the precise \(\text{GBW}\) varies from op-amp to op-amp of the same name. Definition 8: unity gain frequency, \(f_T\) - the 3 dB point when the gain is 1 (unity). Since this is mathematically equivalent to the \(\text{GBW}\), these terms are often used interchangeably. Find the gain bandwidth product in the datasheet. Report this property, and calculate \(f_0\) using the open-loop DC gain found earlier in the datasheet. Create a Bode plot (which is a log-log plot of a property vs frequency) for the magnitude of various gain values shown above. (The template from last week’s lab should be useful here). On the same log-log plot, plot \(|G(f)|\) for \(G_0=1\), \(100\), \(1000\), and \(A_\text{VOL}\) (as found in the
- datasheet) It will help to express \(|G(f)|\) in terms of the \(\text{GBW}\) (or \(f_T\)), instead of with respect to
- \(f_B\). This will simplify
- the Python function. Make the range of the x-axis from \(1\text{ Hz}-100\text{
- MHz}\) On the same log-log plot, plot \(|G(f)|\) for \(G_0=1\), \(100\), \(1000\), and \(A_\text{VOL}\) (as found in the datasheet) It will help to express \(|G(f)|\) in terms of the \(\text{GBW}\) (or \(f_T\)), instead of with respect to \(f_B\). This will simplify the Python function. Make the range of the x-axis from \(1\text{ Hz}-100\text{ MHz}\) Hint: \(G(f)\) is
- complex, so to find it’s magnitude you have to calculate \(\sqrt{GG^*}\) where \(G^*\) is the complex
- conjugate. Negative feedback also brings us to the third
- GOLDEN RULE: GOLDEN RULE 3: Negative feedback forces the
- voltage at the inverting input to equal the voltage at the
- non-inverting input; \(V_+=V_-\). Again, this an approximation. In reality \(V_+\approx V_-\); for there to be
- any \(V_\text{out}\), there
- has to be small differences between \(V_+\) and \(V_-\). A voltage buffer (aka voltage follower) is the simplest
- possible negative feedback ciruit you can build; you will use
- this circuit to demonstrate that you can show the 3rd
- golden rule to be true, given the first 2. In this circuit,
- all of the output is fed back into the
- inverting input, and the signal \(V_\text{in}\) is plugged directly
- into the non-inverting input. Hint: \(G(f)\) is complex, so to find it’s magnitude you have to calculate \(\sqrt{GG^*}\) where \(G^*\) is the complex conjugate. Negative feedback also brings us to the third GOLDEN RULE: GOLDEN RULE 3: Negative feedback forces the voltage at the inverting input to equal the voltage at the non-inverting input; \(V_+=V_-\). Again, this an approximation. In reality \(V_+\approx V_-\); for there to be any \(V_\text{out}\), there has to be small differences between \(V_+\) and \(V_-\). A voltage buffer (aka voltage follower) is the simplest possible negative feedback ciruit you can build; you will use this circuit to demonstrate that you can show the 3rd golden rule to be true, given the first 2. In this circuit, all of the output is fed back into the inverting input, and the signal \(V_\text{in}\) is plugged directly into the non-inverting input. Figure 3 shows a voltage
- buffer circuit. First notice there is no power to the op-amp in
- the diagram; often you’ll find op-amp example circuits without
- power explicitly drawn in, but op-amps
- always need power (the power is
- implied - see Figure 6 for a
- pinout of the LF356 Op-amp that includes the power info). Start with \(V_\text{out}=A(V_+-V_-)\), and use
- the first two golden rules to show that \(G_0=1\) and that \(V_+=V_-\). Hint: Start by plugging in \(V_+=V_\text{in}\) and \(V_-=V_\text{out}\) and solve for
- \(V_\text{out}/V_\text{in}\). Alongside the buffer, the non-inverting amplifier is one of
- the most used and simplest op-amp circuits; as the name
- implies, the non-inverting amplifier outputs a signal with
- greater amplitude than the input (without inverting it). It is
- very similar in design to the buffer, but with a resistor \(R_F\) in the feedback loop and a
- resistor \(R\) from the
- inverting input to ground. There are many ways you’ll see this
- diagram drawn as seen in Figure 4. Note that sometimes people
- draw the inverting input on top, and sometimes on bottom, but
- the feedback resistor always goes to the inverting input. Figure 3 shows a voltage buffer circuit. First notice there is no power to the op-amp in the diagram; often you’ll find op-amp example circuits without power explicitly drawn in, but op-amps always need power (the power is implied - see Figure 6 for a pinout of the LF356 Op-amp that includes the power info). Start with \(V_\text{out}=A(V_+-V_-)\), and use the first two golden rules to show that \(G_0=1\) and that \(V_+=V_-\). Hint: Start by plugging in \(V_+=V_\text{in}\) and \(V_-=V_\text{out}\) and solve for \(V_\text{out}/V_\text{in}\). Alongside the buffer, the non-inverting amplifier is one of the most used and simplest op-amp circuits; as the name implies, the non-inverting amplifier outputs a signal with greater amplitude than the input (without inverting it). It is very similar in design to the buffer, but with a resistor \(R_F\) in the feedback loop and a resistor \(R\) from the inverting input to ground. There are many ways you’ll see this diagram drawn as seen in Figure 4. Note that sometimes people draw the inverting input on top, and sometimes on bottom, but the feedback resistor always goes to the inverting input. The two resistors form a voltage divider feedback
- network with a transfer function \(B\) (think of \(R_F\) as \(R_1\) and \(R\) as \(R_2\) in the voltage divider
- equation from lab 2): \[B =
- \frac{R}{R_F+R}\] Use golden rules 2 and 3 to show that the DC gain, \(G_0\), of the non-inverting
- amplifier is \[G_0 = \frac{1}{B} = 1 +
- \frac{R_F}{R}\] Hint 1: First use the second golden rule and
- Kirchhoff’s current law to argue that the current flowing
- through \(R_F\) is the same as
- the current flowing through \(R\). Hint 2: Use Kirkhoff’s voltage rule tracing from
- \(V_\text{out}\) to ground and
- from \(V_\text{in}\) to ground
- to make two equations. You can use these to find \(V_\text{out}/V_\text{in}\). Calculate \(G_0\) and the
- bandwidth, \(f_B\), for the
- non-inverting amplifier with \(R_F =
- 10\ \text{k}\Omega\) and \(R =
- 100\ \Omega\) (use the \(\text{GBW}\) you found in the
- datasheet to calculate \(f_B\)). Feel free to round \(G_0\) to a nice clean number
- ending in zero(s). Predict the amplitude of the output voltage, \(V_\text{out}\), for the
- non-inverting amp with \(R_F = 10\
- k\Omega\) and \(R = 100\
- \Omega\) when The two resistors form a voltage divider feedback network with a transfer function \(B\) (think of \(R_F\) as \(R_1\) and \(R\) as \(R_2\) in the voltage divider equation from lab 2): \[B = \frac{R}{R_F+R}\] Use golden rules 2 and 3 to show that the DC gain, \(G_0\), of the non-inverting amplifier is \[G_0 = \frac{1}{B} = 1 + \frac{R_F}{R}\] Hint 1: First use the second golden rule and Kirchhoff’s current law to argue that the current flowing through \(R_F\) is the same as the current flowing through \(R\). Hint 2: Use Kirkhoff’s voltage rule tracing from \(V_\text{out}\) to ground and from \(V_\text{in}\) to ground to make two equations. You can use these to find \(V_\text{out}/V_\text{in}\). Calculate \(G_0\) and the bandwidth, \(f_B\), for the non-inverting amplifier with \(R_F = 10\ \text{k}\Omega\) and \(R = 100\ \Omega\) (use the \(\text{GBW}\) you found in the datasheet to calculate \(f_B\)). Feel free to round \(G_0\) to a nice clean number ending in zero(s). Predict the amplitude of the output voltage, \(V_\text{out}\), for the non-inverting amp with \(R_F = 10\ k\Omega\) and \(R = 100\ \Omega\) when \(V_\text{in} = 1\
- \text{mV}\) \(V_\text{in} = 1\
- \text{V}\) \(V_\text{in} = 1\ \text{mV}\) \(V_\text{in} = 1\ \text{V}\) The non-inverting op-amp circuit has different input
- impedance, \(R_i'\), and
- output impedance, \(R_o'\), from the bare op-amp.
- You can find the derivation for how to find \(R_i'\) and \(R_o'\) in Horowitz and Hill
- 2nd ed. section 4.26 (copies can be found in the lab). \[R_{i}' = R_{i}(1 +
- AB)\] \[R_{o}' = \frac{R_{o}}{(1 +
- AB)}\] where \(R_i\) and \(R_o\) are the input and output
- impedances of the bare op-amp (you already looked up \(R_i\) in the datasheet). These
- impedances will be improved from the values for the bare op-amp
- if \(A B\) is large (\(A\) is large, but \(B\le 1\)). With reasonable
- conditions, \(AB\) is still
- quite large. Notice then that in the non-inverting amplifier
- configuration, negative feedback causes the input impedance to
- increase (from an already large value) and the output impedance
- to decrease (from an already small value). The output impedance of the LF356 op-amp with no feedback is
- about \(40\ \Omega\) (and you
- already found \(R_i\) from the
- datasheet). Calculate \(R_i'\) and \(R_o'\) when \(R_F = 10\ k\Omega\) and \(R = 100\ \Omega\). Does it seem
- reasonable to assume the input impedance is infinitely large
- and the output impedance is \(0\)? The oscilliscope has a finite measurement impedance \((1\text{ M}\Omega)\), so if you’re
- measuring \(V_\text{in}\), you
- are putting a resistor \(R_\text{scope}\) from the input to
- ground (see Figure 5). This will
- inevitably reduce the input impedance of the amplifier. In the
- case when \(R_F = 10\
- k\Omega\) and \(R = 100\
- \Omega\), what is the input impedance of the
- amplifier? Hint: \(R_\text{scope}\) is in parallel
- with \(R_o'\). The non-inverting op-amp circuit has different input impedance, \(R_i'\), and output impedance, \(R_o'\), from the bare op-amp. You can find the derivation for how to find \(R_i'\) and \(R_o'\) in Horowitz and Hill 2nd ed. section 4.26 (copies can be found in the lab). \[R_{i}' = R_{i}(1 + AB)\] \[R_{o}' = \frac{R_{o}}{(1 + AB)}\] where \(R_i\) and \(R_o\) are the input and output impedances of the bare op-amp (you already looked up \(R_i\) in the datasheet). These impedances will be improved from the values for the bare op-amp if \(A B\) is large (\(A\) is large, but \(B\le 1\)). With reasonable conditions, \(AB\) is still quite large. Notice then that in the non-inverting amplifier configuration, negative feedback causes the input impedance to increase (from an already large value) and the output impedance to decrease (from an already small value). The output impedance of the LF356 op-amp with no feedback is about \(40\ \Omega\) (and you already found \(R_i\) from the datasheet). Calculate \(R_i'\) and \(R_o'\) when \(R_F = 10\ k\Omega\) and \(R = 100\ \Omega\). Does it seem reasonable to assume the input impedance is infinitely large and the output impedance is \(0\)? The oscilliscope has a finite measurement impedance \((1\text{ M}\Omega)\), so if you’re measuring \(V_\text{in}\), you are putting a resistor \(R_\text{scope}\) from the input to ground (see Figure 5). This will inevitably reduce the input impedance of the amplifier. In the case when \(R_F = 10\ k\Omega\) and \(R = 100\ \Omega\), what is the input impedance of the amplifier? Hint: \(R_\text{scope}\) is in parallel with \(R_o'\). Maybe you already noticed that the buffer is a non-inverting
- amplifier with \(R_F=0\) and
- \(R=\infty\). We already know
- that it has a DC gain of 1, so \(B=1\). Calculate \(R_i'\) and \(R_o'\) for the buffer. Thus far, we’ve ignored the fact that the op-amp requires
- external power to operate, but the op-amp
- NEEDS external power to function. The
- recommended supply voltage to the LF356 is \(15\ \text{V}\) at the positive
- power pin \(V^+\) (aka \(+V_{cc}\) or \(+V_\text{supply}\)) and \(-15\ \text{V}\) at the negative
- power pin \(V^-\) (aka \(-V_{ee}\) or \(-V_\text{supply}\)). Maybe you already noticed that the buffer is a non-inverting amplifier with \(R_F=0\) and \(R=\infty\). We already know that it has a DC gain of 1, so \(B=1\). Calculate \(R_i'\) and \(R_o'\) for the buffer. Thus far, we’ve ignored the fact that the op-amp requires external power to operate, but the op-amp NEEDS external power to function. The recommended supply voltage to the LF356 is \(15\ \text{V}\) at the positive power pin \(V^+\) (aka \(+V_{cc}\) or \(+V_\text{supply}\)) and \(-15\ \text{V}\) at the negative power pin \(V^-\) (aka \(-V_{ee}\) or \(-V_\text{supply}\)). Here we can see the pin diagram for the LF356. Don’t confuse
- \(V_+\) and \(V^+\). The subscripts \(V_+\) and \(V_-\) refer to the non-inverting
- and inverting inputs and \(V^+\) and \(V^-\) refer to the power pins.
- Pins 2 and 3 are the inputs and 4 and 7 are for power. We always want to apply decoupling capacitors to the the
- power: plugging one end as close to the power pin as possible
- and the other end into ground. Here’s
- a nice explanation why. Definition 9: capacitive coupling -
- capacitive coupling is the process of sending a signal or
- energy through a capacitor (remember that the impedance of a
- capacitor is inversely proportional to the frequency).
- Capacitive coupling is a way of sending AC while blocking DC.
- Parasitic capacitance often leads to this happening by
- mistake. Definition 10: decoupling capacitor -
- decoupling is coupling to ground. Decoupling capacitors charge
- up and provide a reservoir of energy that can be supplied to
- the circuit as the circuit’s current draw changes over time.
- Power supplies and transmission lines have inherent inductance
- which impedes changes in current, \(dI/dt\), so the decoupling
- capacitors compensate with the energy stored and provide the
- current necessary to maintain constant voltage. Here we can see the pin diagram for the LF356. Don’t confuse \(V_+\) and \(V^+\). The subscripts \(V_+\) and \(V_-\) refer to the non-inverting and inverting inputs and \(V^+\) and \(V^-\) refer to the power pins. Pins 2 and 3 are the inputs and 4 and 7 are for power. We always want to apply decoupling capacitors to the the power: plugging one end as close to the power pin as possible and the other end into ground. Here’s a nice explanation why. Definition 9: capacitive coupling - capacitive coupling is the process of sending a signal or energy through a capacitor (remember that the impedance of a capacitor is inversely proportional to the frequency). Capacitive coupling is a way of sending AC while blocking DC. Parasitic capacitance often leads to this happening by mistake. Definition 10: decoupling capacitor - decoupling is coupling to ground. Decoupling capacitors charge up and provide a reservoir of energy that can be supplied to the circuit as the circuit’s current draw changes over time. Power supplies and transmission lines have inherent inductance which impedes changes in current, \(dI/dt\), so the decoupling capacitors compensate with the energy stored and provide the current necessary to maintain constant voltage. Each op-amp design has limits to how much voltage you can
- apply to the power pins (before something breaks), and
- typically there is a recommended voltage that is less than this
- limit (e.g. the LF356 can take up to \(\pm 22\ \text{V}\), but it
- recommends you apply \(\pm 15\
- \text{V}\)). The voltage out is really coming from the
- power pins (the inputs, in a sense, just tell the op-amp how
- much of the power voltage to send to the output), so the
- maximum \(V_\text{out}\)
- depends on the supply voltage. Check the datasheet for the maximum output voltage when the
- LF356 is powered with \(\pm 15\
- \text{V}\). This is usually referred to as the
- output voltage swing. Look back at your calculations in prelab question 2.7.3; when supplying the LF356 with \(\pm 15\ \text{V}\), what do you
- expect happens when the predicted \(V_\text{out}\) is greater than the
- output voltage swing? Each op-amp design has limits to how much voltage you can apply to the power pins (before something breaks), and typically there is a recommended voltage that is less than this limit (e.g. the LF356 can take up to \(\pm 22\ \text{V}\), but it recommends you apply \(\pm 15\ \text{V}\)). The voltage out is really coming from the power pins (the inputs, in a sense, just tell the op-amp how much of the power voltage to send to the output), so the maximum \(V_\text{out}\) depends on the supply voltage. Check the datasheet for the maximum output voltage when the LF356 is powered with \(\pm 15\ \text{V}\). This is usually referred to as the output voltage swing. Look back at your calculations in prelab question 2.7.3; when supplying the LF356 with \(\pm 15\ \text{V}\), what do you expect happens when the predicted \(V_\text{out}\) is greater than the output voltage swing? There are many choices of op-amps in LTSpice. You can
- find them in the component’s menu (P
- is the shortcut). In the search bar, type “op” to open the
- op-amp folder. Selecting an op-amp will reveal a short
- description of each. In most cases, it doesn’t matter
- which you choose for your simulations, and unfortunately, the
- LF356, isn’t built in to the program. The OP07 (which should
- pop up first in the search) acts fairly ideally; however, for
- this activity, we will choose the OP113 since it more
- accurately responds to a non-ideal voltage supply. Create two voltage supplies off to the side and wire
- them together just like the figure below. Making them both
- \(+15\text{ V}\) but grounding
- the middle will get both plus and minus voltages (just like you
- do with your real power supply in the lab). There are many choices of op-amps in LTSpice. You can find them in the component’s menu (P is the shortcut). In the search bar, type “op” to open the op-amp folder. Selecting an op-amp will reveal a short description of each. In most cases, it doesn’t matter which you choose for your simulations, and unfortunately, the LF356, isn’t built in to the program. The OP07 (which should pop up first in the search) acts fairly ideally; however, for this activity, we will choose the OP113 since it more accurately responds to a non-ideal voltage supply. Create two voltage supplies off to the side and wire them together just like the figure below. Making them both \(+15\text{ V}\) but grounding the middle will get both plus and minus voltages (just like you do with your real power supply in the lab). Use the “Label Net” tool (it is labeled as “net” in the
- toolbar) to label the positive end of the power supply
- “supply+” and the negative end “supply-”, then you can label
- the two power pins of the op-amp the same (as seen in the
- figure above). Net labels are a way of making connections
- between things without having to clutter your diagram with
- wires. Note: the ground symbol is a net label as
- well. Use the “Label Net” tool (it is labeled as “net” in the toolbar) to label the positive end of the power supply “supply+” and the negative end “supply-”, then you can label the two power pins of the op-amp the same (as seen in the figure above). Net labels are a way of making connections between things without having to clutter your diagram with wires. Note: the ground symbol is a net label as well. Make a voltage buffer circuit (see below) with a input
- voltage with a \(1\text{ V}\)
- amplitude and \(1\text{
- kHz}\). Set up the simulation such that about 5
- oscillations will be visible (make the stop time 5 times the
- period). Measure the input and output voltage of the buffer.
- Calculate the transfer function. It should be 1. Measure the current into the op-amp at “supply+” and at
- “supply-”. The voltage is obviously a DC 15 (or -15) volts, but
- is the current DC? Make a voltage buffer circuit (see below) with a input voltage with a \(1\text{ V}\) amplitude and \(1\text{ kHz}\). Set up the simulation such that about 5 oscillations will be visible (make the stop time 5 times the period). Measure the input and output voltage of the buffer. Calculate the transfer function. It should be 1. Measure the current into the op-amp at “supply+” and at “supply-”. The voltage is obviously a DC 15 (or -15) volts, but is the current DC? Re-run the simulation and record the results of \(V_\text{out}\). Measure and record
- the voltage at the power pins of the op-amp, and describe why
- the voltage is no longer DC. This can be resolved by adding decoupling capacitors as
- seen in the figure below. Re-run the simulation and record the results of \(V_\text{out}\). Measure and record the voltage at the power pins of the op-amp, and describe why the voltage is no longer DC. This can be resolved by adding decoupling capacitors as seen in the figure below. Please review the lab activities so that you’re better
- prepared when you arrive to your lab section. This section summarizes information covered in the prelab
- (you may find this useful for a quick reference in the
- future). The op-amp is a differential amplifier that outputs an
- amplified difference between the inputs: \[V_\text{out}=A(V_+-V_-)\] Feeding the output back into the inverting input drives the
- system into a very stable state which no longer depends on many
- of the details or imperfections of the internal workings.
- Closed-loop refers to the state of an op-amp with
- feedback, and open-loop refers to the state of an
- op-amp with no feedback. The golden rules are approximations that make op-amp
- analysis relatively simple and straight forward. Please review the lab activities so that you’re better prepared when you arrive to your lab section. This section summarizes information covered in the prelab (you may find this useful for a quick reference in the future). The op-amp is a differential amplifier that outputs an amplified difference between the inputs: \[V_\text{out}=A(V_+-V_-)\] Feeding the output back into the inverting input drives the system into a very stable state which no longer depends on many of the details or imperfections of the internal workings. Closed-loop refers to the state of an op-amp with feedback, and open-loop refers to the state of an op-amp with no feedback. The golden rules are approximations that make op-amp analysis relatively simple and straight forward. Here are all the terms we defined in the prelab: Open-loop gain, \(A\) - the gain of the
- op-amp when there is no feedback. Open-loop DC gain, \(A_\text{VOL}\) - the
- open-loop gain at low frequencies before the frequency
- dependence starts to take over and the open-loop gain starts to
- decrease. This is cited in any op-amp datasheet (sometimes as
- \(A_\text{OL}\) or \(A_\text{VO}\)). Open-loop 3 dB point, \(f_0\) - the frequency
- that the open-loop gain falls -3 dB from \(A_\text{VOL}\). Beyond this
- frequency, \(A\) typically
- continues to fall with a constant dB per log-scale (quoted in
- dB/octave (log2) or dB/decade (log10)). This value is usually
- not quoted in datasheets. It can be
- calculated from other values, and people often aren’t concerned
- with the value of \(f_0\). Closed-loop gain, \(G\) - when a fraction of
- the output is fed back into the inverting input \(V_-\), the op-amp’s gain is
- greatly reduced from \(A\) to
- some value \(G\). Just like
- the open-loop gain, this value is frequency dependent and
- starts to fall from \(G_0\)
- near the 3 dB point, \(f_B\). Closed-loop DC gain, \(G_0\) - the closed-loop
- gain at frequencies well below the 3 dB point. Except in active
- filter design, the point of an op-amp is to operate at a
- frequency such that \(G(f)=G_0\), so almost always, the
- closed-loop DC gain is referred to simply as
- THE gain. 3 dB point, \(f_B\) - the frequency
- where \(G\) drops -3 dB from
- \(G_0\). This is also often
- referred to as the bandwidth or operating bandwidth, as typical
- operation should be done below this frequency. Gain bandwidth product, \(\text{GBW}\) - the
- product of the DC gain and the 3 dB point is a constant value.
- This should be cited in datasheets as it’s a foundational
- property of each op-amp’s internal design. Just like resistor
- values, however, the precise \(\text{GBW}\) varies from op-amp to
- op-amp of the same name. Unity gain frequency, \(f_T\) - the 3 dB point
- when the gain is 1 (unity). Since this is mathematically
- equivalent to the \(\text{GBW}\), these terms are
- often used interchangeably. Capacitive coupling - capacitive coupling
- is the process of sending a signal or energy through a
- capacitor (remember that the impedance of a capacitor is
- inversely proportional to the frequency). Capacitive coupling
- is a way of sending AC while blocking DC. Parasitic capacitance
- often leads to this happening by mistake. Decoupling capacitor - decoupling is
- coupling to ground. Decoupling capacitors charge up and provide
- a reservoir of energy that can be supplied to the circuit as
- the circuit’s current draw changes over time. Power supplies
- and transmission lines have inherent inductance which impedes
- changes in current, \(dI/dt\),
- so the decoupling capacitors compensate with the energy stored
- and provide the current necessary to maintain constant
- voltage. You can find more on op-amps from these recommended
- sources: Open-loop gain, \(A\) - the gain of the op-amp when there is no feedback. Open-loop DC gain, \(A_\text{VOL}\) - the open-loop gain at low frequencies before the frequency dependence starts to take over and the open-loop gain starts to decrease. This is cited in any op-amp datasheet (sometimes as \(A_\text{OL}\) or \(A_\text{VO}\)). Open-loop 3 dB point, \(f_0\) - the frequency that the open-loop gain falls -3 dB from \(A_\text{VOL}\). Beyond this frequency, \(A\) typically continues to fall with a constant dB per log-scale (quoted in dB/octave (log2) or dB/decade (log10)). This value is usually not quoted in datasheets. It can be calculated from other values, and people often aren’t concerned with the value of \(f_0\). Closed-loop gain, \(G\) - when a fraction of the output is fed back into the inverting input \(V_-\), the op-amp’s gain is greatly reduced from \(A\) to some value \(G\). Just like the open-loop gain, this value is frequency dependent and starts to fall from \(G_0\) near the 3 dB point, \(f_B\). Closed-loop DC gain, \(G_0\) - the closed-loop gain at frequencies well below the 3 dB point. Except in active filter design, the point of an op-amp is to operate at a frequency such that \(G(f)=G_0\), so almost always, the closed-loop DC gain is referred to simply as THE gain. 3 dB point, \(f_B\) - the frequency where \(G\) drops -3 dB from \(G_0\). This is also often referred to as the bandwidth or operating bandwidth, as typical operation should be done below this frequency. Gain bandwidth product, \(\text{GBW}\) - the product of the DC gain and the 3 dB point is a constant value. This should be cited in datasheets as it’s a foundational property of each op-amp’s internal design. Just like resistor values, however, the precise \(\text{GBW}\) varies from op-amp to op-amp of the same name. Unity gain frequency, \(f_T\) - the 3 dB point when the gain is 1 (unity). Since this is mathematically equivalent to the \(\text{GBW}\), these terms are often used interchangeably. Capacitive coupling - capacitive coupling is the process of sending a signal or energy through a capacitor (remember that the impedance of a capacitor is inversely proportional to the frequency). Capacitive coupling is a way of sending AC while blocking DC. Parasitic capacitance often leads to this happening by mistake. Decoupling capacitor - decoupling is coupling to ground. Decoupling capacitors charge up and provide a reservoir of energy that can be supplied to the circuit as the circuit’s current draw changes over time. Power supplies and transmission lines have inherent inductance which impedes changes in current, \(dI/dt\), so the decoupling capacitors compensate with the energy stored and provide the current necessary to maintain constant voltage. You can find more on op-amps from these recommended sources: Steck
- Sections 7.1, 7.2, 7.3.1, 7.3.3 Steck Sections 7.1, 7.2, 7.3.1, 7.3.3 Fischer-Cripps Sections 12.2 - 12.15 Horowitz and Hill 2nd Ed., 4.01. 4.02, 4.03,
- 4.05, 4.06 Horowitz and Hill 3rd Ed., 4.1, 4.2.2,
- 4.2.3 Horowitz and Hill 2nd Ed., 4.01. 4.02, 4.03, 4.05, 4.06 Horowitz and Hill 3rd Ed., 4.1, 4.2.2, 4.2.3 Open Circuits - 40, 52, 76 In this lab, we will use ICs (integrated circuits) for the
- first time. ICs come in many forms; we will be using DIP chips
- because these are designed for using in breadboards. DIP is a
- description of the packaging they come in: resembling little
- bugs with legs running down each side. These basic tips should
- always be followed when working with ICs. Read through
- them all (likely more than once) before you begin
- using any IC chips. You should refer back to this section in
- future labs to remind yourself of these useful tips. In this lab, we will use ICs (integrated circuits) for the first time. ICs come in many forms; we will be using DIP chips because these are designed for using in breadboards. DIP is a description of the packaging they come in: resembling little bugs with legs running down each side. These basic tips should always be followed when working with ICs. Read through them all (likely more than once) before you begin using any IC chips. You should refer back to this section in future labs to remind yourself of these useful tips. 0V (ground)
- Black 0V (ground) Black +15V Red -15V Blue Use other colors for any other connections which aren’t
- to \(\pm\) power or
- ground Use other colors for any other connections which aren’t to \(\pm\) power or ground Before you build any useful op-amp circuits, let’s build a
- simple means to test if an op-amp chip is functioning. When building circuits, it’s a good idea to test components
- before putting them all together in a complex circuit. This can
- save you a lot of headaches by avoiding needing to debug your
- circuit because you have a burnt out or broken IC. You should consider leaving the “bones” of this test circuit
- somewhere on your breadboard so that you can quickly pop in an
- LF356 chip to test it (keep it compact and leave plenty of
- space on your breadboard for future work). Before you build any useful op-amp circuits, let’s build a simple means to test if an op-amp chip is functioning. When building circuits, it’s a good idea to test components before putting them all together in a complex circuit. This can save you a lot of headaches by avoiding needing to debug your circuit because you have a burnt out or broken IC. You should consider leaving the “bones” of this test circuit somewhere on your breadboard so that you can quickly pop in an LF356 chip to test it (keep it compact and leave plenty of space on your breadboard for future work). The test circuit resembles the buffer, but with \(V_\text{in}=0\). The test circuit resembles the buffer, but with \(V_\text{in}=0\). Predict the voltage at pins 2, 3, 4, 6, and 7 of the
- test circuit. Build the test circuit as shown above (review the IC
- tips). Measure and record the voltages at pins 2, 3, 4, 6, and
- 7. Do they match your predictions? If not, revise your
- predictions or decide that the op-amp is broken. Check in with
- an instructor if you are unsure. Predict the voltage at pins 2, 3, 4, 6, and 7 of the test circuit. Build the test circuit as shown above (review the IC tips). Measure and record the voltages at pins 2, 3, 4, 6, and 7. Do they match your predictions? If not, revise your predictions or decide that the op-amp is broken. Check in with an instructor if you are unsure. Commonly, when a chip isn’t working, it will output roughly
- \(15\ \text{V}\) or \(-15\ \text{V}\) at pin 6
- regardless of the configuration. If you find you have a bad
- chip, throw it in the trash and grab another (In case you are
- wondering, the LF356 costs less than $1). If you’re not sure,
- grab an instructor and have them take a look with you. Commonly, when a chip isn’t working, it will output roughly \(15\ \text{V}\) or \(-15\ \text{V}\) at pin 6 regardless of the configuration. If you find you have a bad chip, throw it in the trash and grab another (In case you are wondering, the LF356 costs less than $1). If you’re not sure, grab an instructor and have them take a look with you. A voltage buffer is an incredibly useful circuit which
- isolates an input voltage from the driving output, allowing you
- to drive loads from the function generator without drawing any
- current from it (the current will be sourced from the power
- supply instead). Two weeks ago, you tried to power a speaker
- directly with the function generator and found that too much of
- the voltage divides over the output impedance for it to be
- useful. The follower will allow you to overcome this limitation
- of the function generator. The voltage buffer is essentially a non-inverting amplifier
- with a gain of 1, so it is often also referred to as a follower
- (since the output “follows” the input). The buffer gets its
- name because no current flows through the input and therefore
- the voltage at the output is, in a sense, isolated
- from the voltage at the input (even though they’re the same
- value). This can help you avoid unintended issues with voltage
- dividers: such as the one you encountered above with the
- function generator, as well as having measurement impedances or
- loads in parallel with a voltage divider changing how much
- current goes through \(R_2\)
- (you also encountered this in Lab 2). You will use the buffer to take the output of the function
- generator (with a \(50\
- \Omega\) output impedance) and reproduce (i.e. follow)
- the same voltage with a very small output impedance (we
- calculated this in prelab question 2.8.3) A voltage buffer is an incredibly useful circuit which isolates an input voltage from the driving output, allowing you to drive loads from the function generator without drawing any current from it (the current will be sourced from the power supply instead). Two weeks ago, you tried to power a speaker directly with the function generator and found that too much of the voltage divides over the output impedance for it to be useful. The follower will allow you to overcome this limitation of the function generator. The voltage buffer is essentially a non-inverting amplifier with a gain of 1, so it is often also referred to as a follower (since the output “follows” the input). The buffer gets its name because no current flows through the input and therefore the voltage at the output is, in a sense, isolated from the voltage at the input (even though they’re the same value). This can help you avoid unintended issues with voltage dividers: such as the one you encountered above with the function generator, as well as having measurement impedances or loads in parallel with a voltage divider changing how much current goes through \(R_2\) (you also encountered this in Lab 2). You will use the buffer to take the output of the function generator (with a \(50\ \Omega\) output impedance) and reproduce (i.e. follow) the same voltage with a very small output impedance (we calculated this in prelab question 2.8.3) Build the voltage follower using the function generator
- as \(V_\text{in}\). You will
- use the same settings as before (\(400\text{ mV}_\text{pp}\) sine
- wave at \(432\text{ Hz}\)).
- Figure 15 shows a schematic of
- the full set up using Channel 1 to measure \(V_\text{in}\), Channel 2 to
- measure \(V_\text{out}\), and
- Channel 4 to trigger on the Sync output. Confirm the gain is \(1\). If the gain is \(10\) or \(0.1\), this is likely due to a
- setting on the oscilliscope (ask for help if you’re
- lost). Connect the speaker from \(V_\text{out}\) to ground. Does
- \(V_\text{in}\) or \(V_\text{out}\) change? Build the voltage follower using the function generator as \(V_\text{in}\). You will use the same settings as before (\(400\text{ mV}_\text{pp}\) sine wave at \(432\text{ Hz}\)). Figure 15 shows a schematic of the full set up using Channel 1 to measure \(V_\text{in}\), Channel 2 to measure \(V_\text{out}\), and Channel 4 to trigger on the Sync output. Confirm the gain is \(1\). If the gain is \(10\) or \(0.1\), this is likely due to a setting on the oscilliscope (ask for help if you’re lost). Connect the speaker from \(V_\text{out}\) to ground. Does \(V_\text{in}\) or \(V_\text{out}\) change? Why or why not? Is this expected? Increase the amplitude on the function generator to
- \(500\text{ mV}_\text{pp}\).
- Describe what happens to \(V_\text{out}\). Play with the amplitude to see if this behavior is
- consistent. Record what you’re doing and what you’re seeing
- along the way. Why is this happening? Is this consistent with what you
- found in the prelab? This is a good place to check in with an
- instructor to confirm your thinking or clear up any
- confusion. Increase the amplitude on the function generator to \(500\text{ mV}_\text{pp}\). Describe what happens to \(V_\text{out}\). Play with the amplitude to see if this behavior is consistent. Record what you’re doing and what you’re seeing along the way. Why is this happening? Is this consistent with what you found in the prelab? This is a good place to check in with an instructor to confirm your thinking or clear up any confusion. Unplug your speaker! There are op-amps which have higher max output currents.
- These are sometimes referred to as “power op-amps” and are in
- form factors designed to attach to heat sinks (since high
- currents produce a lot of heat). There are op-amps which have higher max output currents. These are sometimes referred to as “power op-amps” and are in form factors designed to attach to heat sinks (since high currents produce a lot of heat). Grab a \(10\text{
- k}\Omega\) and a \(100\
- \Omega\) resistor and measure their
- resistances. Change the negative feedback loop in your circuit to the
- one shown in Figure 16, with
- \(R_F = 10\text{ k}\Omega\)
- and \(R = 100\ \Omega\) (or
- build a new one elsewhere on your breadboard). You calculated \(G_0\)
- and \(f_B\) for this circuit
- in the prelab, recalculate these values for the measured values
- of \(R\) and \(R_F\). What’s a reasonable amplitude to set for \(V_\text{in}\)? Why? Set the
- function generator to this. What’s a reasonable frequency to set so that \(G(f)=G_0\)? Why? Set the function
- generator to this. (consider the gain bandwidth product and/or
- your Bode plots). Measure the amplitude of \(V_\text{in}\) and \(V_\text{out}\) and then calculate
- the gain. How does this compare to your prediction? Grab a \(10\text{ k}\Omega\) and a \(100\ \Omega\) resistor and measure their resistances. Change the negative feedback loop in your circuit to the one shown in Figure 16, with \(R_F = 10\text{ k}\Omega\) and \(R = 100\ \Omega\) (or build a new one elsewhere on your breadboard). You calculated \(G_0\) and \(f_B\) for this circuit in the prelab, recalculate these values for the measured values of \(R\) and \(R_F\). What’s a reasonable amplitude to set for \(V_\text{in}\)? Why? Set the function generator to this. What’s a reasonable frequency to set so that \(G(f)=G_0\)? Why? Set the function generator to this. (consider the gain bandwidth product and/or your Bode plots). Measure the amplitude of \(V_\text{in}\) and \(V_\text{out}\) and then calculate the gain. How does this compare to your prediction? Set the frequency to the calculated 3 dB frequency and
- measure the gain. Is this -3 dB less than the previous gain? If
- not, change the frequency until you find the frequency at which
- the gain is -3 dB less than \(G_0\). What is the measured 3 dB
- frequency? Use the previous result to calculate the gain bandwidth
- product. How does this compare to the datasheet? Record measurements of the gain and frequency at a few
- points near the 3 dB frequency, a point roughly an order of
- magnitude above and below, and a point roughly two orders of
- magnitude above and below. Make a new Bode plot based on your updated Gain
- Bandwidth Product along with these data points. Do your
- measurements agree with the model? Set the frequency to the calculated 3 dB frequency and measure the gain. Is this -3 dB less than the previous gain? If not, change the frequency until you find the frequency at which the gain is -3 dB less than \(G_0\). What is the measured 3 dB frequency? Use the previous result to calculate the gain bandwidth product. How does this compare to the datasheet? Record measurements of the gain and frequency at a few points near the 3 dB frequency, a point roughly an order of magnitude above and below, and a point roughly two orders of magnitude above and below. Make a new Bode plot based on your updated Gain Bandwidth Product along with these data points. Do your measurements agree with the model? Return the frequency to a “low” frequency when \(G=G_0\). Increase the voltage
- until you see the signal saturate (this is also referred to as
- clipping). Measure the output saturation levels, \(+V_\text{sat}\) and \(–V_\text{sat}\)? Record how you
- determined \(V_\text{sat}\).
- Can \(V_\text{out}\) produce
- voltages that span the voltages applied (\(-15\text{ V}\) to \(+15\text{ V}\)) to the
- op-amp? The model of the op-amp you have been working with does
- not include saturation effects. To make sure you are working
- within the range where your model is most accurate, make sure
- the output amplitude is below half the saturated value. Change
- the amplitude of the input so that the output is within this
- range. Return the frequency to a “low” frequency when \(G=G_0\). Increase the voltage until you see the signal saturate (this is also referred to as clipping). Measure the output saturation levels, \(+V_\text{sat}\) and \(–V_\text{sat}\)? Record how you determined \(V_\text{sat}\). Can \(V_\text{out}\) produce voltages that span the voltages applied (\(-15\text{ V}\) to \(+15\text{ V}\)) to the op-amp? The model of the op-amp you have been working with does not include saturation effects. To make sure you are working within the range where your model is most accurate, make sure the output amplitude is below half the saturated value. Change the amplitude of the input so that the output is within this range. Consider driving a load with resistance \(R_L\) with the output of your
- amplifier and the effects of the output impedance \(R_o'\). Write a relation
- between the amount of \(V_\text{out}\) makes it across
- \(R_L\) as a function of \(R_L\). Predict the maximum \(V_\text{in}\) you can use to avoid
- hitting the maximum output current when \(R_L\) is equal to the resistance
- you measured for the speaker (don’t forget to consider the
- output impedance). Set the input to be just less than this, and
- set the frequency back to a \(\text{C}_4\) note \((432\ \text{Hz})\). Record \(V_\text{out}\)
- and confirm the gain is what you expect. Plug in the speaker. Record \(V_\text{out}\) again. Did \(V_\text{out}\) change? By how
- much? We can refer to the output when a load is attached as
- \(V_\text{out}^{(L)}\) and
- \(V_\text{out}\) as the output
- when no load attached. Use the ratio of \(\frac{V_\text{out}^{(L)}}{V_\text{out}}\)
- to calculate the output impedance of the non-inverting
- amplifier. If you wanted all of the output to drop across the load
- instead of having a significant portion drop across the output
- impedance, what changes could you make to the circuit, or what
- elements could you add to achieve the same gain but with lower
- output impedance? Consider driving a load with resistance \(R_L\) with the output of your amplifier and the effects of the output impedance \(R_o'\). Write a relation between the amount of \(V_\text{out}\) makes it across \(R_L\) as a function of \(R_L\). Predict the maximum \(V_\text{in}\) you can use to avoid hitting the maximum output current when \(R_L\) is equal to the resistance you measured for the speaker (don’t forget to consider the output impedance). Set the input to be just less than this, and set the frequency back to a \(\text{C}_4\) note \((432\ \text{Hz})\). Record \(V_\text{out}\) and confirm the gain is what you expect. Plug in the speaker. Record \(V_\text{out}\) again. Did \(V_\text{out}\) change? By how much? We can refer to the output when a load is attached as \(V_\text{out}^{(L)}\) and \(V_\text{out}\) as the output when no load attached. Use the ratio of \(\frac{V_\text{out}^{(L)}}{V_\text{out}}\) to calculate the output impedance of the non-inverting amplifier. If you wanted all of the output to drop across the load instead of having a significant portion drop across the output impedance, what changes could you make to the circuit, or what elements could you add to achieve the same gain but with lower output impedance? In the last lab you used op-amps for the first time and
- applied negative feedback to the op-amp in order to make useful
- and stable circuits. You built: In the last lab you used op-amps for the first time and applied negative feedback to the op-amp in order to make useful and stable circuits. You built: Now, you will build more op-amp circuits with negative
- feedback. Now, you will build more op-amp circuits with negative feedback. In this lab, you will build: an inverting amplifier and explore one of its major
- limitations (its input impedance) a summing amplifier designed to act as a
- digital-to-analog converter (DAC) a signal integrator to integrate a signal over
- time an inverting amplifier and explore one of its major limitations (its input impedance) a summing amplifier designed to act as a digital-to-analog converter (DAC) a signal integrator to integrate a signal over time These three circuits have many applications. The inverting
- amplifier is like the non-inverting amplifier but with one
- advantage and one disadvantage. You will use the summing
- amplifier to build a DAC, but there are many applications of
- summing amplifiers in mixing signals. Finally the integrator
- has many uses and is commonly used to convert different
- wave-shapes in audio applications, and it is also used in
- control systems. These three circuits have many applications. The inverting amplifier is like the non-inverting amplifier but with one advantage and one disadvantage. You will use the summing amplifier to build a DAC, but there are many applications of summing amplifiers in mixing signals. Finally the integrator has many uses and is commonly used to convert different wave-shapes in audio applications, and it is also used in control systems. In this lab you will: refine your ability to design and analyze op-amp
- circuits with negative feedback develop more independence in designing, modeling,
- building, and characterizing circuits refine your ability to design and analyze op-amp circuits with negative feedback develop more independence in designing, modeling, building, and characterizing circuits This section summarizes information covered in lab 4 (you
- may find this useful for a quick reference in the future). The op-amp is a differential amplifier that outputs an
- amplified difference between the inputs: \[V_\text{out}=A(V_+-V_-)\] Feeding the output back into the inverting input drives the
- system into a very stable state which no longer depends on many
- of the details or imperfections of the internal workings.
- Closed-loop refers to the state of an op-amp with
- feedback, and open-loop refers to the state of an
- op-amp with no feedback. The golden rules are approximations that make op-amp
- analysis relatively simple and straight forward. This section summarizes information covered in lab 4 (you may find this useful for a quick reference in the future). The op-amp is a differential amplifier that outputs an amplified difference between the inputs: \[V_\text{out}=A(V_+-V_-)\] Feeding the output back into the inverting input drives the system into a very stable state which no longer depends on many of the details or imperfections of the internal workings. Closed-loop refers to the state of an op-amp with feedback, and open-loop refers to the state of an op-amp with no feedback. The golden rules are approximations that make op-amp analysis relatively simple and straight forward. Here are all the terms we defined in the prelab from lab
- 4: Open-loop gain, \(A\) - the gain of the
- op-amp when there is no feedback. Open-loop DC gain, \(A_\text{VOL}\) - the
- open-loop gain at low frequencies before the frequency
- dependence starts to take over and the open-loop gain starts to
- decrease. This is cited in any op-amp datasheet (sometimes as
- \(A_\text{OL}\) or \(A_\text{VO}\)). Open-loop 3 dB point, \(f_0\) - the frequency
- that the open-loop gain falls -3 dB from \(A_\text{VOL}\). Beyond this
- frequency, \(A\) typically
- continues to fall with a constant dB per log-scale (quoted in
- dB/octave (log2) or dB/decade (log10)). This value is usually
- not quoted in datasheets. It can be
- calculated from other values, and people often aren’t concerned
- with the value of \(f_0\). Closed-loop gain, \(G\) - when a fraction of
- the output is fed back into the inverting input \(V_-\), the op-amp’s gain is
- greatly reduced from \(A\) to
- some value \(G\). Just like
- the open-loop gain, this value is frequency dependent and
- starts to fall from \(G_0\)
- near the 3 dB point, \(f_B\). Closed-loop DC gain, \(G_0\) - the closed-loop
- gain at frequencies well below the 3 dB point. Except in active
- filter design, the point of an op-amp is to operate at a
- frequency such that \(G(f)=G_0\), so almost always, the
- closed-loop DC gain is referred to simply as
- THE gain. 3 dB point, \(f_B\) - the frequency
- where \(G\) drops -3 dB from
- \(G_0\). This is also often
- referred to as the bandwidth or operating bandwidth, as typical
- operation should be done below this frequency. Gain bandwidth product, \(\text{GBW}\) - the
- product of the DC gain and the 3 dB point is a constant value.
- This should be cited in datasheets as it’s a foundational
- property of each op-amp’s internal design. Just like resistor
- values, however, the precise \(\text{GBW}\) varies from op-amp to
- op-amp of the same name. Unity gain frequency, \(f_T\) - the 3 dB point
- when the gain is 1 (unity). Since this is mathematically
- equivalent to the \(\text{GBW}\), these terms are
- often used interchangeably. Capacitive coupling - capacitive coupling
- is the process of sending a signal or energy through a
- capacitor (remember that the impedance of a capacitor is
- inversely proportional to the frequency). Capacitive coupling
- is a way of sending AC while blocking DC. Parasitic capacitance
- often leads to this happening by mistake. Decoupling capacitor - decoupling is
- coupling to ground. Decoupling capacitors charge up and provide
- a reservoir of energy that can be supplied to the circuit as
- the circuit’s current draw changes over time. Power supplies
- and transmission lines have inherent inductance which impedes
- changes in current, \(dI/dt\),
- so the decoupling capacitors compensate with the energy stored
- and provide the current necessary to maintain constant
- voltage. Here are all the terms we defined in the prelab from lab 4: Open-loop gain, \(A\) - the gain of the op-amp when there is no feedback. Open-loop DC gain, \(A_\text{VOL}\) - the open-loop gain at low frequencies before the frequency dependence starts to take over and the open-loop gain starts to decrease. This is cited in any op-amp datasheet (sometimes as \(A_\text{OL}\) or \(A_\text{VO}\)). Open-loop 3 dB point, \(f_0\) - the frequency that the open-loop gain falls -3 dB from \(A_\text{VOL}\). Beyond this frequency, \(A\) typically continues to fall with a constant dB per log-scale (quoted in dB/octave (log2) or dB/decade (log10)). This value is usually not quoted in datasheets. It can be calculated from other values, and people often aren’t concerned with the value of \(f_0\). Closed-loop gain, \(G\) - when a fraction of the output is fed back into the inverting input \(V_-\), the op-amp’s gain is greatly reduced from \(A\) to some value \(G\). Just like the open-loop gain, this value is frequency dependent and starts to fall from \(G_0\) near the 3 dB point, \(f_B\). Closed-loop DC gain, \(G_0\) - the closed-loop gain at frequencies well below the 3 dB point. Except in active filter design, the point of an op-amp is to operate at a frequency such that \(G(f)=G_0\), so almost always, the closed-loop DC gain is referred to simply as THE gain. 3 dB point, \(f_B\) - the frequency where \(G\) drops -3 dB from \(G_0\). This is also often referred to as the bandwidth or operating bandwidth, as typical operation should be done below this frequency. Gain bandwidth product, \(\text{GBW}\) - the product of the DC gain and the 3 dB point is a constant value. This should be cited in datasheets as it’s a foundational property of each op-amp’s internal design. Just like resistor values, however, the precise \(\text{GBW}\) varies from op-amp to op-amp of the same name. Unity gain frequency, \(f_T\) - the 3 dB point when the gain is 1 (unity). Since this is mathematically equivalent to the \(\text{GBW}\), these terms are often used interchangeably. Capacitive coupling - capacitive coupling is the process of sending a signal or energy through a capacitor (remember that the impedance of a capacitor is inversely proportional to the frequency). Capacitive coupling is a way of sending AC while blocking DC. Parasitic capacitance often leads to this happening by mistake. Decoupling capacitor - decoupling is coupling to ground. Decoupling capacitors charge up and provide a reservoir of energy that can be supplied to the circuit as the circuit’s current draw changes over time. Power supplies and transmission lines have inherent inductance which impedes changes in current, \(dI/dt\), so the decoupling capacitors compensate with the energy stored and provide the current necessary to maintain constant voltage. The inverting amplifier is shown in Figure 1. Notice that this is very similar to
- the non-inverting amplifier, except for the fact that the input
- and ground are swapped. There is still a voltage divider network feeding the output
- back to the inverting input with a transfer function \(B\), such that The inverting amplifier is shown in Figure 1. Notice that this is very similar to the non-inverting amplifier, except for the fact that the input and ground are swapped. There is still a voltage divider network feeding the output back to the inverting input with a transfer function \(B\), such that \[B=\frac{R}{R_F+R}\] This simple swapping of the input and ground changes a few
- properties of the amplifier circuit This simple swapping of the input and ground changes a few properties of the amplifier circuit The reduced input impedance has potential issues; however,
- there is one advantage of the inverting amplifier. Because one
- of the inputs is held at a constant voltage (ground), the
- voltage at the inputs barely fluctuates which puts less strain
- on the op-amp resulting in better performance in reproducing
- the output waveform. Applying the voltage golden rule, it should be clear that
- the voltage at both inputs is \(0\text{ V}\). Even though the
- voltage at \(V_-\) is zero, it
- is called a virtual ground, instead of
- ground, because there is no actual path to
- Earth ground, so it does not serve the full function
- of ground. Since the path from \(V_\text{in}\) to \(V_-\) is like a path to ground,
- this path is like a load. With this knowledge, what do you
- think the input impedance of the inverting amplifier is? By only using the current golden rule, the closed-loop
- gain of the inverting amplifier can be derived even with a
- finite open-loop gain \(A\). The current golden rule, says that no current flows into
- \(V_-\), so all the current
- \(I\) that flows through \(R\) will also flow through \(R_F\) (see 2). Second, plugging \(V_+=0\)
- into the op-amp equation \[V_\text{out}=A(V_+-V_-)\] The reduced input impedance has potential issues; however, there is one advantage of the inverting amplifier. Because one of the inputs is held at a constant voltage (ground), the voltage at the inputs barely fluctuates which puts less strain on the op-amp resulting in better performance in reproducing the output waveform. Applying the voltage golden rule, it should be clear that the voltage at both inputs is \(0\text{ V}\). Even though the voltage at \(V_-\) is zero, it is called a virtual ground, instead of ground, because there is no actual path to Earth ground, so it does not serve the full function of ground. Since the path from \(V_\text{in}\) to \(V_-\) is like a path to ground, this path is like a load. With this knowledge, what do you think the input impedance of the inverting amplifier is? By only using the current golden rule, the closed-loop gain of the inverting amplifier can be derived even with a finite open-loop gain \(A\). The current golden rule, says that no current flows into \(V_-\), so all the current \(I\) that flows through \(R\) will also flow through \(R_F\) (see 2). Second, plugging \(V_+=0\) into the op-amp equation \[V_\text{out}=A(V_+-V_-)\] yeilds \[V_-=\frac{-V_\text{out}}{A}\] \[V_-=\frac{-V_\text{out}}{A}\] We can now right down two equations based on Kircchoff’s
- voltage law: \[V_\text{out} = V_- + IR_F =
- \frac{-V_\text{out}}{A} + IR_F\] \[V_\text{in} = V_- - IR =
- \frac{-V_\text{out}}{A} - IR\] We can now right down two equations based on Kircchoff’s voltage law: \[V_\text{out} = V_- + IR_F = \frac{-V_\text{out}}{A} + IR_F\] \[V_\text{in} = V_- - IR = \frac{-V_\text{out}}{A} - IR\] These equations can be manipulated to give \[G_0=\frac{V_\text{out}}{V_\text{in}}=\frac{-AR_F}{R_F+(1+A)R}=-\frac{A(1-B)}{1+AB}\] Find the closed-loop gain in the limit as \(A\) approaches infinity (open-loop
- gain golden rule); i.e. \[\lim_{A\rightarrow\infty}G_0\] \[G_0=\frac{V_\text{out}}{V_\text{in}}=\frac{-AR_F}{R_F+(1+A)R}=-\frac{A(1-B)}{1+AB}\] Find the closed-loop gain in the limit as \(A\) approaches infinity (open-loop gain golden rule); i.e. \[\lim_{A\rightarrow\infty}G_0\] Hint: L’Hôpital’s rule may be helpful. Instead, start with the assumption that the voltage golden
- rule applies. What is the voltage at \(V_-\) then? Derive expressions for
- \(V_\text{out}\) and \(V_\text{in}\) using this value for
- \(V_-\) and Kircchoff’s
- voltage rule. Does this lead to the same result for \(G_0\) you found in question 3.2.1? (You may need to do a little rearranging
- to show they are the same) Find \(G_0\) (assume \(A\rightarrow\infty\)) for Instead, start with the assumption that the voltage golden rule applies. What is the voltage at \(V_-\) then? Derive expressions for \(V_\text{out}\) and \(V_\text{in}\) using this value for \(V_-\) and Kircchoff’s voltage rule. Does this lead to the same result for \(G_0\) you found in question 3.2.1? (You may need to do a little rearranging to show they are the same) Find \(G_0\) (assume \(A\rightarrow\infty\)) for \(R=100\ \Omega\) and
- \(R_F=1\text{
- k}\Omega\) \(R=10\text{ k}\Omega\)
- and \(R_F=100\text{
- k}\Omega\) \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\) \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\) Formulas for the input and output impedance for an inverting
- amplifier are derived in Horowitz and Hill 2nd
- ed. section 4.26 (copies can be found in the lab). \[R_{i}' = R\bigg(1 +
- \frac{1}{(1 + A)}\frac{R_{F}}{R}\bigg)\] \[R_{o}' = \frac{R_{o}}{(1 +
- AB)}\] Note: that the output impedance is the same
- equation as it was for the non-inverting amplifier. For the input impedance, as long as the magnitude of the
- closed-loop gain is significantly less than the open-loop gain,
- \(R_i'=R\). Typically in
- practice, \(R\lesssim 100\text{
- k}\Omega\). This is far less than typical op-amp’s bare
- input impedance (the LF356 has \(10^{12}\ \Omega\).. that’s a
- teraohm!). Calculate \(R_i'\)
- (using \(A=2\cdot 10^{5}\))
- using Formulas for the input and output impedance for an inverting amplifier are derived in Horowitz and Hill 2nd ed. section 4.26 (copies can be found in the lab). \[R_{i}' = R\bigg(1 + \frac{1}{(1 + A)}\frac{R_{F}}{R}\bigg)\] \[R_{o}' = \frac{R_{o}}{(1 + AB)}\] Note: that the output impedance is the same equation as it was for the non-inverting amplifier. For the input impedance, as long as the magnitude of the closed-loop gain is significantly less than the open-loop gain, \(R_i'=R\). Typically in practice, \(R\lesssim 100\text{ k}\Omega\). This is far less than typical op-amp’s bare input impedance (the LF356 has \(10^{12}\ \Omega\).. that’s a teraohm!). Calculate \(R_i'\) (using \(A=2\cdot 10^{5}\)) using \(R=100\ \Omega\) and
- \(R_F=1\text{
- k}\Omega\) \(R=10\text{ k}\Omega\)
- and \(R_F=100\text{
- k}\Omega\) \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\) \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\) Is it reasonable to just say that \(R_i'=R\)? Is it reasonable to just say that \(R_i'=R\)? If \(V_\text{in}\) is
- coming from the function generator, there is a \(50\ \Omega\) output impedance, and
- when you measure \(V_\text{in}\) on the scope there
- is a \(1\text{ M}\Omega\)
- measurement impedance (see Figure 3). In each of the following
- cases, decide whether the \(50\
- \Omega\), the \(1\text{
- M}\Omega\), both, or neither impedances will
- significantly impact either the measurement of \(V_\text{in}\) or \(V_\text{out}\). In each case draw
- an updated diagram which simplifies the model
- appropriately. If \(V_\text{in}\) is coming from the function generator, there is a \(50\ \Omega\) output impedance, and when you measure \(V_\text{in}\) on the scope there is a \(1\text{ M}\Omega\) measurement impedance (see Figure 3). In each of the following cases, decide whether the \(50\ \Omega\), the \(1\text{ M}\Omega\), both, or neither impedances will significantly impact either the measurement of \(V_\text{in}\) or \(V_\text{out}\). In each case draw an updated diagram which simplifies the model appropriately. \(R=100\ \Omega\) and
- \(R_F=1\text{
- k}\Omega\) \(R=10\text{ k}\Omega\)
- and \(R_F=100\text{
- k}\Omega\) \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\) \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\) Hint 1: The same voltage is across \(R\) and the \(1\text{ M}\Omega\) of the
- oscilloscope, so these resistors are in parallel. Hint 2: Consider the voltage division between the
- output impedance (of the function generator) and the input
- impedance (of the amplifier). Between the two options for resistor values, do you think it
- is it more reasonable to choose the lower resistances, or the
- higher resistances for the same gain? Why? In LTspice, make an inverting amplifier. You will need to
- power the op-amp (Use the “Net Label” tool to avoid
- clutter). Hint 1: The same voltage is across \(R\) and the \(1\text{ M}\Omega\) of the oscilloscope, so these resistors are in parallel. Hint 2: Consider the voltage division between the output impedance (of the function generator) and the input impedance (of the amplifier). Between the two options for resistor values, do you think it is it more reasonable to choose the lower resistances, or the higher resistances for the same gain? Why? In LTspice, make an inverting amplifier. You will need to power the op-amp (Use the “Net Label” tool to avoid clutter). Screen shot your circuit. Make \(V_\text{in}\) a
- \(1\text{ V}\) sine wave at
- \(1\text{ kHz}\). Run the simulation with \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\) and measure
- \(V_\text{out}\). Change the resistors to \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\) and
- re-run the simulation. Measure \(V_\text{out}\). Do your measurements depend on the input impedance?
- Why? Edit \(V_\text{in}\) so
- that it has \(50\ \Omega\) of
- output impedance (series resistance). You can do this by right
- clicking the source and finding the “series resistance
- option.” Make \(V_\text{in}\) a \(1\text{ V}\) sine wave at \(1\text{ kHz}\). Run the simulation with \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\) and measure \(V_\text{out}\). Change the resistors to \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\) and re-run the simulation. Measure \(V_\text{out}\). Do your measurements depend on the input impedance? Why? Edit \(V_\text{in}\) so that it has \(50\ \Omega\) of output impedance (series resistance). You can do this by right clicking the source and finding the “series resistance option.” Repeat the simulation and measurements for \(R=100\ \Omega\) and
- \(R_F=1\text{
- k}\Omega\) \(R=10\text{ k}\Omega\)
- and \(R_F=100\text{
- k}\Omega\) \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\) \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\) Do you get the same result compared to when the voltage
- source was ideal? Explain what causes the discrepancy. Do you get the same result compared to when the voltage source was ideal? Explain what causes the discrepancy. The frequency dependence of the non-inverting amplifier and
- the inverting amplifier are the same \[A(f)=\frac{A_\text{VOL}}{1+j\frac{f}{f_0}}\] \[G=\frac{G_0}{1+j\frac{f}{f_B}}\] However, the relationship between the gain and the 3 dB
- frequency is different from the non-inverting amplifier (gain
- bandwidth product is a bit of a misnomer). \[f_T = \frac{-G_0 f_B}{1 - B} =
- A_\text{VOL}f_0\] Note though, that the gain of the non-inverting amplifier
- was \(1/B\). With some
- algebra, you can show that \[\frac{-G_0}{1 -
- B}=\frac{1}{B}\] The frequency dependence of the non-inverting amplifier and the inverting amplifier are the same \[A(f)=\frac{A_\text{VOL}}{1+j\frac{f}{f_0}}\] \[G=\frac{G_0}{1+j\frac{f}{f_B}}\] However, the relationship between the gain and the 3 dB frequency is different from the non-inverting amplifier (gain bandwidth product is a bit of a misnomer). \[f_T = \frac{-G_0 f_B}{1 - B} = A_\text{VOL}f_0\] Note though, that the gain of the non-inverting amplifier was \(1/B\). With some algebra, you can show that \[\frac{-G_0}{1 - B}=\frac{1}{B}\] so for both inverting and non-inverting amplifiers \[\text{GBW}=f_T = \frac{f_B}{B}=
- A_\text{VOL}f_0\] What is \(f_B\) when \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\)? \[\text{GBW}=f_T = \frac{f_B}{B}= A_\text{VOL}f_0\] What is \(f_B\) when \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\)? The Summing Amplifier, shown in Figure 4, is a very flexible circuit. Notice
- that it is just like the inverting amplifier op-amp
- configuration, but it has multiple inputs coming together at
- the inverting input. Since \(V_-\) is a virtual
- ground, each input \(i\)
- with input voltage \(V_i\) has
- an input impedance of \(R_i\). Each input has a current through it which can be determined
- with Kircchoff’s voltage law The Summing Amplifier, shown in Figure 4, is a very flexible circuit. Notice that it is just like the inverting amplifier op-amp configuration, but it has multiple inputs coming together at the inverting input. Since \(V_-\) is a virtual ground, each input \(i\) with input voltage \(V_i\) has an input impedance of \(R_i\). Each input has a current through it which can be determined with Kircchoff’s voltage law \[V_i - I_iR_i=0\] \[I_i =
- \frac{V_i}{R_i}\] All of these current paths combine near the inverting input
- before going through \(R_F\);
- by Kircchoff’s current law, the current through \(R_F\) is the sum of all of these
- input currents \[I_F = \sum_{i=1}^n
- I_i=\sum_{i=1}^n\frac{V_i}{R_i}\] Finally, the voltage rise from the virtual ground
- to \(V_\text{out}\) can be
- calculated by Kircchoff’s voltage law \[V_\text{out} = 0-R_FI_F
- = -R_F\sum_{i=1}^n \frac{V_i}{R_i}\] Note: If you have the same input source, like the
- function generator, going into multiple inputs, it will have to
- supply current to all of these. Sources of current have current
- limits, and splitting the current into too many outputs can
- make it quickly reach its current limit. In the lab, you will use a summing amplifier to build a
- digital-to-analog converter (DAC). This is one of the many
- incredibly useful applications of the summing amplifier. In
- order to design the circuit, you will need to have some
- understanding of binary numbers (in digital circuits, all
- numbers are in binary). In binary there are only two states: 0
- and 1 (aka false and true or
- off and on). In digital
- circuits, the 1 state is usually \(5\text{ V}\) (but \(3.3\text{ V}\) is also
- common). You may or may not have experience with binary-decimal
- conversions, but it’s pretty straight forward. A binary number
- like \[I_i = \frac{V_i}{R_i}\] All of these current paths combine near the inverting input before going through \(R_F\); by Kircchoff’s current law, the current through \(R_F\) is the sum of all of these input currents \[I_F = \sum_{i=1}^n I_i=\sum_{i=1}^n\frac{V_i}{R_i}\] Finally, the voltage rise from the virtual ground to \(V_\text{out}\) can be calculated by Kircchoff’s voltage law \[V_\text{out} = 0-R_FI_F = -R_F\sum_{i=1}^n \frac{V_i}{R_i}\] Note: If you have the same input source, like the function generator, going into multiple inputs, it will have to supply current to all of these. Sources of current have current limits, and splitting the current into too many outputs can make it quickly reach its current limit. In the lab, you will use a summing amplifier to build a digital-to-analog converter (DAC). This is one of the many incredibly useful applications of the summing amplifier. In order to design the circuit, you will need to have some understanding of binary numbers (in digital circuits, all numbers are in binary). In binary there are only two states: 0 and 1 (aka false and true or off and on). In digital circuits, the 1 state is usually \(5\text{ V}\) (but \(3.3\text{ V}\) is also common). You may or may not have experience with binary-decimal conversions, but it’s pretty straight forward. A binary number like \[101101\] can be converted by knowing that each bit of a binary number
- represents \(2^i\) where \(i\) is represents a bit’s place,
- so the number above is \[1\cdot2^5+0\cdot2^4+1\cdot2^3+1\cdot2^2+0\cdot2^1+1\cdot2^0\] can be converted by knowing that each bit of a binary number represents \(2^i\) where \(i\) is represents a bit’s place, so the number above is \[1\cdot2^5+0\cdot2^4+1\cdot2^3+1\cdot2^2+0\cdot2^1+1\cdot2^0\] The conversion in general can be formalized \[\sum_{i=0}a_i2^i\] where each \(a_i\) is
- either 0 or 1 (this counts from right to left). You will build a 3-bit DAC; this means that it will be able
- to convert 3 digit binary numbers (in binary, digits are
- referred to as bits). Make a table with all 8 possible 3-bit
- binary numbers on the left and the corresponding decimal
- equivalents on the right. For example: 000 in binary is 0 in
- decimal. If you need more of a refresher on binary or counting
- in binary, this
- Wikipedia entry will hopefully be useful. It makes the most sense to make \(0\text{ V}\) represent binary 0.
- However, the choice of voltage to represent binary 1 is mostly
- arbitrary, but \(5\text{ V}\)
- is the most commonly used. With \(R_F=27\text{
- k}\Omega\), choose resistor values for the 3 input
- resistors such that \(V_\text{out}\) corresponds to the
- analog voltage (decimal equivalent) corresponding to the
- digital 3-bit number input. Calling the inputs \(i=0,\ 1,\
- 2\) corresponding to the 0th, 1st,
- and 2nd place of the binary number makes things
- easier to track since these correspond to the relevant
- exponents \(2^i\) . You need
- to convert the 8 possible combinations of \(0\text{ V}\) and \(5\text{ V}\) input to \(0-7\text{ V}\) Hint: Focusing on 001, 010, and 100 will make
- things easiest. where each \(a_i\) is either 0 or 1 (this counts from right to left). You will build a 3-bit DAC; this means that it will be able to convert 3 digit binary numbers (in binary, digits are referred to as bits). Make a table with all 8 possible 3-bit binary numbers on the left and the corresponding decimal equivalents on the right. For example: 000 in binary is 0 in decimal. If you need more of a refresher on binary or counting in binary, this Wikipedia entry will hopefully be useful. It makes the most sense to make \(0\text{ V}\) represent binary 0. However, the choice of voltage to represent binary 1 is mostly arbitrary, but \(5\text{ V}\) is the most commonly used. With \(R_F=27\text{ k}\Omega\), choose resistor values for the 3 input resistors such that \(V_\text{out}\) corresponds to the analog voltage (decimal equivalent) corresponding to the digital 3-bit number input. Calling the inputs \(i=0,\ 1,\ 2\) corresponding to the 0th, 1st, and 2nd place of the binary number makes things easier to track since these correspond to the relevant exponents \(2^i\) . You need to convert the 8 possible combinations of \(0\text{ V}\) and \(5\text{ V}\) input to \(0-7\text{ V}\) Hint: Focusing on 001, 010, and 100 will make things easiest. The integrator is shown in Figure 5. This is like the inverting
- amplifier but with the feedback resistor replaced with a
- feedback capacitor. Due to the complex impedance of the capacitor, the transfer
- function \(B\) also becomes
- complex \[B = \frac{R}{R+\frac{1}{j\omega
- C}}=\frac{j\omega R C}{1+j\omega R C}\] The voltage and current golden rules can be applied to solve
- for \(V_\text{out}\). If we
- assume the positive current direction runs from \(V_\text{out}\) to \(V_\text{in}\), the virtual ground
- means that The integrator is shown in Figure 5. This is like the inverting amplifier but with the feedback resistor replaced with a feedback capacitor. Due to the complex impedance of the capacitor, the transfer function \(B\) also becomes complex \[B = \frac{R}{R+\frac{1}{j\omega C}}=\frac{j\omega R C}{1+j\omega R C}\] The voltage and current golden rules can be applied to solve for \(V_\text{out}\). If we assume the positive current direction runs from \(V_\text{out}\) to \(V_\text{in}\), the virtual ground means that \[V_\text{in}+IR=0\] Then we can consider the voltage across the capacitor and
- how that compares to the charge stored in it Then we can consider the voltage across the capacitor and how that compares to the charge stored in it \[Q=CV_\text{out}\] By definition, current is the time derivative of charge, so
- taking the derivative of both sides gives \[I = C
- \frac{dV_\text{out}}{dt}\] By definition, current is the time derivative of charge, so taking the derivative of both sides gives \[I = C \frac{dV_\text{out}}{dt}\] Combining the two equations yields \[\frac{dV_\text{out}}{dt}=-\frac{V_\text{in}}{RC}\] To solve for \(V_\text{out}\), integrate both
- sides \[V_\text{out}(t) =
- \frac{-1}{RC}\int_0^t V_\text{in}(t')\;
- dt'\] This relationship between \(V_\text{in}\) and \(V_\text{out}\) is why this circuit
- is called an integrator. Sketch (or plot in Mathematica or Python) the predicted
- waveform for the output when the input is a Sketch (or plot in Mathematica or Python) the predicted waveform for the output when the input is a These are Voltage vs time plots/sketches (like what you
- would see on the oscilliscope). For the square and triangle
- waves, it will help to break them up into piecewise continuous
- functions with continuous derivatives. These are Voltage vs time plots/sketches (like what you would see on the oscilliscope). For the square and triangle waves, it will help to break them up into piecewise continuous functions with continuous derivatives. Hint: the square wave takes on a constant value
- in the regions where the function is continuous. Calculus refresher: the derivative is
- discontinuous where the function isn’t
- smooth. Hint: the square wave takes on a constant value in the regions where the function is continuous. Calculus refresher: the derivative is discontinuous where the function isn’t smooth. Here, by complex, we mean “involving imaginary numbers.”
- Remember that the impedance of a capacitor is \[Z_C = \frac{1}{j\omega
- C}\] so we can treat the capacitor in the circuit as an element
- with this impedance. In this case, using the same analysis that
- was done on the inverting amplifier, the equations found with
- Kircchoff’s voltage law become Here, by complex, we mean “involving imaginary numbers.” Remember that the impedance of a capacitor is \[Z_C = \frac{1}{j\omega C}\] so we can treat the capacitor in the circuit as an element with this impedance. In this case, using the same analysis that was done on the inverting amplifier, the equations found with Kircchoff’s voltage law become \[V_\text{in}+IR=0\] \[V_\text{out}-\frac{I}{j\omega
- C}=0\] Remembering that \(j=\exp(j\pi/2)\), the gain can be
- written \[G_0 =
- \frac{-e^{\frac{-j\pi}{2}}}{2\pi f RC}\] Note that this treatment for the gain works on individual
- sine wave components. To apply this gain to different
- waveforms, you would need to break them up into Fourier series
- and apply this gain to the individual sine wave terms of the
- series (this is not something we expect you to do). For a sine wave (or sine wave component of a Fourier series)
- the magnitude of the gain is \[|G_0| = \frac{1}{2 \pi f
- RC}\] The complex exponential in the gain has a phase of \(\phi=-\frac{\pi}{2}\); this means
- that the gain will phase shift the output by this much. Note
- that \(\sin(\omega t -
- \frac{\pi}{2})=-\cos(\omega t)\), so this phase shift is
- equivalent to integrating. Notice that the gain falls off as a function of frequency.
- This makes it act like a low-pass filter. Integrators are often
- used as low-pass filters, but there are better ways to make a
- proper low-pass filter with op-amps. If you’re interested in
- reading more about the technical difference of a proper op-amp
- low-pass filter and an integrator, here’s a technical
- paper (that you can access as long as you’re on the
- university network) and a forum
- discussion on the topic. \[V_\text{out}-\frac{I}{j\omega C}=0\] Remembering that \(j=\exp(j\pi/2)\), the gain can be written \[G_0 = \frac{-e^{\frac{-j\pi}{2}}}{2\pi f RC}\] Note that this treatment for the gain works on individual sine wave components. To apply this gain to different waveforms, you would need to break them up into Fourier series and apply this gain to the individual sine wave terms of the series (this is not something we expect you to do). For a sine wave (or sine wave component of a Fourier series) the magnitude of the gain is \[|G_0| = \frac{1}{2 \pi f RC}\] The complex exponential in the gain has a phase of \(\phi=-\frac{\pi}{2}\); this means that the gain will phase shift the output by this much. Note that \(\sin(\omega t - \frac{\pi}{2})=-\cos(\omega t)\), so this phase shift is equivalent to integrating. Notice that the gain falls off as a function of frequency. This makes it act like a low-pass filter. Integrators are often used as low-pass filters, but there are better ways to make a proper low-pass filter with op-amps. If you’re interested in reading more about the technical difference of a proper op-amp low-pass filter and an integrator, here’s a technical paper (that you can access as long as you’re on the university network) and a forum discussion on the topic. Calculate an RC time constant that results in a gain of \[|G_0| = \frac{10}{2\pi}\approx
- 1.6\] for a \(1\text{ kHz}\) sine
- wave. Choosing values for the resistor and capacitor depends on
- several considerations. First, one needs to determine the
- desired RC time constant. This will depend on the expected
- signal (size, shape, and frequency), and the desired output
- (remembering the op-amp limitations on maximum output voltage
- and slew rate). Once \(RC\) is
- determined, some considerations for choosing \(R\) and \(C\) are: \[|G_0| = \frac{10}{2\pi}\approx 1.6\] for a \(1\text{ kHz}\) sine wave. Choosing values for the resistor and capacitor depends on several considerations. First, one needs to determine the desired RC time constant. This will depend on the expected signal (size, shape, and frequency), and the desired output (remembering the op-amp limitations on maximum output voltage and slew rate). Once \(RC\) is determined, some considerations for choosing \(R\) and \(C\) are: For this application, non-polarized capacitors should be
- selected because the applied voltage will oscillate around
- \(0\). Availability: resistors from \(1\ \Omega\) to \(10\text{ M}\Omega\) and
- non-polarized capacitors from \(2\text{ pF}\) to \(1\ \text{μF}\) are readily
- available in the lab. Input impedance: generally a high input impedance is
- desired to avoid voltage dividing the input signal with the
- \(50\ \Omega\) output
- impedance of the function generator. \(1\text{ k}\Omega\) input impedance
- will have a transfer function of \(0.952\) voltage dividing with
- \(50\ \Omega\), and it is
- recommended to have at least this much input impedance (but
- more is better). Avoiding stray capacitance effects: there are many
- sources of capacitance, such as cables, which can
- unintentionally couple to or decouple your signal. For this
- reason, it is advisable to avoid very small capacitors as the
- stray capacitances may end up dominating. A few hundred
- picofarads should be sufficient. For this application, non-polarized capacitors should be selected because the applied voltage will oscillate around \(0\). Availability: resistors from \(1\ \Omega\) to \(10\text{ M}\Omega\) and non-polarized capacitors from \(2\text{ pF}\) to \(1\ \text{μF}\) are readily available in the lab. Input impedance: generally a high input impedance is desired to avoid voltage dividing the input signal with the \(50\ \Omega\) output impedance of the function generator. \(1\text{ k}\Omega\) input impedance will have a transfer function of \(0.952\) voltage dividing with \(50\ \Omega\), and it is recommended to have at least this much input impedance (but more is better). Avoiding stray capacitance effects: there are many sources of capacitance, such as cables, which can unintentionally couple to or decouple your signal. For this reason, it is advisable to avoid very small capacitors as the stray capacitances may end up dominating. A few hundred picofarads should be sufficient. Dealing with DC offsets: A DC offset,
- however small, integrates to a linear growth over time (the
- capacitor builds up charge) which will cause the output to hit
- one of the op-amp’s maximum output voltages. Op-amps usually
- have small DC offsets even if the input signal has no offset.
- One way to mitigate this is to add a resistor in parallel with
- the capacitor so that charge can leak out of the capacitor
- overtime. A real capacitor can be accurately modeled as an ideal
- capacitor with resistance in series and in parallel with it
- (see Figure 6). Good capacitors
- have very small series resistance and very large parallel
- resistance. The parallel resistance often has to do with the
- dielectric material inside “leaking” charge through it. When
- the LCR meter is used to measure a capcitance, it is unable to
- apply the series+parallel resistance model with a single
- measurement; it can be set to either measure with a parallel
- resistance model or a series resistance model (see
- Figure 7). For this application in
- particular, it is a good idea to measure the capacitor with a
- parallel resistance model so that you know how much resistance
- should be added in parallel to reach a specific parallel
- resistance to get the right amount of “leakage.” Dealing with DC offsets: A DC offset, however small, integrates to a linear growth over time (the capacitor builds up charge) which will cause the output to hit one of the op-amp’s maximum output voltages. Op-amps usually have small DC offsets even if the input signal has no offset. One way to mitigate this is to add a resistor in parallel with the capacitor so that charge can leak out of the capacitor overtime. A real capacitor can be accurately modeled as an ideal capacitor with resistance in series and in parallel with it (see Figure 6). Good capacitors have very small series resistance and very large parallel resistance. The parallel resistance often has to do with the dielectric material inside “leaking” charge through it. When the LCR meter is used to measure a capcitance, it is unable to apply the series+parallel resistance model with a single measurement; it can be set to either measure with a parallel resistance model or a series resistance model (see Figure 7). For this application in particular, it is a good idea to measure the capacitor with a parallel resistance model so that you know how much resistance should be added in parallel to reach a specific parallel resistance to get the right amount of “leakage.” Design an integrator that would have Please review the lab activities so that you’re better
- prepared when you arrive to your lab section. You can find more on these circuits from these recommended
- sources: Please review the lab activities so that you’re better prepared when you arrive to your lab section. You can find more on these circuits from these recommended sources: Steck
- Sections 7.1, 7.2, 7.3.1, 7.3.2, 7.3.4, 2.2.1, 7.4.2 Steck Sections 7.1, 7.2, 7.3.1, 7.3.2, 7.3.4, 2.2.1, 7.4.2 Fischer-Cripps Sections 12.2–12.15 Horowitz and Hill 2nd Ed., Sections
- 4.04–4.08, 4.19, 4.20 and Sections 1.13–1.15 Horowitz and Hill 2nd Ed., Sections 4.04–4.08, 4.19, 4.20 and Sections 1.13–1.15 In this lab, we will use ICs (integrated circuits) for the
- second time. Here’s a review of the tips from last lab.
- Read through them all again before you begin
- using any IC chips. You should refer back to this section in
- future labs to remind yourself of these useful tips. In this lab, we will use ICs (integrated circuits) for the second time. Here’s a review of the tips from last lab. Read through them all again before you begin using any IC chips. You should refer back to this section in future labs to remind yourself of these useful tips. Always unplug the power supply from your circuit while
- you’re wiring it. Chips sit across the groove on the breadboard (see
- Figure 8). Any other placement
- will cause legs to short together. Always unplug the power supply from your circuit while you’re wiring it. Chips sit across the groove on the breadboard (see Figure 8). Any other placement will cause legs to short together. Before inserting a chip, ensure the pins are straight
- (using a needle-nose pliers or something similar). After insertion, check visually that no pin is broken or
- bent under the chip. To remove the chip, use the dedicated IC pliers (found
- in the tool trays at your lab station). Removing ICs by hand
- often results in bent legs and/or a leg puncturing your
- finger. Before inserting a chip, ensure the pins are straight (using a needle-nose pliers or something similar). After insertion, check visually that no pin is broken or bent under the chip. To remove the chip, use the dedicated IC pliers (found in the tool trays at your lab station). Removing ICs by hand often results in bent legs and/or a leg puncturing your finger. Use the long columns on your breadboard for your power
- and ground voltages (with power and ground next to each other)
- to take advantage of the parasitic decoupling capacitance of
- the long line. Use the long columns on your breadboard for your power and ground voltages (with power and ground next to each other) to take advantage of the parasitic decoupling capacitance of the long line. Color code your wires. We recommend: 0V (ground)
- Black 0V (ground) Black +15V Red -15V Blue Use other colors for any other connections which aren’t
- to \(\pm\) power or
- ground Use other colors for any other connections which aren’t to \(\pm\) power or ground Connect capacitors between the power pin(s) of the IC
- (as close to the pin as possible as in Figure 8) to ground. These are called
- decoupling or bypass capacitors and are critical for
- maintaining constant voltage at the pin as the current needs
- change. Use nice, big polarized (electrolytic) capacitors
- (\(>1\ \mu\text{F}\)) so
- that they’re able to collect enough charge to deliver the
- necessary current when needed. Measure all your passive elements (resistors,
- capacitors, inductors, diodes) before putting them in the
- circuits; trying to measure while they are plugged into the
- breadboard can lead to mistakes. Always have a diagram of your circuit with pin numbers
- labeled (like the left side of Figure 9). Make sure any polarized (electrolytic) capacitors are
- oriented such that the higher voltage is applied to the correct
- lead of the capacitor. Remember: ground is a
- HIGHER voltage than \(-15\ \text{V}\). Getting this
- backward will cause the capacitor to explode: this is loud,
- smelly, and a bit embarrassing. Wires that your signal go through should be kept short
- and compact. This minimizes the parasitic inductance and
- capacitance and will better preserve the signal. Don’t put your
- signals into the long columns running down the
- breadboard. Don’t make any connections that cross over the top of
- the IC (like the feedback connection for an op-amp); instead,
- go around the IC. Connect capacitors between the power pin(s) of the IC (as close to the pin as possible as in Figure 8) to ground. These are called decoupling or bypass capacitors and are critical for maintaining constant voltage at the pin as the current needs change. Use nice, big polarized (electrolytic) capacitors (\(>1\ \mu\text{F}\)) so that they’re able to collect enough charge to deliver the necessary current when needed. Measure all your passive elements (resistors, capacitors, inductors, diodes) before putting them in the circuits; trying to measure while they are plugged into the breadboard can lead to mistakes. Always have a diagram of your circuit with pin numbers labeled (like the left side of Figure 9). Make sure any polarized (electrolytic) capacitors are oriented such that the higher voltage is applied to the correct lead of the capacitor. Remember: ground is a HIGHER voltage than \(-15\ \text{V}\). Getting this backward will cause the capacitor to explode: this is loud, smelly, and a bit embarrassing. Wires that your signal go through should be kept short and compact. This minimizes the parasitic inductance and capacitance and will better preserve the signal. Don’t put your signals into the long columns running down the breadboard. Don’t make any connections that cross over the top of the IC (like the feedback connection for an op-amp); instead, go around the IC. This makes it so you can pull out the IC without
- disturbing the rest of the circuit. This helps ensure magnetic fields generated by the
- current in the wire don’t interact with the inner workings of
- the IC. This makes it so you can pull out the IC without disturbing the rest of the circuit. This helps ensure magnetic fields generated by the current in the wire don’t interact with the inner workings of the IC. Compare your physical circuit to the diagram before
- connecting the power supply (especially polarized capacitor
- orientations). Compare your physical circuit to the diagram before connecting the power supply (especially polarized capacitor orientations). Use your test circuit from lab 4 to confirm that your
- op-amp is working. Find and measure resistors with the following values:
- \(100\ \Omega\), \(1\text{ k}\Omega\), \(10\text{ k}\Omega\), and \(100\text{ k}\Omega\). Draw a circuit diagram that appropriately models the
- behavior of the inverting amplifier with \(R=100\ \Omega\), \(R_F=1\text{ k}\Omega\),
- considering the output impedance of the function generator
- and/or the input impedance of the oscilliscope (check in with
- an instructor if you’re unsure your models are
- reasonable). Build an inverting amplifier with \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\). (Don’t
- forget to follow all the IC tips above). Below is the LF356 pin
- diagram for easy reference. Use your test circuit from lab 4 to confirm that your op-amp is working. Find and measure resistors with the following values: \(100\ \Omega\), \(1\text{ k}\Omega\), \(10\text{ k}\Omega\), and \(100\text{ k}\Omega\). Draw a circuit diagram that appropriately models the behavior of the inverting amplifier with \(R=100\ \Omega\), \(R_F=1\text{ k}\Omega\), considering the output impedance of the function generator and/or the input impedance of the oscilliscope (check in with an instructor if you’re unsure your models are reasonable). Build an inverting amplifier with \(R=100\ \Omega\) and \(R_F=1\text{ k}\Omega\). (Don’t forget to follow all the IC tips above). Below is the LF356 pin diagram for easy reference. Use the function generator and the oscilliscope to
- measure \(G_0\) of the
- amplifier. Compare these to your expectated values from your
- model. Swap out the resistors so that \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\). Measure
- the resistors before putting them in the circuit (Don’t forget
- to follow all the IC tips above). Below is the LF356 pin
- diagram for easy reference. Measure \(G_0\) of the
- amplifier. Measure \(f_B\) of the
- amplifier. Compare these to your expectated values from your
- model. Was there any signficant difference between the
- amplifiers you built. Use the gain-bandwidth relation and your measurements of
- \(G_0\) and \(f_B\) to determine \(f_T\) for your . Does your
- measured value of \(f_T\)
- agree with what you found last week? Use the function generator and the oscilliscope to measure \(G_0\) of the amplifier. Compare these to your expectated values from your model. Swap out the resistors so that \(R=10\text{ k}\Omega\) and \(R_F=100\text{ k}\Omega\). Measure the resistors before putting them in the circuit (Don’t forget to follow all the IC tips above). Below is the LF356 pin diagram for easy reference. Measure \(G_0\) of the amplifier. Measure \(f_B\) of the amplifier. Compare these to your expectated values from your model. Was there any signficant difference between the amplifiers you built. Use the gain-bandwidth relation and your measurements of \(G_0\) and \(f_B\) to determine \(f_T\) for your . Does your measured value of \(f_T\) agree with what you found last week? Find resistor values close to what you calculated in
- your prelab for the 3-bit digital-to-analog converter (you may
- want to check with an instructor to be sure they make sense).
- Precision isn’t super important here, so don’t worry about
- combining a bunch of resistors to get exactly the right values.
- Measure all the resistors. Draw a circuit diagram for the summing amplifier with
- these resistor values and make a table with predicted output
- voltages for all 8 3-bit inputs. Either make a new circuit or modify your inverting
- amplifier circuit to make the summing amplifier you
- designed. Measure the output of your circuit for all 8 3-bit
- combintations. Find resistor values close to what you calculated in your prelab for the 3-bit digital-to-analog converter (you may want to check with an instructor to be sure they make sense). Precision isn’t super important here, so don’t worry about combining a bunch of resistors to get exactly the right values. Measure all the resistors. Draw a circuit diagram for the summing amplifier with these resistor values and make a table with predicted output voltages for all 8 3-bit inputs. Either make a new circuit or modify your inverting amplifier circuit to make the summing amplifier you designed. Measure the output of your circuit for all 8 3-bit combintations. Compare these to your predictions. By now, you should be somewhat comfortable with experimental
- design and reporting of outcomes, especially with op-amps and
- voltage dividers. In this last section, you will design and
- characterize an integrator. Your starting point should be the
- integrator circuit you designed in the prelab. Here are some
- things to consider and items you may wish to include in your
- lab notebook: By now, you should be somewhat comfortable with experimental design and reporting of outcomes, especially with op-amps and voltage dividers. In this last section, you will design and characterize an integrator. Your starting point should be the integrator circuit you designed in the prelab. Here are some things to consider and items you may wish to include in your lab notebook: The integration is over time. Describe the circuit you are building and testing
- (design your integrator for the conditions detailed in the
- prelab). Draw the schematic of the circuit with component values
- labeled (don’t forget to measure the parallel resistance of
- your capacitor). Design for a parallel resistance of ~\(800\text{ k}\Omega\) for the
- capacitor. Factor in the capacitor’s measured parallel
- resistance for targeting this value. List your predictions / models. It is fine to start by
- using ideal models. How do you plan to test it? Be sure to use square,
- triangle, and sine waves at various frequencies. Use sine waves to test the gain at \(1\text{ kHz}\), \(10\text{ kHz}\), \(100\text{ kHz}\) Do the results match your model? What didn’t
- match? How would you refine your model or physical system to
- get better agreement? Hint: We didn’t consider the
- parallel resistance in the model. How could you modify analysis
- above to consider this resistance in your model? Can you
- correct any major discrepancies between your measured results
- and the original model? Describe the circuit you are building and testing (design your integrator for the conditions detailed in the prelab). Draw the schematic of the circuit with component values labeled (don’t forget to measure the parallel resistance of your capacitor). Design for a parallel resistance of ~\(800\text{ k}\Omega\) for the capacitor. Factor in the capacitor’s measured parallel resistance for targeting this value. List your predictions / models. It is fine to start by using ideal models. How do you plan to test it? Be sure to use square, triangle, and sine waves at various frequencies. Use sine waves to test the gain at \(1\text{ kHz}\), \(10\text{ kHz}\), \(100\text{ kHz}\) Do the results match your model? What didn’t match? How would you refine your model or physical system to get better agreement? Hint: We didn’t consider the parallel resistance in the model. How could you modify analysis above to consider this resistance in your model? Can you correct any major discrepancies between your measured results and the original model? We did not cover this in the prelab, but as you may be able
- to guess, by swapping the input resistor and the feedback
- capacitor (to an input capacitor and a feedback resistor),
- instead of integrating the signal, you will differentiate the
- signal \[V_\text{out} = - RC
- \frac{dV_\text{in}}{dt}\] Differentiator amplifiers, like integrators are used to
- shape waveforms and in control systems. They can also be used
- in analog computing applications to solve differential
- equations (final project idea?). In this case, the input impedance is related to the
- impedance of the capacitor (it’s the magnitude of the complex
- impedance) \[R'_i \approx \frac{1}{2\pi
- f C}\] This means to get at least \(10\text{ k}\Omega\) of input
- impedance at \(1\text{ kHz}\),
- the capacitance should be no more than \(16\text{ nF}\). We did not cover this in the prelab, but as you may be able to guess, by swapping the input resistor and the feedback capacitor (to an input capacitor and a feedback resistor), instead of integrating the signal, you will differentiate the signal \[V_\text{out} = - RC \frac{dV_\text{in}}{dt}\] Differentiator amplifiers, like integrators are used to shape waveforms and in control systems. They can also be used in analog computing applications to solve differential equations (final project idea?). In this case, the input impedance is related to the impedance of the capacitor (it’s the magnitude of the complex impedance) \[R'_i \approx \frac{1}{2\pi f C}\] This means to get at least \(10\text{ k}\Omega\) of input impedance at \(1\text{ kHz}\), the capacitance should be no more than \(16\text{ nF}\). Is your choice of capacitor sufficiently small for \(1\text{ kHz}\)? (i.e. will there
- be enough input impedance). Swap your resistor and capacitor and test a triangle
- wave input at \(1\text{ kHz}\)
- to confirm that this circuit takes the time derivative of the
- input. Is your choice of capacitor sufficiently small for \(1\text{ kHz}\)? (i.e. will there be enough input impedance). Swap your resistor and capacitor and test a triangle wave input at \(1\text{ kHz}\) to confirm that this circuit takes the time derivative of the input. In this lab, you will design and build a photometer (a
- device that measures the intensity of light) based on a silicon
- photodiode and a current-to-voltage amplifier whose output is
- proportional to the intensity of incident light. First, you
- will use it to measure the room light intensity. Then you will
- set up and investigate an optical communication link in which
- the transmitter is a light emitting diode (LED) and the
- receiver is your photodiode detector. In this lab you will get your first exposure to diodes.
- There are three kinds of diodes you will use this week: In this lab, you will design and build a photometer (a device that measures the intensity of light) based on a silicon photodiode and a current-to-voltage amplifier whose output is proportional to the intensity of incident light. First, you will use it to measure the room light intensity. Then you will set up and investigate an optical communication link in which the transmitter is a light emitting diode (LED) and the receiver is your photodiode detector. In this lab you will get your first exposure to diodes. There are three kinds of diodes you will use this week: Rectifier diodes (often just referred to as
- “diodes”), Rectifier diodes (often just referred to as “diodes”), Light emitting diodes (LEDs), Photodiodes. You will also learn how to build a new op-amp circuit: the
- transimpedance amplifier. This type of amplifier is a current
- to voltage converter, which means that it takes current as an
- input and outputs a voltage. In this lab you will model the following physical
- systems: You will also learn how to build a new op-amp circuit: the transimpedance amplifier. This type of amplifier is a current to voltage converter, which means that it takes current as an input and outputs a voltage. In this lab you will model the following physical systems: A transimpedance amplifier The sensitivity to light of a photodiode, This week, you will build: A device that measures light intensity
- (photometer), A transducer device that can send information/signals
- via optical light from one circuit to another (optical
- communication link). A device that measures light intensity (photometer), A transducer device that can send information/signals via optical light from one circuit to another (optical communication link). Intensity - power per unit area; units are
- \(\text{W/m}^2\) and symbol
- (for this lab) is \(N\) (often
- it is represented by \(I\),
- but we use that symbol for current!). A diode is a device which conducts electricity primarily in
- one direction. The original diodes were in the form of vacuum
- tubes (here’s a fun
- video if you care to learn more), but today they are made
- from semiconducting materials (like silicon) because of their
- relative robustness, long lifetimes, and compact size. A diode
- is mode from a p-n junction where a positively-doped
- semiconductor (p-type) with mobile “holes” is in contact with a
- negatively-doped semiconductor (n-type) with mobile electrons.
- Watch
- this short video. A semiconductor diode has two terminals: an anode (+) and a
- cathode (-); a good mnemonic to remember the polarity of anodes
- and cathodes is remembering that cats (cathodes) have negative
- attitudes (sorry cat lovers). The symbol for a diode resembles
- an arrow with a hat (see the diagram in Figure 1), where the hat is referred to as
- “the bar” and is the cathode; a good mnemonic is seeing the
- symbol as an arrow which points in the direction that the diode
- allows current, since current flows from positive to negative,
- “the bar” is the cathode. The fundamental property of a diode is its tendency to
- conduct electric current in only one direction. The diode can
- be operated in three regions (these regions are shown in
- different colors in Figure 1). Intensity - power per unit area; units are \(\text{W/m}^2\) and symbol (for this lab) is \(N\) (often it is represented by \(I\), but we use that symbol for current!). A diode is a device which conducts electricity primarily in one direction. The original diodes were in the form of vacuum tubes (here’s a fun video if you care to learn more), but today they are made from semiconducting materials (like silicon) because of their relative robustness, long lifetimes, and compact size. A diode is mode from a p-n junction where a positively-doped semiconductor (p-type) with mobile “holes” is in contact with a negatively-doped semiconductor (n-type) with mobile electrons. Watch this short video. A semiconductor diode has two terminals: an anode (+) and a cathode (-); a good mnemonic to remember the polarity of anodes and cathodes is remembering that cats (cathodes) have negative attitudes (sorry cat lovers). The symbol for a diode resembles an arrow with a hat (see the diagram in Figure 1), where the hat is referred to as “the bar” and is the cathode; a good mnemonic is seeing the symbol as an arrow which points in the direction that the diode allows current, since current flows from positive to negative, “the bar” is the cathode. The fundamental property of a diode is its tendency to conduct electric current in only one direction. The diode can be operated in three regions (these regions are shown in different colors in Figure 1). The first region, called forward biased, is
- when the anode has a higher potential relative to the cathode
- by at least some threshold voltage (about \(0.6\text{ V}\) for silicon
- diodes). When the anode-cathode voltage is above the threshold
- voltage the diode conducts with almost zero resistance and has
- a constant \(0.6\text{ V}\)
- drop across it. The second region of operation is where the cathode has
- a lower potential relative to the anode. This region is called
- reversed biased and essentially no current can flow. Finally, if the potential difference from the cathode to
- the anode is negative and larger than some breakdown voltage,
- the diode will again conduct. Regular diodes are not used in
- the break down region (on purpose), but Zener diodes have well
- defined breakdown voltages and are used for several purpose
- (these may be useful for your final project). The first region, called forward biased, is when the anode has a higher potential relative to the cathode by at least some threshold voltage (about \(0.6\text{ V}\) for silicon diodes). When the anode-cathode voltage is above the threshold voltage the diode conducts with almost zero resistance and has a constant \(0.6\text{ V}\) drop across it. The second region of operation is where the cathode has a lower potential relative to the anode. This region is called reversed biased and essentially no current can flow. Finally, if the potential difference from the cathode to the anode is negative and larger than some breakdown voltage, the diode will again conduct. Regular diodes are not used in the break down region (on purpose), but Zener diodes have well defined breakdown voltages and are used for several purpose (these may be useful for your final project). The IV curve above describes the behavior of the diode as a
- function of voltage applied. A simple way to interpret this
- plot is that the diode only allows current to flow in the
- forward direction (the direction the diode symbol’s arrow
- points) when the voltage is above the forward voltage, and it
- will allow current in the reverse direction only if a negative
- voltage exceeds the breakdown voltage. In general, to know the
- amount of current, requires analysis of the resistors involved
- in the circuit. The IV curve above describes the behavior of the diode as a function of voltage applied. A simple way to interpret this plot is that the diode only allows current to flow in the forward direction (the direction the diode symbol’s arrow points) when the voltage is above the forward voltage, and it will allow current in the reverse direction only if a negative voltage exceeds the breakdown voltage. In general, to know the amount of current, requires analysis of the resistors involved in the circuit. Fill in the blank: The ____ode terminal is marked with a (+) and the
- ____ode is marked with a (-) When forward biased, current flows from the ____ode to
- the ____ode which is marked with “the bar.” The ____ode terminal is marked with a (+) and the ____ode is marked with a (-) When forward biased, current flows from the ____ode to the ____ode which is marked with “the bar.” In your own words, describe: The breakdown region. The reverse bias region. The forward bias region. -2 V, +2 V, +4 V. Hint: If you’re struggling with this, consider the
- following strategy: consider the 3 regions in Figure 1. First determine which region the
- diode will be in as a result of the value of \(V_\text{in}\). In this region,
- will there be current? In this region, what can the voltage
- across the diode be? If the diode is forward biased, there will
- be current, and the voltage across the diode will be \(0.6\text{ V}\); how much of the
- total voltage will be across the resistor in this case? If the
- diode is reverse biased, there will not be current, and
- therefore, there will be no voltage drop across the resistor;
- what must be the voltage drop across the diode then? Hint: \(V_\text{out}\) is the voltage
- across the diode. Hint: If you’re struggling with this, consider the following strategy: consider the 3 regions in Figure 1. First determine which region the diode will be in as a result of the value of \(V_\text{in}\). In this region, will there be current? In this region, what can the voltage across the diode be? If the diode is forward biased, there will be current, and the voltage across the diode will be \(0.6\text{ V}\); how much of the total voltage will be across the resistor in this case? If the diode is reverse biased, there will not be current, and therefore, there will be no voltage drop across the resistor; what must be the voltage drop across the diode then? Hint: \(V_\text{out}\) is the voltage across the diode. LEDs act electronically like any other diode; however,
- unlike regular diodes, it also emits light when forward-biased
- due to direct radiative recombination of electrons and holes.
- The forward voltage drop of LEDs is typically higher than \(0.6\text{ V}\). The HLMP-C625 you
- will use this week has a forward voltage of about \(1.9\text{ V}\) because the LED is
- made of \(\text{AlInGaP}\)
- instead of silicon. When electrons cross from the n-type region to the p-type
- region in a diode, they dissipate energy. In regular diodes,
- the energy is converted into heat in the form of phonons, but
- LEDs have the energy converted into photons; therefore, the
- color of the light is dictated by the band gap energy of the
- diode. LEDs act electronically like any other diode; however, unlike regular diodes, it also emits light when forward-biased due to direct radiative recombination of electrons and holes. The forward voltage drop of LEDs is typically higher than \(0.6\text{ V}\). The HLMP-C625 you will use this week has a forward voltage of about \(1.9\text{ V}\) because the LED is made of \(\text{AlInGaP}\) instead of silicon. When electrons cross from the n-type region to the p-type region in a diode, they dissipate energy. In regular diodes, the energy is converted into heat in the form of phonons, but LEDs have the energy converted into photons; therefore, the color of the light is dictated by the band gap energy of the diode. To turn on an LED, you have to run a certain amount of
- current through it. Current limiting resistors (this is just
- any resistor in series with the LED) are needed to limit the
- current to a specific value. Too little current and the LED
- will be too dim and too much current will destroy the LED. In
- the lab you will drive the HLMP-C625 LED with \(8\text{ V}\). Determine the
- resistance needed in series with LED to get \(20\text{ mA}\) of current through
- it. Don’t forget to consider the forward voltage which is \(1.9\text{ V}\). To turn on an LED, you have to run a certain amount of current through it. Current limiting resistors (this is just any resistor in series with the LED) are needed to limit the current to a specific value. Too little current and the LED will be too dim and too much current will destroy the LED. In the lab you will drive the HLMP-C625 LED with \(8\text{ V}\). Determine the resistance needed in series with LED to get \(20\text{ mA}\) of current through it. Don’t forget to consider the forward voltage which is \(1.9\text{ V}\). PIN photodiodes have an intrinsic region (undoped) between
- the p-type and n-type regions. Photons of appropriate
- wavelength absorb in the material creating an electron-hole
- pair; when reverse biased, the electric field generated by the
- voltage will pull the pair apart generating a small current.
- Therefore, (when reverse biased) the photodiode generates
- current proportional to the number of photons absorbed by the
- material. A sketch of the photodiode structure is shown in
- Figure 3. PIN photodiodes have an intrinsic region (undoped) between the p-type and n-type regions. Photons of appropriate wavelength absorb in the material creating an electron-hole pair; when reverse biased, the electric field generated by the voltage will pull the pair apart generating a small current. Therefore, (when reverse biased) the photodiode generates current proportional to the number of photons absorbed by the material. A sketch of the photodiode structure is shown in Figure 3. The amount of current generated can be determined by the
- following equation The amount of current generated can be determined by the following equation \[I=S_{\lambda}P_o\] where \(P_o\) is the
- optical power (number of photons per second
- times the photon energy) and \(S_{\lambda}\) is the wavelength
- dependent sensitivity of the photodiode (in units of \(\text{A/W}\)). A photon of
- wavelength \(\lambda\) carries
- energy \(E_\text{photon}=hc/\lambda\), so
- the photon rate is \[R_\text{photon}=\frac{P_o}{E_\text{photon}}
- = \frac{P_o\lambda}{hc}\] Let’s consider what \(S_{\lambda}\) would be for an
- ideal photodiode that converts every photon into an
- electron/hole pair. The rate of photons per second will then
- directly correspond to that many electrons per second worth of
- current, so the current is \(I=eR=P\
- (\lambda e)/(hc)\). However, in a real photodiode, not
- every photon gets absorbed and generates an electron; the
- probability that a photon is absorbed (and generates an
- electron/hole pair) depends on the wavelength \(\lambda\) and the quantum
- efficiency of the photodiode \(q_{\lambda}\) (which is a \(\lambda\) dependant number between
- 0 and 1). \[S_\lambda\le
- q_{\lambda}\frac{\lambda e}{hc}\] At \(\lambda\) = 940 nm
- (red), the ideal sensitivity (i.e. \(q_{\lambda}= 1\)) would be \(0.76\text{ A/W}\) (about \(3/4\)), a fairly easy number to
- remember. Photodiode manufacturers typically will provide the actual
- \(S_{\lambda}\) in the data
- sheet. Because the PD204-6C photodiode comes with a curved
- lens, the data sheet specifies the short circuit current \(I_{SC} = 10\ \mu \text{A}\) at an
- incident intensity of \(1\text{
- mW/cm}^2\) at \(\lambda =
- 940\text{ nm}\). The lens has a diameter of \(d = 0.3\text{ cm}\) or an area of
- \(0.071\text{ cm}^2\). So, an
- incident intensity of \(1\text{
- mW/cm}^2\) corresponds to a total power of \(71\ \mu \text{W}\) of optical
- power hitting the photodiode. The sensitivity at \(\lambda= 940\text{ nm}\) is
- then: \[S_{940} = \frac{I_{SC}}{71\
- \mu\text{W}} = 0.14\text{ A/W}\] Note that this means the quantum efficiency at 940 nm is
- only 0.18 (not so great). The sensitivity at other wavelengths \(\lambda\) is given on the data
- sheet in terms of the peak sensitivity \(S_{940}\) at \(940\text{ nm}\) times a correction
- factor called the relative spectral response (RSR) or the
- relative spectral sensitivity (RSS): \[S_{\lambda} = S_{940}\
- \text{RSR}(\lambda)\] Figure 4 shows the RSR (aka RSS)
- from the PD204-6C data sheet. You can see the maximum
- sensitivity is around 940 nm. where \(P_o\) is the optical power (number of photons per second times the photon energy) and \(S_{\lambda}\) is the wavelength dependent sensitivity of the photodiode (in units of \(\text{A/W}\)). A photon of wavelength \(\lambda\) carries energy \(E_\text{photon}=hc/\lambda\), so the photon rate is \[R_\text{photon}=\frac{P_o}{E_\text{photon}} = \frac{P_o\lambda}{hc}\] Let’s consider what \(S_{\lambda}\) would be for an ideal photodiode that converts every photon into an electron/hole pair. The rate of photons per second will then directly correspond to that many electrons per second worth of current, so the current is \(I=eR=P\ (\lambda e)/(hc)\). However, in a real photodiode, not every photon gets absorbed and generates an electron; the probability that a photon is absorbed (and generates an electron/hole pair) depends on the wavelength \(\lambda\) and the quantum efficiency of the photodiode \(q_{\lambda}\) (which is a \(\lambda\) dependant number between 0 and 1). \[S_\lambda\le q_{\lambda}\frac{\lambda e}{hc}\] At \(\lambda\) = 940 nm (red), the ideal sensitivity (i.e. \(q_{\lambda}= 1\)) would be \(0.76\text{ A/W}\) (about \(3/4\)), a fairly easy number to remember. Photodiode manufacturers typically will provide the actual \(S_{\lambda}\) in the data sheet. Because the PD204-6C photodiode comes with a curved lens, the data sheet specifies the short circuit current \(I_{SC} = 10\ \mu \text{A}\) at an incident intensity of \(1\text{ mW/cm}^2\) at \(\lambda = 940\text{ nm}\). The lens has a diameter of \(d = 0.3\text{ cm}\) or an area of \(0.071\text{ cm}^2\). So, an incident intensity of \(1\text{ mW/cm}^2\) corresponds to a total power of \(71\ \mu \text{W}\) of optical power hitting the photodiode. The sensitivity at \(\lambda= 940\text{ nm}\) is then: \[S_{940} = \frac{I_{SC}}{71\ \mu\text{W}} = 0.14\text{ A/W}\] Note that this means the quantum efficiency at 940 nm is only 0.18 (not so great). The sensitivity at other wavelengths \(\lambda\) is given on the data sheet in terms of the peak sensitivity \(S_{940}\) at \(940\text{ nm}\) times a correction factor called the relative spectral response (RSR) or the relative spectral sensitivity (RSS): \[S_{\lambda} = S_{940}\ \text{RSR}(\lambda)\] Figure 4 shows the RSR (aka RSS) from the PD204-6C data sheet. You can see the maximum sensitivity is around 940 nm. The photometer you will build this week will mostly be
- measuring white light (since this will be the kind of light
- most easily accessible). We can approximate white light as
- being \(\lambda = 555\text{
- nm}\). Use Figure 4 and \(S_{940} = 0.14\text{ A/W}\) to
- estimate the sensitivity \(S_\lambda\) at this
- wavelength. Estimate the current produced at this wavelength when
- the optical power is \(P_o = 71\
- \mu\text{W}\). The photometer you will build this week will mostly be measuring white light (since this will be the kind of light most easily accessible). We can approximate white light as being \(\lambda = 555\text{ nm}\). Use Figure 4 and \(S_{940} = 0.14\text{ A/W}\) to estimate the sensitivity \(S_\lambda\) at this wavelength. Estimate the current produced at this wavelength when the optical power is \(P_o = 71\ \mu\text{W}\). All the op-amp circuits you have built so far take voltages
- as inputs. Since the input and output are both voltages, the
- gain (output/input) is unitless. Now we will look at a
- different kind of op-amp circuit that takes current as an
- input: a transimpedance amplifier. In this case, the gain is
- voltage/current, so it has units of Ohms (resistance). All the op-amp circuits you have built so far take voltages as inputs. Since the input and output are both voltages, the gain (output/input) is unitless. Now we will look at a different kind of op-amp circuit that takes current as an input: a transimpedance amplifier. In this case, the gain is voltage/current, so it has units of Ohms (resistance). The figure above shows a transimpedance amplifier circuit
- using an op-amp. We can analyze this circuit by applying the
- golden rules. First, consider the input current \(I_\text{in}\) delivered from the
- current source; when it reaches the first node, where will the
- current go? The two paths are into the inverting input \(V_-\) and through \(R_F\). The current golden rule
- tells us that no current should flow into the inverting input,
- so all the current will go through \(R_F\). Therefore the voltage will
- drop from \(V_-\) to \(V_\text{out}\) by an amount \(I_\text{in}R_F\): \[V_\text{out} = V_- -
- I_\text{in}R_F\] We can then apply the voltage golden rule that says that,
- when there is negative feedback, \(V_-=V_+\), and since \(V_+\) is ground, \(V_-\) is a virtual ground. We can
- plug in \(V_-=0\) to the
- equation above to get \[V_\text{out} = -
- I_\text{in}R_F\] The gain can then be calculated by the output divided by the
- input, in this case it is \[G =
- \frac{V_\text{out}}{I_\text{in}}=-R_F\] The figure above shows a transimpedance amplifier circuit using an op-amp. We can analyze this circuit by applying the golden rules. First, consider the input current \(I_\text{in}\) delivered from the current source; when it reaches the first node, where will the current go? The two paths are into the inverting input \(V_-\) and through \(R_F\). The current golden rule tells us that no current should flow into the inverting input, so all the current will go through \(R_F\). Therefore the voltage will drop from \(V_-\) to \(V_\text{out}\) by an amount \(I_\text{in}R_F\): \[V_\text{out} = V_- - I_\text{in}R_F\] We can then apply the voltage golden rule that says that, when there is negative feedback, \(V_-=V_+\), and since \(V_+\) is ground, \(V_-\) is a virtual ground. We can plug in \(V_-=0\) to the equation above to get \[V_\text{out} = - I_\text{in}R_F\] The gain can then be calculated by the output divided by the input, in this case it is \[G = \frac{V_\text{out}}{I_\text{in}}=-R_F\] This gain has the units of impedance i.e., Ohms, and it is
- often called a transimpedance gain. The current-to-voltage
- amplifier is also called a transimpedance amplifier. This type
- of amplifier is very common in research labs when transducer
- based measurements result in a predictable amount of current,
- such as photodiodes, photo multiplier tubes, ion detectors,
- etc. What are the voltages at \(V_+\) and \(V_-\)? In LTspice, make the transimpedance amplifier as seen in 5. You can create a current source by
- opening the components menu and searching “current” (the symbol
- is a circle with an arrow in it). Don’t forget to power the
- op-amp with \(\pm 15\text{
- V}\). Test 3 different combinations of \(R_F\) and \(I_\text{in}\) and record the
- resulting \(V_\text{out}\) for
- each. Does this circuit obey the transimpedance gain equation we
- constructed above? This week, you will build a photometer that uses a
- photodiode as a transducer to turn photon energy into current.
- You will design a transimpedance amplifier to convert small
- currents into measurable voltages. The current \(I_\text{in}\) flows through the
- reverse-biased photodiode when it is illuminated.
- This gain has the units of impedance i.e., Ohms, and it is often called a transimpedance gain. The current-to-voltage amplifier is also called a transimpedance amplifier. This type of amplifier is very common in research labs when transducer based measurements result in a predictable amount of current, such as photodiodes, photo multiplier tubes, ion detectors, etc. What are the voltages at \(V_+\) and \(V_-\)? In LTspice, make the transimpedance amplifier as seen in 5. You can create a current source by opening the components menu and searching “current” (the symbol is a circle with an arrow in it). Don’t forget to power the op-amp with \(\pm 15\text{ V}\). Test 3 different combinations of \(R_F\) and \(I_\text{in}\) and record the resulting \(V_\text{out}\) for each. Does this circuit obey the transimpedance gain equation we constructed above? This week, you will build a photometer that uses a photodiode as a transducer to turn photon energy into current. You will design a transimpedance amplifier to convert small currents into measurable voltages. The current \(I_\text{in}\) flows through the reverse-biased photodiode when it is illuminated. Since the photodiode is being pulled down by \(-15\text{ V}\), the current will
- flow from the virtual ground to \(-15\text{ V}\) when it is
- illuminated. This means that the input current is negative
- based on the analysis we did above. Choose a value for the feedback resistor \(R_F\) so that an incident
- white-light \((\lambda = 555\text{
- nm})\) with optical power of \(P = 71\ \mu\text{W}\) produces an
- output of \(10\text{ V}\). When there is no light, there is a small amount of “dark
- current” that flows through the photodiode. The photodiode you
- will use this week has a dark current of \(10\text{ nA}\). Predict the output
- voltage due to the dark current using the \(R_F\) you chose above. Since the photodiode is being pulled down by \(-15\text{ V}\), the current will flow from the virtual ground to \(-15\text{ V}\) when it is illuminated. This means that the input current is negative based on the analysis we did above. Choose a value for the feedback resistor \(R_F\) so that an incident white-light \((\lambda = 555\text{ nm})\) with optical power of \(P = 71\ \mu\text{W}\) produces an output of \(10\text{ V}\). When there is no light, there is a small amount of “dark current” that flows through the photodiode. The photodiode you will use this week has a dark current of \(10\text{ nA}\). Predict the output voltage due to the dark current using the \(R_F\) you chose above. Often, a small feedback capacitor \(C_F\) is used to suppress
- spontaneous, high-frequency oscillations. The transimpedance
- gain of the amplifier at any particular frequency is \((–Z_F)\), where \(Z_F\) is the effective impedance
- of the parallel \(R_FC_F\)
- circuit. The gain rolls off at high frequencies with a
- bandwidth of \(f_B = 1/(2\pi
- R_FC_F)\), just like any low-pass filter. The bandwidth
- will suffer if \(C_F\) is too
- large. Often, a small feedback capacitor \(C_F\) is used to suppress spontaneous, high-frequency oscillations. The transimpedance gain of the amplifier at any particular frequency is \((–Z_F)\), where \(Z_F\) is the effective impedance of the parallel \(R_FC_F\) circuit. The gain rolls off at high frequencies with a bandwidth of \(f_B = 1/(2\pi R_FC_F)\), just like any low-pass filter. The bandwidth will suffer if \(C_F\) is too large. What is \(Z_F\) at
- \(500\text{ Hz}\) if \(C_F = 10\text{ pF}\)? Can you
- ignore the capacitor at low frequencies? What is the bandwidth \(f_B\) for \(C_F = 10\text{ pF}\)? What is \(Z_F\) at \(500\text{ Hz}\) if \(C_F = 10\text{ pF}\)? Can you ignore the capacitor at low frequencies? What is the bandwidth \(f_B\) for \(C_F = 10\text{ pF}\)? A basic optical communication link is composed of two
- circuits: a circuit which emits light with intensity that
- scales as a function of input voltage, and a circuit which can
- measure the light and convert it back into voltage. This allows
- two disconnected circuits to communicate with each other. This
- has many applications from sending signals across large
- distances to protecting sensitive circuits from power
- circuits. The circuit below uses an AC voltage source \(V_\text{in}\) to produce a light
- signal from the LED. The transimpedance amplifier you designed
- in the previous section can be used to measure and “pickup” the
- signal sent by this circuit. A basic optical communication link is composed of two circuits: a circuit which emits light with intensity that scales as a function of input voltage, and a circuit which can measure the light and convert it back into voltage. This allows two disconnected circuits to communicate with each other. This has many applications from sending signals across large distances to protecting sensitive circuits from power circuits. The circuit below uses an AC voltage source \(V_\text{in}\) to produce a light signal from the LED. The transimpedance amplifier you designed in the previous section can be used to measure and “pickup” the signal sent by this circuit. The data sheet lists the LED forward voltage drop at 20 mA
- to be 1.9 V (instead of 0.6 V for silicon diodes). Please review the lab activities so that you’re better
- prepared when you arrive to your lab section. You can find more on these circuits from these recommended
- sources: The data sheet lists the LED forward voltage drop at 20 mA to be 1.9 V (instead of 0.6 V for silicon diodes). Please review the lab activities so that you’re better prepared when you arrive to your lab section. You can find more on these circuits from these recommended sources: Steck
- Sections 2.2.1, 3.1, 3.3, 3.4, 3.6, Problem 7.5 (pages
- 246-246) Fischer-Cripps Chapter 4, especially Sections
- 4.18–4.19 Horowitz and Hill 2nd Ed., Sections
- 1.25–1.27, 15.02, and page 184 Steck Sections 2.2.1, 3.1, 3.3, 3.4, 3.6, Problem 7.5 (pages 246-246) Fischer-Cripps Chapter 4, especially Sections 4.18–4.19 Horowitz and Hill 2nd Ed., Sections 1.25–1.27, 15.02, and page 184 Build the circuit in Figure 9 using the silicon diode 1N4002 and
- draw the diagram in your lab notebook. Measure the \(33\ \Omega\) resistor before
- placing it in the circuit and record the measured
- value. Measure the current \(I\) and the voltage across the
- diode \((V_\text{out})\) for
- different values of \(V_\text{in}\) from \(-3\text{ V}\) to \(+3\text{ V}\). You can use the DMM
- to measure the voltage across the diode. To maximize accuracy,
- you would use another DMM to measure current. But reading the
- current directly from the power supply is fine. Be sure to take
- many data points (at least 10) to map out the characteristic
- curve of the diode, with a few extra points around \(V_\text{in}\) of 0.6–0.9 V. How
- does the result compare with your predictions from prelab
- question 3.1.3? How does your plotted data
- compare with Figure 1? Specifically consider the points at \(V_\text{in}\) = \(+0.5\text{ V}\), \(+0.8\text{ V}\), and \(+2.0\text{ V}\). What is the power
- dissipated in the diode and in the resistor for these values?
- Remember \(P = I\Delta V\) and
- \(I\) is the same for both
- components, but \(\Delta V\)
- is not. Now, change \(V_\text{in}\) from the DC voltage
- source (power supply) to the AC voltage source (function
- generator) and input a \(1\text{
- kHz}\) sine wave with a \(3\text{ V}\) amplitude (\(6\text{ V}\) peak-to-peak) Record
- the resulting \(V_\text{in}\)
- and \(V_\text{out}\) waveforms
- and compare both of them with your prediction in prelab
- question 3.1.3. There should be some discrepancy between your prediction
- and your measurement. Discuss with an instructor all the things
- you see that differs from your prediction. Record a brief
- summary of the discussion explaining the difference in measured
- and predicted behavior. Build the circuit in Figure 9 using the silicon diode 1N4002 and draw the diagram in your lab notebook. Measure the \(33\ \Omega\) resistor before placing it in the circuit and record the measured value. Measure the current \(I\) and the voltage across the diode \((V_\text{out})\) for different values of \(V_\text{in}\) from \(-3\text{ V}\) to \(+3\text{ V}\). You can use the DMM to measure the voltage across the diode. To maximize accuracy, you would use another DMM to measure current. But reading the current directly from the power supply is fine. Be sure to take many data points (at least 10) to map out the characteristic curve of the diode, with a few extra points around \(V_\text{in}\) of 0.6–0.9 V. How does the result compare with your predictions from prelab question 3.1.3? How does your plotted data compare with Figure 1? Specifically consider the points at \(V_\text{in}\) = \(+0.5\text{ V}\), \(+0.8\text{ V}\), and \(+2.0\text{ V}\). What is the power dissipated in the diode and in the resistor for these values? Remember \(P = I\Delta V\) and \(I\) is the same for both components, but \(\Delta V\) is not. Now, change \(V_\text{in}\) from the DC voltage source (power supply) to the AC voltage source (function generator) and input a \(1\text{ kHz}\) sine wave with a \(3\text{ V}\) amplitude (\(6\text{ V}\) peak-to-peak) Record the resulting \(V_\text{in}\) and \(V_\text{out}\) waveforms and compare both of them with your prediction in prelab question 3.1.3. There should be some discrepancy between your prediction and your measurement. Discuss with an instructor all the things you see that differs from your prediction. Record a brief summary of the discussion explaining the difference in measured and predicted behavior. The transimpedance amplifier has a lot of different
- components that could be the source of issues, so we want to
- build the circuit in a systematic way that allows us to
- identify the source of any issues along the way. The transimpedance amplifier has a lot of different components that could be the source of issues, so we want to build the circuit in a systematic way that allows us to identify the source of any issues along the way. Use your op-amp test circuit to test your op-amp. You may have noticed the similarities between the
- inverting amplifier and the transimpedance amplifier. It is
- reasonable to think of the \(V_\text{in}\) and \(R\) of the inverting amplifier as
- a current source for the transimpedance amplifier. Design an
- inverting amplifier (refer to your lab notebook if you need a
- refresher; you built this circuit last week) using the \(R_F\) you calculated in 3.4.3 and a value of \(R\) such that a \(V_\text{in}=1\text{ V}\)
- corresponds to an \(I_\text{in}=1\
- \mu\text{A}\). You may have noticed the similarities between the inverting amplifier and the transimpedance amplifier. It is reasonable to think of the \(V_\text{in}\) and \(R\) of the inverting amplifier as a current source for the transimpedance amplifier. Design an inverting amplifier (refer to your lab notebook if you need a refresher; you built this circuit last week) using the \(R_F\) you calculated in Question 3.4.3 and a value of \(R\) such that a \(V_\text{in}=1\text{ V}\) corresponds to an \(I_\text{in}=1\ \mu\text{A}\). Measure the components and label the diagram with the
- measured values. Predict the voltage gain of the inverting amplifier.
- Also predict the transimpedance gain, assuming that \(V_\text{in}\) and \(R\) form a current source (don’t
- forget to include appropriate units). Measure the DC voltage gain at an appropriate frequency
- and compare to your prediction. If these do not agree resolve
- any issues. Add a \(10\text{ pF}\)
- capacitor in parallel with \(R_F\) (measure and record it
- first). Make a new diagram in your lab notebook corresponding
- to the updated circuit. Did this change your DC voltage gain? Should it
- have? Predict the 3 dB frequency of this amplifier.
- Hint: Look at your prelab answers. This will be the
- \(R_FC_F\) time constant from
- question 3.4.5; in this circuit the time
- constant will be determined by the feedback resistor and
- capacitor (not the input resistor). Do you have the means to be
- able to measure this 3 dB frequency? Why not? (chat with an
- instructor if you are not sure) Measure the components and label the diagram with the measured values. Predict the voltage gain of the inverting amplifier. Also predict the transimpedance gain, assuming that \(V_\text{in}\) and \(R\) form a current source (don’t forget to include appropriate units). Measure the DC voltage gain at an appropriate frequency and compare to your prediction. If these do not agree resolve any issues. Add a \(10\text{ pF}\) capacitor in parallel with \(R_F\) (measure and record it first). Make a new diagram in your lab notebook corresponding to the updated circuit. Did this change your DC voltage gain? Should it have? Predict the 3 dB frequency of this amplifier. Hint: Look at your prelab answers. This will be the \(R_FC_F\) time constant from Question 3.4.5; in this circuit the time constant will be determined by the feedback resistor and capacitor (not the input resistor). Do you have the means to be able to measure this 3 dB frequency? Why not? (chat with an instructor if you are not sure) Reconfigure the amplifier such that the input is a
- current from a photodiode (PD204-6C). Refer to 7 if you need help
- remembering the correct orientation of the photodiode. Draw the
- updated circuit diagram in your lab notebook. For the \(-15\text{ V}\), you can connect
- the anode to the same voltage source powering the negative
- power pin of the op-amp. Reconfigure the amplifier such that the input is a current from a photodiode (PD204-6C). Refer to 7 if you need help remembering the correct orientation of the photodiode. Draw the updated circuit diagram in your lab notebook. For the \(-15\text{ V}\), you can connect the anode to the same voltage source powering the negative power pin of the op-amp. The cathode and anode of the photodiode can be
- determined using the DMM. The DMM will read a forward voltage when you connect the
- bar side (cathode) to the (-) terminal of the DMM such that the
- diode is forward biased and current can flow. Consult an instructor if you are unsure how to make this
- measurement. The cathode and anode of the photodiode can be determined using the DMM. The DMM will read a forward voltage when you connect the bar side (cathode) to the (-) terminal of the DMM such that the diode is forward biased and current can flow. Consult an instructor if you are unsure how to make this measurement. Verify that the voltage output changes as a function of
- the amount of incident light on the photodiode, for instance,
- by putting your hand over the photodiode to shade it from the
- room lights or shining your cell phone light on it. Look at the
- output voltage on an oscilloscope. Put the scope in AC coupling mode so that you can see
- the waveform that sits on the DC offset. What is the period of
- the waveform produced? What is it you think you’re seeing?
- Discuss your findings with an instructor and summarize your
- discussion in your lab notebook. Verify that the voltage output changes as a function of the amount of incident light on the photodiode, for instance, by putting your hand over the photodiode to shade it from the room lights or shining your cell phone light on it. Look at the output voltage on an oscilloscope. Put the scope in AC coupling mode so that you can see the waveform that sits on the DC offset. What is the period of the waveform produced? What is it you think you’re seeing? Discuss your findings with an instructor and summarize your discussion in your lab notebook. Set up the function generator to produce \(5\text{ Hz}\) square waves with
- the low voltage level \(0\text{
- V}\) and the high voltage of \(8\text{ V}\). You can accomplish
- this by using the DC offset setting of the function generator.
- Make sure the oscilloscope shows a square wave that goes from
- \(0\text{ V}\) to \(8\text{ V}\). Set up a light emitting diode type HLMP-C625 as the
- transmitter on a separate small circuit board according to the
- schematic in Figure 8. Be sure to
- protect the LED with a series resistance that prevents the
- forward current exceeding \(20\text{
- mA}\). Hint: You calculated the required
- resistance in the prelab. Also, the LEDs have a nominal
- breakdown voltage of \(5\text{
- V}\), which, if exceeded, can damage the LED. Therefore,
- to prevent this from happening, connect a regular diode in
- parallel with the LED but with opposite polarity. This will
- protect the LED from a large negative voltage. Connect this to the oscilloscope and the LED circuit and
- confirm that you see the LED flashing 5 times per second before
- moving on. Set up the function generator to produce \(5\text{ Hz}\) square waves with the low voltage level \(0\text{ V}\) and the high voltage of \(8\text{ V}\). You can accomplish this by using the DC offset setting of the function generator. Make sure the oscilloscope shows a square wave that goes from \(0\text{ V}\) to \(8\text{ V}\). Set up a light emitting diode type HLMP-C625 as the transmitter on a separate small circuit board according to the schematic in Figure 8. Be sure to protect the LED with a series resistance that prevents the forward current exceeding \(20\text{ mA}\). Hint: You calculated the required resistance in the prelab. Also, the LEDs have a nominal breakdown voltage of \(5\text{ V}\), which, if exceeded, can damage the LED. Therefore, to prevent this from happening, connect a regular diode in parallel with the LED but with opposite polarity. This will protect the LED from a large negative voltage. Connect this to the oscilloscope and the LED circuit and confirm that you see the LED flashing 5 times per second before moving on. Configure the LED and photodiode so the tops of them face
- each other. The LED is directed forward so make sure to orient
- both the LED and photodiode so they are pointing at each other
- to maximize the amount of light detected. You can bend the wire
- leads to get both devices pointed horizontally. You can check
- the alignment by using a piece of white paper to see if the red
- illumination is centered on the photodiode. Observe the input driving signal and the output of the
- receiver on the scope using DC coupling for both signals. Make
- sure the received signal is due to the red LED, and not from an
- electrical connection. How did you determine that it was
- working? You may want to increase the frequency to about \(100\text{ Hz}\) to allow the scope
- to update faster. You can also try switching to AC coupling for
- the receiver to see if it is easier to see the signal. Determine the frequency limitations of your photometer.
- We did this in previous labs by measuring the frequency
- dependence of sine waves to find where the gain dropped by 3
- dB. This method is only correct for sine waves. In lab 3, you
- used a different method for square waves by measuring the
- RC-time. The capacitor charges or discharges exponentially with
- a time constant of \(RC\).
- Measure the time it takes for the signal to rise from the base
- level (room lights) to \((1–1/e)\) of the maximum value or
- to fall from the maximum value to \(1/e\) of the difference between
- the maximum value and the base level. This gives the time
- constant \(RC\). As the 3 dB
- frequency is \(f_B =1/2\pi
- RC\), you can determine \(f_B\). Does this measurement agree
- with your model predictions? Review your lab 3 prelab if you
- don’t remember doing this analysis 3 weeks ago. Transfer your LED circuit onto a small breadboard so
- that you can move the LED relative to the photodiode. Measure the output of the transimpedance amplifier (in
- Volts) of the transmitted light versus distance from a few cm
- to about 0.5 meter. How does the background light from the room
- affect the signal? Explain how you made this measurement.
- Estimate the the photodiode sensitivity \(S_{\lambda}\) at the wavelength
- 625 nm of light emitted by the LED. Plot the power in Watts
- hitting the photodiode as a function of distance. Configure the LED and photodiode so the tops of them face each other. The LED is directed forward so make sure to orient both the LED and photodiode so they are pointing at each other to maximize the amount of light detected. You can bend the wire leads to get both devices pointed horizontally. You can check the alignment by using a piece of white paper to see if the red illumination is centered on the photodiode. Observe the input driving signal and the output of the receiver on the scope using DC coupling for both signals. Make sure the received signal is due to the red LED, and not from an electrical connection. How did you determine that it was working? You may want to increase the frequency to about \(100\text{ Hz}\) to allow the scope to update faster. You can also try switching to AC coupling for the receiver to see if it is easier to see the signal. Determine the frequency limitations of your photometer. We did this in previous labs by measuring the frequency dependence of sine waves to find where the gain dropped by 3 dB. This method is only correct for sine waves. In lab 3, you used a different method for square waves by measuring the RC-time. The capacitor charges or discharges exponentially with a time constant of \(RC\). Measure the time it takes for the signal to rise from the base level (room lights) to \((1–1/e)\) of the maximum value or to fall from the maximum value to \(1/e\) of the difference between the maximum value and the base level. This gives the time constant \(RC\). As the 3 dB frequency is \(f_B =1/2\pi RC\), you can determine \(f_B\). Does this measurement agree with your model predictions? Review your lab 3 prelab if you don’t remember doing this analysis 3 weeks ago. Transfer your LED circuit onto a small breadboard so that you can move the LED relative to the photodiode. Measure the output of the transimpedance amplifier (in Volts) of the transmitted light versus distance from a few cm to about 0.5 meter. How does the background light from the room affect the signal? Explain how you made this measurement. Estimate the the photodiode sensitivity \(S_{\lambda}\) at the wavelength 625 nm of light emitted by the LED. Plot the power in Watts hitting the photodiode as a function of distance. The sun has a power output (radiant flux) of \(P = 3.85\cdot 10^{26}\text{ W}\)
- (Watts). Assuming a transparent atmosphere and a \(1\text{ m}\) by \(2\text{ m}\) solar panel
- perpendicular to the sun that absorbs 100% of the light, how
- much power is received? Consider that the entire \(3.85\cdot 10^{26}\text{ W}\) is
- distributed evenly on a hypothetical sphere with radius \(1.50\cdot 10^{11}\text{ m}\)
- (distance from sun to Earth). Since we know the area of a
- sphere is \(4\pi r^2\), we can
- calculate the irradiance or intensity (power per area) as \(N = P/4\pi r^2 = 1360\text{
- W/m}^2\). Since the solar panel has an area of \(2\text{ m}^2\), the power
- delivered to the solar panel is \(2720\text{ W}\). There are additional concepts and units that are made
- necessary by the fact that the eye is not uniformly sensitive
- to all wavelengths and we are often interested in how humans
- perceive things. The luminous flux \(F\) is measured in units of lumens
- (lm) and is basically the same as the power (measured in watts)
- except that the spectrum of emitted light is weighted by the
- eye’s response. The conversion from radiant flux (power) in
- watts to luminous flux in lumens is given by: \[F = y(\lambda)\ P\cdot
- 683\frac{\text{lm}}{\text{W}}\] The dimensionless quantity \(y(\lambda)\) is the photopic
- standard luminosity function and is shown in Figure 10 and tabulated in the Datasheets section
- of Canvas. At \(\lambda = 555
- \text{nm}\), where the eye is most sensitive, \(y(\lambda) = 1\). Therefore, two
- sources with the same luminous flux will have the same
- subjective brightness to a human observer (even though the
- outputted power may be different). This kind of color corrected
- unit is helpful if you want to design a control panel with lots
- of colored lights, and you want them all to have the same
- perceived brightness. We may also be interested in the luminous
- flux per unit area (similar to intensity). This is measured in
- units of lux, where \(1\text{ lux} =
- 1\text{ lm/m}^2\). The sun has a power output (radiant flux) of \(P = 3.85\cdot 10^{26}\text{ W}\) (Watts). Assuming a transparent atmosphere and a \(1\text{ m}\) by \(2\text{ m}\) solar panel perpendicular to the sun that absorbs 100% of the light, how much power is received? Consider that the entire \(3.85\cdot 10^{26}\text{ W}\) is distributed evenly on a hypothetical sphere with radius \(1.50\cdot 10^{11}\text{ m}\) (distance from sun to Earth). Since we know the area of a sphere is \(4\pi r^2\), we can calculate the irradiance or intensity (power per area) as \(N = P/4\pi r^2 = 1360\text{ W/m}^2\). Since the solar panel has an area of \(2\text{ m}^2\), the power delivered to the solar panel is \(2720\text{ W}\). There are additional concepts and units that are made necessary by the fact that the eye is not uniformly sensitive to all wavelengths and we are often interested in how humans perceive things. The luminous flux \(F\) is measured in units of lumens (lm) and is basically the same as the power (measured in watts) except that the spectrum of emitted light is weighted by the eye’s response. The conversion from radiant flux (power) in watts to luminous flux in lumens is given by: \[F = y(\lambda)\ P\cdot 683\frac{\text{lm}}{\text{W}}\] The dimensionless quantity \(y(\lambda)\) is the photopic standard luminosity function and is shown in Figure 10 and tabulated in the Datasheets section of Canvas. At \(\lambda = 555 \text{nm}\), where the eye is most sensitive, \(y(\lambda) = 1\). Therefore, two sources with the same luminous flux will have the same subjective brightness to a human observer (even though the outputted power may be different). This kind of color corrected unit is helpful if you want to design a control panel with lots of colored lights, and you want them all to have the same perceived brightness. We may also be interested in the luminous flux per unit area (similar to intensity). This is measured in units of lux, where \(1\text{ lux} = 1\text{ lm/m}^2\). Transistors are 3 terminal devices that control the flow of
- current as a function of small electrical signals (voltage or
- current). The vacuum tube predecessor for transistors were
- called triodes.
- Transistors are incredibly useful devices that are involved in
- almost every electronic technology made today. For example, the
- op-amps you have been using the past few weeks are made of
- several transistors, and whatever device you’re using to read
- this has billions of transistors in it. There are two general categories of transistors: bipolar and
- field-effect. Bipolar transistors control the flow of current
- as a function of small currents, and field-effect transistors
- control the flow of current as a function of applied voltage.
- In this lab, you will learn how to model, analyze, and simulate
- simple circuits containing both kinds of transistors. The physics of transistors is very interesting, and we could
- easily spend an entire semester learning about them. In this
- class, we will focus on how they are used at a basic level. Transistors are 3 terminal devices that control the flow of current as a function of small electrical signals (voltage or current). The vacuum tube predecessor for transistors were called triodes. Transistors are incredibly useful devices that are involved in almost every electronic technology made today. For example, the op-amps you have been using the past few weeks are made of several transistors, and whatever device you’re using to read this has billions of transistors in it. There are two general categories of transistors: bipolar and field-effect. Bipolar transistors control the flow of current as a function of small currents, and field-effect transistors control the flow of current as a function of applied voltage. In this lab, you will learn how to model, analyze, and simulate simple circuits containing both kinds of transistors. The physics of transistors is very interesting, and we could easily spend an entire semester learning about them. In this class, we will focus on how they are used at a basic level. The kind of bipolar transistor we will use this week and
- next are bipolar junction transistors (BJT). BJTs have two
- PN-junctions; this can be done by sandwiching a p-type region
- with two n-type regions (NPN) or by sandwiching a n-type region
- with two p-type regions (PNP). The kind of bipolar transistor we will use this week and next are bipolar junction transistors (BJT). BJTs have two PN-junctions; this can be done by sandwiching a p-type region with two n-type regions (NPN) or by sandwiching a n-type region with two p-type regions (PNP). The symbols for NPNs and PNPs are shown above. The BJT is
- similar to two diodes pointing in opposite directions; however,
- the doping of the emitter and the collector are not
- symmetrical. This
- video does a nice job of describing this. The arrow in the diagram (as seen in Figure 1) for each the NPN and the PNP describes
- the direction current will flow and which junction you should
- think of as “diode-like.” Notice that the arrow is between the
- emitter and the base for both kinds. We will consider the NPN in the following
- discussion: The “control current” for a BJT is the current that goes
- into the base. The base current \(I_B\) will cause a much larger
- current to flow through into the collector \(I_C\). This is typically
- represented by a current gain \(h_{FE}\) (sometimes written \(\beta\)): The symbols for NPNs and PNPs are shown above. The BJT is similar to two diodes pointing in opposite directions; however, the doping of the emitter and the collector are not symmetrical. This video does a nice job of describing this. The arrow in the diagram (as seen in Figure 1) for each the NPN and the PNP describes the direction current will flow and which junction you should think of as “diode-like.” Notice that the arrow is between the emitter and the base for both kinds. We will consider the NPN in the following discussion: The “control current” for a BJT is the current that goes into the base. The base current \(I_B\) will cause a much larger current to flow through into the collector \(I_C\). This is typically represented by a current gain \(h_{FE}\) (sometimes written \(\beta\)): \[I_C = h_{FE} I_B\] With current flowing into the base and collector, all of
- this current will have to flow out of the emitter, such
- that \[I_E = I_C + I_B =
- \bigg(\frac{1}{h_{FE}}+1\bigg)I_C\] In many use cases, the current gain is quite large, such
- that it is safe to assume With current flowing into the base and collector, all of this current will have to flow out of the emitter, such that \[I_E = I_C + I_B = \bigg(\frac{1}{h_{FE}}+1\bigg)I_C\] In many use cases, the current gain is quite large, such that it is safe to assume \[I_E\approx I_C\] There are a lot of great resources for learning more about
- how BJTs work. Here is a
- video discussing more of the physics. The current gain for a BJT depends on a lot of factors. Look
- for the datasheet
- for the 2N3904 BJT and find the section for current gain under
- “On Characteristics” in the tables. Notice that it gives
- current gains for different conditions. There are a lot of great resources for learning more about how BJTs work. Here is a video discussing more of the physics. The current gain for a BJT depends on a lot of factors. Look for the datasheet for the 2N3904 BJT and find the section for current gain under “On Characteristics” in the tables. Notice that it gives current gains for different conditions. What parameters does the current gain depend
- on? What is the maximum possible current gain for this
- transistor? On the first page, there are some “Absolute Maximum
- Ratings.” The “Collector Current - Continuous” represents the
- maximum current that the transistor can have continuously
- running through it. What is this value for the 2N3904? What parameters does the current gain depend on? What is the maximum possible current gain for this transistor? On the first page, there are some “Absolute Maximum Ratings.” The “Collector Current - Continuous” represents the maximum current that the transistor can have continuously running through it. What is this value for the 2N3904? In order to push current into the base of an NPN, it must be
- biased with voltages. The two important voltages to consider
- are (1) the voltage measured at the base relative to the
- emitter (base-emitter voltage) \(V_{BE}\) and (2) the voltage
- measured at the collector relative to the emitter
- (collector-emitter voltage) voltage \(V_{CE}\). In order to push current into the base of an NPN, it must be biased with voltages. The two important voltages to consider are (1) the voltage measured at the base relative to the emitter (base-emitter voltage) \(V_{BE}\) and (2) the voltage measured at the collector relative to the emitter (collector-emitter voltage) voltage \(V_{CE}\). Typically the \(V_{CE}\) is
- some power source that is powering your circuit, and \(V_{BE}\) could be some signal that
- controls the collector current. However, due to the diode like
- nature of the base-emitter junction, in order to get current to
- flow into the base, this junction needs to be forward biased.
- This means that \(I_B>0\)
- only if \(V_{BE} > V_{th}\)
- where \(V_{th}\) is a
- threshold voltage. For silicon BJTs, \(V_{th}\approx 0.6\text{ V}\) (just
- like for silicon diodes). Typically the \(V_{CE}\) is some power source that is powering your circuit, and \(V_{BE}\) could be some signal that controls the collector current. However, due to the diode like nature of the base-emitter junction, in order to get current to flow into the base, this junction needs to be forward biased. This means that \(I_B>0\) only if \(V_{BE} > V_{th}\) where \(V_{th}\) is a threshold voltage. For silicon BJTs, \(V_{th}\approx 0.6\text{ V}\) (just like for silicon diodes). Consider the following circuit When \(V_\text{in}=0\text{
- V}\), clearly, there won’t be a voltage across \(R_B\) and \(I_B\) will be zero. However, if
- \(V_\text{in} > V_{th}\),
- it should be expected that current flows, so \(V_{BE}=V_{th}\). For the following, assume \(V_\text{in} > V_{th}\): When \(V_\text{in}=0\text{ V}\), clearly, there won’t be a voltage across \(R_B\) and \(I_B\) will be zero. However, if \(V_\text{in} > V_{th}\), it should be expected that current flows, so \(V_{BE}=V_{th}\). For the following, assume \(V_\text{in} > V_{th}\): What is the voltage at the base relative to
- ground? What is the voltage across the resistor \(R_B\)? Consider the voltage at one
- side of the resistor \((V_\text{in})\) and the other side
- of the resistor (the voltage at the base). Use Ohm’s law to determine the current through \(R_B\). This will be the current
- going into the base. If the current gain is \(h_{FE}\), write \(I_C\) with respect to \(V_\text{in}\), \(V_{th}\), \(R_B\), and \(h_{FE}\)? Since \(I_C\) flows
- through \(R_C\), what will be
- the voltage drop across \(R_C\)? Considering this drop in
- voltage, what will the voltage be at the collector relative to
- ground? Write \(V_{CE}\) as a
- function of \(R_C\), \(R_B\), \(V_\text{in}\), \(V_{th}\), and \(V_\text{supply}\). What is the voltage at the base relative to ground? What is the voltage across the resistor \(R_B\)? Consider the voltage at one side of the resistor \((V_\text{in})\) and the other side of the resistor (the voltage at the base). Use Ohm’s law to determine the current through \(R_B\). This will be the current going into the base. If the current gain is \(h_{FE}\), write \(I_C\) with respect to \(V_\text{in}\), \(V_{th}\), \(R_B\), and \(h_{FE}\)? Since \(I_C\) flows through \(R_C\), what will be the voltage drop across \(R_C\)? Considering this drop in voltage, what will the voltage be at the collector relative to ground? Write \(V_{CE}\) as a function of \(R_C\), \(R_B\), \(V_\text{in}\), \(V_{th}\), and \(V_\text{supply}\). Make the circuit above in LTspice with \(V_\text{supply}=9\text{ V}\),
- \(R_B=1\text{ k}\Omega\), and
- \(R_C=8\ \Omega\). We can
- consider this circuit being used to control the current through
- an \(8\ \Omega\) load as a
- function of \(V_\text{in}\).
- To create a BJT, in the components menu, search “NPN” (or “PNP”
- if that’s the kind of BJT you want). We will do a new kind of simulation: a “DC sweep”. In the
- Configure Analysis menu, select the “DC sweep” tab and under
- “1st Source” enter: Make the circuit above in LTspice with \(V_\text{supply}=9\text{ V}\), \(R_B=1\text{ k}\Omega\), and \(R_C=8\ \Omega\). We can consider this circuit being used to control the current through an \(8\ \Omega\) load as a function of \(V_\text{in}\). To create a BJT, in the components menu, search “NPN” (or “PNP” if that’s the kind of BJT you want). We will do a new kind of simulation: a “DC sweep”. In the Configure Analysis menu, select the “DC sweep” tab and under “1st Source” enter: “Name of 1st source:” The name of your \(V_\text{in}\) voltage; if you
- haven’t explicitly named it, it will likely be V1 or V2
- (depending on what order you placed the two voltages). “Name of 1st source:” The name of your \(V_\text{in}\) voltage; if you haven’t explicitly named it, it will likely be V1 or V2 (depending on what order you placed the two voltages). “Type of sweep:” Linear. “Start Value:” 0 “Stop Value:” 5 “Increment:” 0.1 This will configure a voltage sweep from \(0\text{ V}\) to \(5\text{ V}\) for the input
- voltage. Run the simulation. This will configure a voltage sweep from \(0\text{ V}\) to \(5\text{ V}\) for the input voltage. Run the simulation. Click to measure the \(V_\text{in}\) voltage. You should
- see a y=x plot from \(0\text{
- V}\) to \(5\text{ V}\).
- The \(x\)-axis of a DC sweep
- will be the sweep of voltages you configured. Since you are
- measuring this voltage, you should expect to see this
- relationship. Now measure the voltage at the base. Approximately what
- is the threshold voltage of this transistor? Measure the base current. You can do this by measuring
- the current through \(R_B\) or
- by clicking on the base of the transistor. If the current
- measurement is wanting ot measure the current in the wrong
- direction (such that it’s saying the current is negative), you
- can use the “move” tool to select the resistor, and rotate it
- with Ctrl+R (twice to rotate 180 degrees) and the current will
- now read in the direction you want (you’ll have to re-run the
- simulation after the rotation). Use this measurement to
- determine the minimum \(V_\text{in}\) needed to start to
- drive any current. Come up with a method to determine the current gain of
- this transistor. You can do this in any way you wish, and may
- configure a new simulation to do so. Please record your
- methodology and results. Click to measure the \(V_\text{in}\) voltage. You should see a y=x plot from \(0\text{ V}\) to \(5\text{ V}\). The \(x\)-axis of a DC sweep will be the sweep of voltages you configured. Since you are measuring this voltage, you should expect to see this relationship. Now measure the voltage at the base. Approximately what is the threshold voltage of this transistor? Measure the base current. You can do this by measuring the current through \(R_B\) or by clicking on the base of the transistor. If the current measurement is wanting ot measure the current in the wrong direction (such that it’s saying the current is negative), you can use the “move” tool to select the resistor, and rotate it with Ctrl+R (twice to rotate 180 degrees) and the current will now read in the direction you want (you’ll have to re-run the simulation after the rotation). Use this measurement to determine the minimum \(V_\text{in}\) needed to start to drive any current. Come up with a method to determine the current gain of this transistor. You can do this in any way you wish, and may configure a new simulation to do so. Please record your methodology and results. In the same simulation, remove the \(8\ \Omega\) resistor so that the
- \(9\text{ V}\) is directly
- applied to the collector. Fix the input voltage to \(1\text{ V}\) and change the DC
- sweep to sweep the supply voltage \(V_\text{supply}\) from \(0\text{ V}\) to \(9\text{ V}\) in \(0.005\text{ V}\) increments. In the same simulation, remove the \(8\ \Omega\) resistor so that the \(9\text{ V}\) is directly applied to the collector. Fix the input voltage to \(1\text{ V}\) and change the DC sweep to sweep the supply voltage \(V_\text{supply}\) from \(0\text{ V}\) to \(9\text{ V}\) in \(0.005\text{ V}\) increments. Run the simulation and measure the collector current
- (the current that would have gone through the \(8\ \Omega\) load) by clicking on
- the corner of the collector. Right click the graph “File > Export Data as text”
- and save the data in a data directory where you have your
- Jupyter Notebook. Run the simulation and measure the collector current (the current that would have gone through the \(8\ \Omega\) load) by clicking on the corner of the collector. Right click the graph “File > Export Data as text” and save the data in a data directory where you have your Jupyter Notebook. Repeat with: \(V_\text{ in} = 2\text{
- V}\) \(V_\text{ in} = 3\text{
- V}\) \(V_\text{ in} = 4\text{
- V}\) \(V_\text{ in} = 5\text{
- V}\) \(V_\text{ in} = 2\text{ V}\) \(V_\text{ in} = 3\text{ V}\) \(V_\text{ in} = 4\text{ V}\) \(V_\text{ in} = 5\text{ V}\) You can load the data into python with the following
- code (assuming your files are in a directory called
- “simulated_data” and the file names are such. You can name your
- data the same as below or modify the code to accomadate your
- naming scheme) You can load the data into python with the following code (assuming your files are in a directory called “simulated_data” and the file names are such. You can name your data the same as below or modify the code to accomadate your naming scheme) The The plot you just created is the classic way people
- represent the \(IV\)-characteristics of a BJT. Now re-consider the \(8\
- \Omega\) load (\(R_C\)
- in the circuit). When a collector current flows through the
- resistor, voltage will drop across it and \(V_{CE}\) will then be less than
- the supply voltage \(V_\text{supply}\). The voltage
- drop across \(R_C\) is \[\Delta V =
- V_\text{supply}-V_{CE}= I_C R_C\] This can be rearranged to be a function \(I_C(V_{CE})\) that we can plot on
- your graph from the previous question. The The plot you just created is the classic way people represent the \(IV\)-characteristics of a BJT. Now re-consider the \(8\ \Omega\) load (\(R_C\) in the circuit). When a collector current flows through the resistor, voltage will drop across it and \(V_{CE}\) will then be less than the supply voltage \(V_\text{supply}\). The voltage drop across \(R_C\) is \[\Delta V = V_\text{supply}-V_{CE}= I_C R_C\] This can be rearranged to be a function \(I_C(V_{CE})\) that we can plot on your graph from the previous question. Write the function \(I_C(V_{CE})\) and make a Python
- function that calculates \(I_C\) using \(V_{CE}\), \(R_C\), and \(V_\text{supply}\) as
- inputs. Use this Python function to plot this \(I_C(V_{CE})\) on the same graph
- you made above using \(R_C=8\
- \Omega\) and \(V_\text{supply}=5\text{ V}\). This
- line is referred to as a load
- line and represents a constraint on the \(IV\)-characteristics. One way to predict the behavior of a BJT in this
- configuration is to pick the correct curve on the plot
- corresponding to the input voltage, then find where it
- intersects the load line. This intersection will represent the
- collector current and collector-emitter voltage for this
- particular choice of \(V_\text{supply}\) and \(R_C\). Use your plot to record
- \(I_C\) for each choice of
- \(V_\text{in}\). Compare the \(I_C\) vs
- \(V_\text{in}\) from the graph
- to the equations you derived in Question 2.2.1 (you should use these equations to
- calculate \(I_C\) for each
- \(V_\text{in}\)). Write the function \(I_C(V_{CE})\) and make a Python function that calculates \(I_C\) using \(V_{CE}\), \(R_C\), and \(V_\text{supply}\) as inputs. Use this Python function to plot this \(I_C(V_{CE})\) on the same graph you made above using \(R_C=8\ \Omega\) and \(V_\text{supply}=5\text{ V}\). This line is referred to as a load line and represents a constraint on the \(IV\)-characteristics. One way to predict the behavior of a BJT in this configuration is to pick the correct curve on the plot corresponding to the input voltage, then find where it intersects the load line. This intersection will represent the collector current and collector-emitter voltage for this particular choice of \(V_\text{supply}\) and \(R_C\). Use your plot to record \(I_C\) for each choice of \(V_\text{in}\). Compare the \(I_C\) vs \(V_\text{in}\) from the graph to the equations you derived in Question 2.2.1 (you should use these equations to calculate \(I_C\) for each \(V_\text{in}\)). A common application for a transistor is as a voltage
- controlled switch. Consider the circuit in 3 where \(R_C\) is some device, like an
- electromagnet (that is used to move the bolt of a lock), that
- can be turned on with some large current. Often in electronic
- systems that control things (like the magnetic lock we’re
- considering), the control voltages/currents are small, but the
- things they control may need much more power to operate. We
- will use Arduino microcontrollers for this purpose in Lab
- 10. The BJT switch is a classic way to operate the on/off state
- of a device that requires more power than the control voltages
- or currents that can be provided by a controller. Often these
- switches are designed in a way so that the collector current
- \(I_C\) saturates at the
- desired operating current for running the device. In the following steps, you will design a BJT switch to
- operate an electromagnet with a series resistance of \(600\ \Omega\) (this is \(R_C\)). The recommended operating
- voltage for the electromagnet is \(12\text{ V}\). A common application for a transistor is as a voltage controlled switch. Consider the circuit in 3 where \(R_C\) is some device, like an electromagnet (that is used to move the bolt of a lock), that can be turned on with some large current. Often in electronic systems that control things (like the magnetic lock we’re considering), the control voltages/currents are small, but the things they control may need much more power to operate. We will use Arduino microcontrollers for this purpose in Lab 10. The BJT switch is a classic way to operate the on/off state of a device that requires more power than the control voltages or currents that can be provided by a controller. Often these switches are designed in a way so that the collector current \(I_C\) saturates at the desired operating current for running the device. In the following steps, you will design a BJT switch to operate an electromagnet with a series resistance of \(600\ \Omega\) (this is \(R_C\)). The recommended operating voltage for the electromagnet is \(12\text{ V}\). What is the current in the electromagnet when the
- operating voltage is applied (consider applying this voltage
- directly to the electromagnet)? How much base current is needed to get this much
- collector current (use \(h_{FE}=100\)). As we saw in the data sheet, \(h_{FE}\) is not a constant value
- in real BJTs, so we don’t want to design the switch to rely on
- a particular value of the current gain. This can be done by
- selecting \(V_\text{supply}\)
- such that it can’t possibly supply more current than desired.
- When a BJT has a saturated collector current (i.e. \(V_\text{supply}\) can’t supply any
- more current), \(V_{CE}\approx
- 0\). If \(V_{CE}=0\),
- and one side of the electromagnet is at \(V_\text{supply}\), what is the
- voltage across the electromagnet? What choice of \(V_\text{supply}\) will result in
- \(12\text{ V}\) across the
- electromagnet when \(V_{CE}=0\) (i.e. when the
- collector current is saturated)? Assuming the worst possible current gain is \(h_{FE}=30\) for this transistor,
- how much base current is needed to saturate \(I_C\)? If the controller supplies a \(5\text{ V}\) signal, what choice
- of \(R_B\) will result in this
- current (don’t forget to consider \(V_{th}=0.9\text{ V}\))? What is the current in the electromagnet when the operating voltage is applied (consider applying this voltage directly to the electromagnet)? How much base current is needed to get this much collector current (use \(h_{FE}=100\)). As we saw in the data sheet, \(h_{FE}\) is not a constant value in real BJTs, so we don’t want to design the switch to rely on a particular value of the current gain. This can be done by selecting \(V_\text{supply}\) such that it can’t possibly supply more current than desired. When a BJT has a saturated collector current (i.e. \(V_\text{supply}\) can’t supply any more current), \(V_{CE}\approx 0\). If \(V_{CE}=0\), and one side of the electromagnet is at \(V_\text{supply}\), what is the voltage across the electromagnet? What choice of \(V_\text{supply}\) will result in \(12\text{ V}\) across the electromagnet when \(V_{CE}=0\) (i.e. when the collector current is saturated)? Assuming the worst possible current gain is \(h_{FE}=30\) for this transistor, how much base current is needed to saturate \(I_C\)? If the controller supplies a \(5\text{ V}\) signal, what choice of \(R_B\) will result in this current (don’t forget to consider \(V_{th}=0.9\text{ V}\))? This design no longer depends on \(h_{FE}\) as long as it is above
- 30. When \(h_{FE}\) does
- exceed 30, it is impossible for the BJT to supply more
- collector current because it is limited by the supply voltage
- \(V_\text{supply}\). We have been looking at NPN BJTs where a positive current
- into the base controls a positive current into the collector
- (such that all the current leaves the emitter). A PNP operates
- almost identically to the NPN, except for the fact that a
- negative current (current flowing out of the base) controls a
- current out of the collector (such that all the current enters
- through the emitter). Each kind of BJT only works with current in one direction,
- so to amplify both positive and negative currents, an NPN and a
- PNP are needed in what’s referred to as a push-pull
- configuration This design no longer depends on \(h_{FE}\) as long as it is above 30. When \(h_{FE}\) does exceed 30, it is impossible for the BJT to supply more collector current because it is limited by the supply voltage \(V_\text{supply}\). We have been looking at NPN BJTs where a positive current into the base controls a positive current into the collector (such that all the current leaves the emitter). A PNP operates almost identically to the NPN, except for the fact that a negative current (current flowing out of the base) controls a current out of the collector (such that all the current enters through the emitter). Each kind of BJT only works with current in one direction, so to amplify both positive and negative currents, an NPN and a PNP are needed in what’s referred to as a push-pull configuration The circuit above is an example of a push-pull amplifier.
- When \(V_\text{in}>V_{th}\), current
- will flow into the base of the NPN and “push” current into the
- load \(R_L\), and \(V_\text{out}\) will be \(V_\text{in}-V_{th}\). When \(V_\text{in}<-V_{th}\), current
- will flow out of the PNP and “pull” current from the load, and
- \(V_\text{out}\) will be \(V_\text{in}+V_{th}\). However,
- when \(-V_{th}<V_\text{in}<V_{th}\),
- no current will flow and \(V_\text{out}=0\). This means that
- the output voltage won’t follow exactly the input voltage, and
- there will be what’s called crossover distortion. In the
- following questions, you will explore this crossover distortion
- and a solution to it. The circuit above is an example of a push-pull amplifier. When \(V_\text{in}>V_{th}\), current will flow into the base of the NPN and “push” current into the load \(R_L\), and \(V_\text{out}\) will be \(V_\text{in}-V_{th}\). When \(V_\text{in}<-V_{th}\), current will flow out of the PNP and “pull” current from the load, and \(V_\text{out}\) will be \(V_\text{in}+V_{th}\). However, when \(-V_{th}<V_\text{in}<V_{th}\), no current will flow and \(V_\text{out}=0\). This means that the output voltage won’t follow exactly the input voltage, and there will be what’s called crossover distortion. In the following questions, you will explore this crossover distortion and a solution to it. Build the circuit shown in 4 in LTspice with Build the circuit shown in 4 in LTspice with \(V_{S,+}=15\text{
- V}\) \(V_{S,-}=-15\text{
- V}\) \(R_L=8\
- \Omega\) \(V_{S,+}=15\text{ V}\) \(V_{S,-}=-15\text{ V}\) \(R_L=8\ \Omega\) Make \(V_\text{in}\) a sine
- wave with Make \(V_\text{in}\) a sine wave with \(f=1\text{
- kHz}\) an amplitude of \(5\text{
- V}\) an output impedance of \(50\
- \Omega\) (to emulate the function generator) \(f=1\text{ kHz}\) an amplitude of \(5\text{ V}\) an output impedance of \(50\ \Omega\) (to emulate the function generator) Configure a transient analysis with a stop time of \(5\text{ ms}\). Configure a transient analysis with a stop time of \(5\text{ ms}\). Measure \(V_\text{in}\)
- and \(V_\text{out}\) and save
- the plot. Describe the crossover distortion you are seeing and why
- it occurs. Measure \(V_\text{in}\) and \(V_\text{out}\) and save the plot. Describe the crossover distortion you are seeing and why it occurs. The push-pull amplifier in Figure 4 may seem relatively useless
- since it just attempts to reproduce a voltage, but distorts it.
- However, this amplifier can be incredibly useful in overcoming
- current limits of op-amps. Recall, in lab 4, when you built a
- buffer (a.k.a. follower) and a non-inverting amplifier. You
- found that the buffer was useful as an output stage because
- it’s able to drive the voltage with a near zero output
- impedance; however, the LF356 is limited in that it can only
- output about \(27\text{ mA}\)
- (which isn’t a lot). The push-pull amplifier is capable of
- driving lots of current (remember, the output current of the
- op-amp will have the current gain of the active BJT applied to
- it). There are even current limitations here, and there are
- further solutions to get more and more current (with Darlington
- pairs: this can all be found in chapter 2 of Horowitz and
- Hill). However, there are also heat management considerations
- that need to be made with large current applications. The push-pull amplifier in Figure 4 may seem relatively useless since it just attempts to reproduce a voltage, but distorts it. However, this amplifier can be incredibly useful in overcoming current limits of op-amps. Recall, in lab 4, when you built a buffer (a.k.a. follower) and a non-inverting amplifier. You found that the buffer was useful as an output stage because it’s able to drive the voltage with a near zero output impedance; however, the LF356 is limited in that it can only output about \(27\text{ mA}\) (which isn’t a lot). The push-pull amplifier is capable of driving lots of current (remember, the output current of the op-amp will have the current gain of the active BJT applied to it). There are even current limitations here, and there are further solutions to get more and more current (with Darlington pairs: this can all be found in chapter 2 of Horowitz and Hill). However, there are also heat management considerations that need to be made with large current applications. Consider the circuit above (it may look complicated, but
- we’ll break it down). Starting left to right, you’ll notice an
- op-amp with negative feedback. The input is going into the
- \(V_+\) input, so this is a
- non-inverting amplifier. The voltage gain of the amplifier, as
- you know, is \[G = 1 +
- \frac{R_F}{R}\] The rest of the circuit is a push-pull amplifier that uses
- an op-amp with negative feedback to mitigate crossover
- distortion. The output of the push-pull amplifier is fed back
- into the \(V_-\) input of the
- op-amp, and the output of the op-amp feeds into the input of
- the push-pull amplifier. Having the op-amp in the circuit in
- this way helps make \(V_\text{out}=V_\text{in}\) instead
- of \(V_\text{out}=V_\text{in}\pm
- V_{th}\) because the feedback of the op-amp will drive
- the system toward \(V_+=V_-\);
- since \(V_\text{out}=V_-\),
- the output voltage will now be \(V_\text{in}\). Since the push-pull amplifier (with the second op-amp) has a
- voltage gain of 1, the total voltage gain of the circuit will
- be the voltage gain of the non-inverting amplifier. The
- advantage of this circuit over a non-inverting amplifier
- followed by just an op-amp buffer, is that the amount of
- current the BJTs can supply is much greater than the LF356. Build the circuit shown in Figure 5 in LTspice with Consider the circuit above (it may look complicated, but we’ll break it down). Starting left to right, you’ll notice an op-amp with negative feedback. The input is going into the \(V_+\) input, so this is a non-inverting amplifier. The voltage gain of the amplifier, as you know, is \[G = 1 + \frac{R_F}{R}\] The rest of the circuit is a push-pull amplifier that uses an op-amp with negative feedback to mitigate crossover distortion. The output of the push-pull amplifier is fed back into the \(V_-\) input of the op-amp, and the output of the op-amp feeds into the input of the push-pull amplifier. Having the op-amp in the circuit in this way helps make \(V_\text{out}=V_\text{in}\) instead of \(V_\text{out}=V_\text{in}\pm V_{th}\) because the feedback of the op-amp will drive the system toward \(V_+=V_-\); since \(V_\text{out}=V_-\), the output voltage will now be \(V_\text{in}\). Since the push-pull amplifier (with the second op-amp) has a voltage gain of 1, the total voltage gain of the circuit will be the voltage gain of the non-inverting amplifier. The advantage of this circuit over a non-inverting amplifier followed by just an op-amp buffer, is that the amount of current the BJTs can supply is much greater than the LF356. Build the circuit shown in Figure 5 in LTspice with OP113 op-amps \(R_F=100\text{
- k}\Omega\) \(R=1\text{
- k}\Omega\) \(V_{S,+}=15\text{
- V}\) \(V_{S,-}=-15\text{
- V}\) \(R_L=8\
- \Omega\) \(R_F=100\text{ k}\Omega\) \(R=1\text{ k}\Omega\) \(V_{S,+}=15\text{ V}\) \(V_{S,-}=-15\text{ V}\) \(R_L=8\ \Omega\) Make \(V_\text{in}\) a sine
- wave with Make \(V_\text{in}\) a sine wave with \(f=1\text{
- kHz}\) an amplitude of \(50\text{
- mV}\) an output impedance of \(50\
- \Omega\) (to emulate the function generator) \(f=1\text{ kHz}\) an amplitude of \(50\text{ mV}\) an output impedance of \(50\ \Omega\) (to emulate the function generator) Configure a transient analysis with a stop time of \(5\text{ ms}\). Configure a transient analysis with a stop time of \(5\text{ ms}\). Before running the simulation, calculate the predicted
- voltage gain and \(V_\text{out}\). Run the simulation and measure the input voltage and the
- voltage at the output of the non-inverting amplifier. Is the
- voltage gain what you predicted? Measure the voltage at the output of the circuit,
- compare this to the output of the non-inverting amplifier. Is
- there any crossover distortion? Measure the current in the load, what is the maximum
- current? Would the LF356 be able to supply this current without
- the BJTs? Before running the simulation, calculate the predicted voltage gain and \(V_\text{out}\). Run the simulation and measure the input voltage and the voltage at the output of the non-inverting amplifier. Is the voltage gain what you predicted? Measure the voltage at the output of the circuit, compare this to the output of the non-inverting amplifier. Is there any crossover distortion? Measure the current in the load, what is the maximum current? Would the LF356 be able to supply this current without the BJTs? Field effect transistors (FET) differ from bipolar
- transistors in that they are controlled by an applied voltage
- instead of an applied current. Since voltage and current are
- often related, functionally they are very similar and often can
- be exchanged in various applications. Instead of having a base,
- collector, and emitter, a FET has a gate, source, and drain. This video
- describes how FETs work. A commonly used FET is a metal-oxide semiconductor FET
- (MOSFET), where a small insulating layer separates the gate
- terminal from the semiconductor. This creates a capacitor-like
- structure that insulates DC currents, and when the gate
- terminal is charged, it will generate electric fields across
- the insulator and influence the behavior of the doped
- semiconductor on the other side. In integrated digital
- circuits, small MOSFETs are ubiquitous and are used in
- everything from simple logic circuits to the billions of
- transistors found in Intel and AMD central processor chips
- (CPUs). Small MOSFETs are also used in some op-amps,
- particularly when very low supply current is needed, as in
- portable battery-powered circuits. Small discrete (single)
- MOSFETs are not normally used because they are extremely
- fragile. Large discrete MOSFETs are used in all sorts of high
- power applications, including commercial radio transmitters.
- The primary advantages of MOSFETs are that they are extremely
- simple to manufacture at scale (in a process called CMOS), and
- because the active state involves essentially charging a
- capacitor, there is no passive power consumption (for a BJT, to
- keep it on, you have to continue to sink current into the base
- which costs energy). A disadvantage of MOSFETs is in high
- frequency applications where the capacitive coupling in the
- metal-oxide starts to act like a short circuit. Junction FETs (JFETs) are also very common. JFETs add very
- little intrinsic noise to a circuit and have very large input
- impedance. Op-amps that use JFETs for the input stage are often
- the first choice for low-noise amplification (such as the
- LF356). Discrete JFETs are commonly seen in scientific
- instruments. Consider using a JFET when low-noise is critical.
- We will not cover JFETs in this activity, but you can read
- about them in Chapter 3 of Horowitz and Hill (either edition)
- and they may be useful in your final project. Field effect transistors (FET) differ from bipolar transistors in that they are controlled by an applied voltage instead of an applied current. Since voltage and current are often related, functionally they are very similar and often can be exchanged in various applications. Instead of having a base, collector, and emitter, a FET has a gate, source, and drain. This video describes how FETs work. A commonly used FET is a metal-oxide semiconductor FET (MOSFET), where a small insulating layer separates the gate terminal from the semiconductor. This creates a capacitor-like structure that insulates DC currents, and when the gate terminal is charged, it will generate electric fields across the insulator and influence the behavior of the doped semiconductor on the other side. In integrated digital circuits, small MOSFETs are ubiquitous and are used in everything from simple logic circuits to the billions of transistors found in Intel and AMD central processor chips (CPUs). Small MOSFETs are also used in some op-amps, particularly when very low supply current is needed, as in portable battery-powered circuits. Small discrete (single) MOSFETs are not normally used because they are extremely fragile. Large discrete MOSFETs are used in all sorts of high power applications, including commercial radio transmitters. The primary advantages of MOSFETs are that they are extremely simple to manufacture at scale (in a process called CMOS), and because the active state involves essentially charging a capacitor, there is no passive power consumption (for a BJT, to keep it on, you have to continue to sink current into the base which costs energy). A disadvantage of MOSFETs is in high frequency applications where the capacitive coupling in the metal-oxide starts to act like a short circuit. Junction FETs (JFETs) are also very common. JFETs add very little intrinsic noise to a circuit and have very large input impedance. Op-amps that use JFETs for the input stage are often the first choice for low-noise amplification (such as the LF356). Discrete JFETs are commonly seen in scientific instruments. Consider using a JFET when low-noise is critical. We will not cover JFETs in this activity, but you can read about them in Chapter 3 of Horowitz and Hill (either edition) and they may be useful in your final project. FETS are similar to BJTs. The table below relates the
- two: FETS are similar to BJTs. The table below relates the two: A voltage from the gate to the source (gate-source voltage
- \(V_{GS}\)) controls current
- from drain to source (drain current \(I_D\)). For an N-channel, a
- positive \(V_{GS}\) drives a
- positive \(I_D\) (current
- flows from drain to source), and for a P-channel, a negative
- \(V_{GS}\) drives a negative
- \(I_D\) (current flows from
- source to drain). State whether a BJT, MOSFET, or JFET is most ideal for the
- following applications: A voltage from the gate to the source (gate-source voltage \(V_{GS}\)) controls current from drain to source (drain current \(I_D\)). For an N-channel, a positive \(V_{GS}\) drives a positive \(I_D\) (current flows from drain to source), and for a P-channel, a negative \(V_{GS}\) drives a negative \(I_D\) (current flows from source to drain). State whether a BJT, MOSFET, or JFET is most ideal for the following applications: You wish to fabricate a microcontroller chip with
- hundreds of thousands of transistors to perform digital
- logic. You wish to design an amplifier for \(1\text{ MHz}\) signals. You wish to fabricate a microcontroller chip with hundreds of thousands of transistors to perform digital logic. You wish to design an amplifier for \(1\text{ MHz}\) signals. You wish to design a low noise amplifier. MOSFETs can operate in three distinct regions. The first
- region is where the gate-to-source voltage, \(V_{GS}\), is less than the
- threshold voltage, \(V_{th}\).
- In this region, the MOSFET is turned off and no drain current
- can flow. The second region (the linear region) is when \(V_{GS} > V_{th}\) and \(V_{DS} < (V_{GS} - V_{th})\),
- where \(V_{DS}\) is the
- drain-to-source voltage. In this linear region, the transistor
- is turned on, and a channel has been created that allows
- current to flow between the drain and the source. In this
- region, the MOSFET operates like a voltage controlled resistor,
- controlled by the gate voltage relative to both the source and
- drain voltages. In the third region (the saturation region),
- \(V_{GS} > V_{th}\) and
- \(V_{DS} \ge (V_{GS} -
- V_{th})\). In the saturation region, the current is
- controlled by the gate voltage and is nearly independent of
- \(V_{DS}\). One of the most
- common applications of a MOSFET is as a switch (for binary
- logic for example), where it is operated in the saturation
- region. The linear and saturation regions are separated by the
- dotted line in Figure 7. In the
- saturation region, the dependence of current on \(V_{GS}\) is modeled by \(I_D = k(V_{GS} - V_{th})^2\),
- where \(k\) is a constant that
- depends on the device. MOSFETs can operate in three distinct regions. The first region is where the gate-to-source voltage, \(V_{GS}\), is less than the threshold voltage, \(V_{th}\). In this region, the MOSFET is turned off and no drain current can flow. The second region (the linear region) is when \(V_{GS} > V_{th}\) and \(V_{DS} < (V_{GS} - V_{th})\), where \(V_{DS}\) is the drain-to-source voltage. In this linear region, the transistor is turned on, and a channel has been created that allows current to flow between the drain and the source. In this region, the MOSFET operates like a voltage controlled resistor, controlled by the gate voltage relative to both the source and drain voltages. In the third region (the saturation region), \(V_{GS} > V_{th}\) and \(V_{DS} \ge (V_{GS} - V_{th})\). In the saturation region, the current is controlled by the gate voltage and is nearly independent of \(V_{DS}\). One of the most common applications of a MOSFET is as a switch (for binary logic for example), where it is operated in the saturation region. The linear and saturation regions are separated by the dotted line in Figure 7. In the saturation region, the dependence of current on \(V_{GS}\) is modeled by \(I_D = k(V_{GS} - V_{th})^2\), where \(k\) is a constant that depends on the device. Create a simple n-channel MOSFET circuit with the source
- grounded and individual voltages applied at the gate and the
- drain (see the figure below). You can create a n-channel MOSFET
- by searching “nmos” in the components menu. Create a simple n-channel MOSFET circuit with the source grounded and individual voltages applied at the gate and the drain (see the figure below). You can create a n-channel MOSFET by searching “nmos” in the components menu. Configure a linear DC sweep on \(V_{DS}\) from \(0\) to \(10\text{ V}\) with an increment of
- \(0.1\text{ V}\) for the
- following values of \(V_{GS}\), measure the current into
- the drain \((I_D)\) and export
- the data as you did for the BJT in question 2.2.3 (so that you can import it into your
- Jupyter Notebook) Configure a linear DC sweep on \(V_{DS}\) from \(0\) to \(10\text{ V}\) with an increment of \(0.1\text{ V}\) for the following values of \(V_{GS}\), measure the current into the drain \((I_D)\) and export the data as you did for the BJT in question 2.2.3 (so that you can import it into your Jupyter Notebook) \(V_{GS} = 2\text{
- V}\) \(V_{GS} = 4\text{
- V}\) \(V_{GS} = 6\text{
- V}\) \(V_{GS} = 8\text{
- V}\) \(V_{GS} = 2\text{ V}\) \(V_{GS} = 4\text{ V}\) \(V_{GS} = 6\text{ V}\) \(V_{GS} = 8\text{ V}\) Import the four sets of data and plot them on one graph
- with a legend labeling the value of \(V_{GS}\) for each curve. Make the
- units of \(y\)-axis in \(\text{mA}\) by multiplying \(I_D\) by \(1000\) (LTspice exports in
- Amps). Does your plot generally resemble the one shown in
- Figure 7 (if not, identify the
- mistake and resolve it)? Import the four sets of data and plot them on one graph with a legend labeling the value of \(V_{GS}\) for each curve. Make the units of \(y\)-axis in \(\text{mA}\) by multiplying \(I_D\) by \(1000\) (LTspice exports in Amps). Does your plot generally resemble the one shown in Figure 7 (if not, identify the mistake and resolve it)? We will fit this data to \[I_D =
- k(V_{GS}-V_{th})^2\] The threshold voltage for this simulated MOSFET is \(0\text{ V}\). (You can convince
- yourself of this by doing a DC sweep of \(V_{GS}\) at a fixed \(V_{DS}\)). We can then define the
- fitting function as \[I_D = k(V_{GS}-V_{th})^2\] The threshold voltage for this simulated MOSFET is \(0\text{ V}\). (You can convince yourself of this by doing a DC sweep of \(V_{GS}\) at a fixed \(V_{DS}\)). We can then define the fitting function as If there are \(n\) fitting
- parameters, then the If there are \(n\) fitting parameters, then the Consider the circuit below: The potentiometer with total resistance \(R_p\) acts as a voltage divider to
- set a gate-source voltage \(V_{GS}\). We can consider the
- resistance from the wiper to ground as \(R_{GS}\), such that the transfer
- function is \(R_{GS}/R_p\)
- (since \(R_p\) is \(R_{GS}\) plus the resistance from
- the gate to the supply voltage \(V_\text{supply}\)). This leads
- to \[V_{GS} =
- \frac{R_{GS}}{R_p}V_\text{supply}\] The potentiometer then simply sets the gate-source voltage,
- giving you a way of controlling it through a dial. The load
- (with resistance \(R_L\)) will
- have current \(I_D\) run
- through it depending on the dial position. This will lead to a
- voltage drop, such that the voltage at the drain (and therefore
- \(V_{DS}\)) is less than \(V_\text{supply}\). This idea
- should be familiar from the BJT analysis you did. A load line (on the \(I_D\)
- vs \(V_{DS}\) plot) can be
- used to determine the behavior of this circuit. Recall that the
- intersection of the load line and a curve will determine \(I_D\) for each choice of \(V_{GS}\). The plot is specific to
- each individual MOSFET design, so you would use the plots
- supplied by the manufacturer in a datasheet in general;
- however, we will consider the MOSFET in your simulation since
- you already have that loaded into your Jupyter Notebook. The potentiometer with total resistance \(R_p\) acts as a voltage divider to set a gate-source voltage \(V_{GS}\). We can consider the resistance from the wiper to ground as \(R_{GS}\), such that the transfer function is \(R_{GS}/R_p\) (since \(R_p\) is \(R_{GS}\) plus the resistance from the gate to the supply voltage \(V_\text{supply}\)). This leads to \[V_{GS} = \frac{R_{GS}}{R_p}V_\text{supply}\] The potentiometer then simply sets the gate-source voltage, giving you a way of controlling it through a dial. The load (with resistance \(R_L\)) will have current \(I_D\) run through it depending on the dial position. This will lead to a voltage drop, such that the voltage at the drain (and therefore \(V_{DS}\)) is less than \(V_\text{supply}\). This idea should be familiar from the BJT analysis you did. A load line (on the \(I_D\) vs \(V_{DS}\) plot) can be used to determine the behavior of this circuit. Recall that the intersection of the load line and a curve will determine \(I_D\) for each choice of \(V_{GS}\). The plot is specific to each individual MOSFET design, so you would use the plots supplied by the manufacturer in a datasheet in general; however, we will consider the MOSFET in your simulation since you already have that loaded into your Jupyter Notebook. Use Ohm’s law to write down \(I_D\) as a function of \(R_L\), \(V_\text{supply}\), and \(V_{DS}\) (this is your load line
- equation). Implement it as a Python function that returns the
- drain current in \(\text{mA}\)
- (by multiplying by \(1000\))
- and takes \(V_\text{supply}\)
- and \(V_{DS}\) in Volts and
- \(R_L\) in Ohms. Plot your load line on a graph with your \(I_D\) vs \(V_{DS}\) curves using \(V_\text{supply}=9\text{ V}\) and
- \(R_L = 10\text{ k}\Omega\).
- Hint: You’ll want to make an \(x\)-axis array with something like
- Which values of \(V_{GS}\) result in the MOSFET
- operating in the linear region and which values result
- in the MOSFET operating in the saturation
- region? What value of \(V_{GS}\) get you closest to \(0.5\text{ mA}\)? Use Ohm’s law to write down \(I_D\) as a function of \(R_L\), \(V_\text{supply}\), and \(V_{DS}\) (this is your load line equation). Implement it as a Python function that returns the drain current in \(\text{mA}\) (by multiplying by \(1000\)) and takes \(V_\text{supply}\) and \(V_{DS}\) in Volts and \(R_L\) in Ohms. Plot your load line on a graph with your \(I_D\) vs \(V_{DS}\) curves using \(V_\text{supply}=9\text{ V}\) and \(R_L = 10\text{ k}\Omega\). Hint: You’ll want to make an \(x\)-axis array with something like Which values of \(V_{GS}\) result in the MOSFET operating in the linear region and which values result in the MOSFET operating in the saturation region? What value of \(V_{GS}\) get you closest to \(0.5\text{ mA}\)? With a supply voltage of \(9\text{
- V}\) and a load of \(10\text{
- k}\Omega\), the MOSFET operated in the linear region or
- the saturation region depending on the choice of \(V_{GS}\); however, for a load of
- \(R_L=100\ \Omega\), the
- MOSFET will operate in the saturation region for all four
- choices of \(V_{GS}\). With a supply voltage of \(9\text{ V}\) and a load of \(10\text{ k}\Omega\), the MOSFET operated in the linear region or the saturation region depending on the choice of \(V_{GS}\); however, for a load of \(R_L=100\ \Omega\), the MOSFET will operate in the saturation region for all four choices of \(V_{GS}\). Show that the MOSFET is in the saturation region for all
- the \(V_{GS}\) on your graph
- by plotting the new load line with \(V_\text{supply}=9\text{ V}\) and
- \(R_L = 100\ \Omega\) (on a
- new plot). Adjust the axes with Looking at your plot, is it consistent with the \(I_D\) vs \(V_{GS}\) plot you made in Question
- 2.7.2? Show that the MOSFET is in the saturation region for all the \(V_{GS}\) on your graph by plotting the new load line with \(V_\text{supply}=9\text{ V}\) and \(R_L = 100\ \Omega\) (on a new plot). Adjust the axes with Looking at your plot, is it consistent with the \(I_D\) vs \(V_{GS}\) plot you made in Question 2.7.2? Since we are in the saturation region, the value of \(k\) you determined from your fit
- can be used to determine the value of \(V_{GS}\) needed to get a
- particular current \(I_D\)
- through the load. Since we are in the saturation region, the value of \(k\) you determined from your fit can be used to determine the value of \(V_{GS}\) needed to get a particular current \(I_D\) through the load. Using the value of \(k\) you determined from the fit,
- what \(V_{GS}\) would you need
- to get a drain current of \(0.5\text{
- mA}\)? Note: check the units of \(k\) and make sure you report your
- answer with correct and appropriate units. Hint:
- remember that \(V_{th}=0\text{
- V}\). Notice that the \(V_{GS}\) needed to get the same
- current of \(I_D=0.5\text{
- mA}\) differs depending on the load. As the load
- decreases the load line will become steeper, so it will
- continue to intersect the \(I_D\) vs \(V_{DS}\) curves in the
- saturation region. Considering this, what \(V_{GS}\) would achieve \(I_D=0.5\text{ mA}\) for a \(8\ \Omega\) load? Using the value of \(k\) you determined from the fit, what \(V_{GS}\) would you need to get a drain current of \(0.5\text{ mA}\)? Note: check the units of \(k\) and make sure you report your answer with correct and appropriate units. Hint: remember that \(V_{th}=0\text{ V}\). Notice that the \(V_{GS}\) needed to get the same current of \(I_D=0.5\text{ mA}\) differs depending on the load. As the load decreases the load line will become steeper, so it will continue to intersect the \(I_D\) vs \(V_{DS}\) curves in the saturation region. Considering this, what \(V_{GS}\) would achieve \(I_D=0.5\text{ mA}\) for a \(8\ \Omega\) load? Op-amps are made of several transistors (often a mix of BJTs
- and JFETs). Op-amp design involves combining many kinds of
- transistor circuits like differential pairs (aka long-tail
- pairs), emitter amplifiers, current mirrors, darlington pairs,
- and push-pull amplifiers. Chapter 2 in Horowitz and Hill has a
- lot of great information on all of these (and more). It is
- worth thumbing through this chapter for ideas to incorporate in
- your final project. A great final project idea is to build an op-amp from
- discrete transistors! This op-amp, without doubt, will under
- perform compared to the LF356, but it will be a great learning
- experience. You can even implement it as an audio amplifier to
- drive a large speaker to make it more interesting. The
- following resources are a good starting off point for a project
- like this. Op-amps are made of several transistors (often a mix of BJTs and JFETs). Op-amp design involves combining many kinds of transistor circuits like differential pairs (aka long-tail pairs), emitter amplifiers, current mirrors, darlington pairs, and push-pull amplifiers. Chapter 2 in Horowitz and Hill has a lot of great information on all of these (and more). It is worth thumbing through this chapter for ideas to incorporate in your final project. A great final project idea is to build an op-amp from discrete transistors! This op-amp, without doubt, will under perform compared to the LF356, but it will be a great learning experience. You can even implement it as an audio amplifier to drive a large speaker to make it more interesting. The following resources are a good starting off point for a project like this. Read through the first article. What are the 3 primary
- stages of an op-amp? Describe the function of each one. Read through the first article. What are the 3 primary stages of an op-amp? Describe the function of each one. As we’ve seen in other labs, output impedance \(R_\text{out}\) causes a voltage
- drop when output current flows so that not all of the predicted
- (or internal) voltage makes it to the load: \[V_\text{out}^\text{(ext)} =
- \frac{R_L}{R_\text{out} +
- R_L}V_\text{out}^\text{(int)}\] As we’ve seen in other labs, output impedance \(R_\text{out}\) causes a voltage drop when output current flows so that not all of the predicted (or internal) voltage makes it to the load: \[V_\text{out}^\text{(ext)} = \frac{R_L}{R_\text{out} + R_L}V_\text{out}^\text{(int)}\] So output impedance can be represented as \[R_\text{out} =
- R_L\bigg(\frac{V_\text{out}^\text{(int)}}{V_\text{out}^\text{(ext)}}-1\bigg)\] where it can be determined experimentally by measuring \(V_\text{out}^\text{(int)}\) by
- measuring \(V_\text{out}\)
- with no load (no current draw) and \(V_\text{out}^\text{(ext)}\) with a
- load. People will define output impedance as "the impedance
- looking into the output." For the emitter follower, this is \[R_\text{out} =
- \frac{R_B}{h_{FE} +1}\] where \(R_B\) indicates
- whatever impedance is connected to the base. To be more
- precise, one should also include the emitter resistor in
- parallel with \(R_\text{out}\) for the
- true output impedance of the circuit. \[R_\text{out} = R_L\bigg(\frac{V_\text{out}^\text{(int)}}{V_\text{out}^\text{(ext)}}-1\bigg)\] where it can be determined experimentally by measuring \(V_\text{out}^\text{(int)}\) by measuring \(V_\text{out}\) with no load (no current draw) and \(V_\text{out}^\text{(ext)}\) with a load. People will define output impedance as "the impedance looking into the output." For the emitter follower, this is \[R_\text{out} = \frac{R_B}{h_{FE} +1}\] where \(R_B\) indicates whatever impedance is connected to the base. To be more precise, one should also include the emitter resistor in parallel with \(R_\text{out}\) for the true output impedance of the circuit. The circuit shown in Figure 2 does not have any impedance
- connected to the base, but if you use the function generator,
- the output impedance of the function generator will act as
- \(R_B\). What is \(R_\text{out}\) if you use the
- function generator for \(V_\text{in}\) and if the
- transistor has an \(h_{FE}=300\)? If \(R_E = 800\
- \Omega\), will this, appreciably change the output
- impedance? The circuit shown in Figure 2 does not have any impedance connected to the base, but if you use the function generator, the output impedance of the function generator will act as \(R_B\). What is \(R_\text{out}\) if you use the function generator for \(V_\text{in}\) and if the transistor has an \(h_{FE}=300\)? If \(R_E = 800\ \Omega\), will this, appreciably change the output impedance? NOTE: in a later section we will work out a
- more precise estimate of \(R_\text{out}\). NOTE: in a later section we will work out a more precise estimate of \(R_\text{out}\). In the lab, you will begin by constructing a common emitter
- amplifier (CEA), which operates on the principle of a current
- amplifier. However, a major fault of the common emitter
- amplifier is its high output impedance. This problem can be
- fixed by adding an emitter follower as a second stage. The
- common-emitter amplifier and the emitter follower are two
- common bipolar transistor circuits. The common emitter amplifier is similar to the emitter
- follower but with the output at the collector instead of the
- emitter and with a collector resistor \(R_C\). Again the base-emitter
- voltage \(V_{BE}\) will be
- \(V_{th}\) when active, so
- \(V_E = V_\text{in} -
- V_{th}\), and therefore \[I_E =
- \frac{V_\text{in}-V_{th}}{R_E}\] Since \(I_C\approx I_E\),
- we can then consider this as the current through \(R_C\), then the voltage drop
- across \(R_C\) can be used to
- determine \(V_\text{out}\) \[V_\text{supply}-V_\text{out} =
- I_C R_C \approx I_E R_C\] \[V_\text{out} = V_\text{supply}
- - \frac{R_C}{R_E}(V_\text{in}-V_{th}) \] This analysis suggests that the output rides on a DC offset
- of \((V_\text{supply}+V_{th}
- R_C/R_E)\). Trying to define the gain as \(V_\text{out}/V_\text{in}\) clearly
- leads to a weird result. It is better to define it in terms of
- only the AC component of the signal. \[G =
- \frac{v_\text{out}}{v_\text{in}}\] In the lab, you will begin by constructing a common emitter amplifier (CEA), which operates on the principle of a current amplifier. However, a major fault of the common emitter amplifier is its high output impedance. This problem can be fixed by adding an emitter follower as a second stage. The common-emitter amplifier and the emitter follower are two common bipolar transistor circuits. The common emitter amplifier is similar to the emitter follower but with the output at the collector instead of the emitter and with a collector resistor \(R_C\). Again the base-emitter voltage \(V_{BE}\) will be \(V_{th}\) when active, so \(V_E = V_\text{in} - V_{th}\), and therefore \[I_E = \frac{V_\text{in}-V_{th}}{R_E}\] Since \(I_C\approx I_E\), we can then consider this as the current through \(R_C\), then the voltage drop across \(R_C\) can be used to determine \(V_\text{out}\) \[V_\text{supply}-V_\text{out} = I_C R_C \approx I_E R_C\] \[V_\text{out} = V_\text{supply} - \frac{R_C}{R_E}(V_\text{in}-V_{th}) \] This analysis suggests that the output rides on a DC offset of \((V_\text{supply}+V_{th} R_C/R_E)\). Trying to define the gain as \(V_\text{out}/V_\text{in}\) clearly leads to a weird result. It is better to define it in terms of only the AC component of the signal. \[G = \frac{v_\text{out}}{v_\text{in}}\] where \[v_\text{out} =
- -v_\text{in}\frac{R_C}{R_E}\] \[v_\text{out} = -v_\text{in}\frac{R_C}{R_E}\] so \[G =
- -\frac{R_C}{R_E}\] Notice how none of this depended on the specific value of
- \(h_{FE}\). This is a good
- thing because \(h_{FE}\) is
- not a constant, so the amplifier can act stable under various
- conditions. \[G = -\frac{R_C}{R_E}\] Notice how none of this depended on the specific value of \(h_{FE}\). This is a good thing because \(h_{FE}\) is not a constant, so the amplifier can act stable under various conditions. When \(V_\text{in}<V_{th}\), is the
- transistor active? When \(V_\text{in}<V_{th}\), what is
- \(I_C\)? When \(V_\text{in}<V_{th}\), what is
- \(V_\text{out}\)? When \(V_\text{in}<V_{th}\), is the transistor active? When \(V_\text{in}<V_{th}\), what is \(I_C\)? When \(V_\text{in}<V_{th}\), what is \(V_\text{out}\)? Consider the common emitter amplifier with \(V_\text{supply}=15\text{
- V}\), \(R_C=2.74\text{
- k}\Omega\), \(R_E=1\text{
- k}\Omega\). \(V_\text{supply}=15\text{ V}\), \(R_C=2.74\text{ k}\Omega\), \(R_E=1\text{ k}\Omega\). Consider an input signal that is a sine wave that oscillates
- around \(0\text{ V}\) with an
- amplitude of \(4\text{ V}\)
- (\(8\text{ V}\)
- peak-to-peak) Consider an input signal that is a sine wave that oscillates around \(0\text{ V}\) with an amplitude of \(4\text{ V}\) (\(8\text{ V}\) peak-to-peak) We found that the output will clip at a maximum of \(V_\text{max} = V_\text{supply}\)
- when \(V_\text{in}<V_{th}\). Now
- consider the clipping for the minimum value of \(V_\text{out}\); i.e. \(V_\text{min}\). The equation for
- the output voltage can be rewritten \[V_C =
- V_\text{supply}-\frac{R_C}{R_E}(V_B-V_{th}) =
- V_\text{supply}-\frac{R_C}{R_E}V_E\] by recognizing that \(V_\text{out}\) is the collector
- voltage \(V_C\) and \(V_\text{in}\) is the base voltage
- \(V_B\). We can determine the
- lower clipping value by knowing that it is impossible for \(V_{CE}\) to be negative. This can
- also be stated that \(V_C\)
- must be greater than \(V_E\): We found that the output will clip at a maximum of \(V_\text{max} = V_\text{supply}\) when \(V_\text{in}<V_{th}\). Now consider the clipping for the minimum value of \(V_\text{out}\); i.e. \(V_\text{min}\). The equation for the output voltage can be rewritten \[V_C = V_\text{supply}-\frac{R_C}{R_E}(V_B-V_{th}) = V_\text{supply}-\frac{R_C}{R_E}V_E\] by recognizing that \(V_\text{out}\) is the collector voltage \(V_C\) and \(V_\text{in}\) is the base voltage \(V_B\). We can determine the lower clipping value by knowing that it is impossible for \(V_{CE}\) to be negative. This can also be stated that \(V_C\) must be greater than \(V_E\): \[V_C\ge V_E\] You can determine the minimum \(V_C\) \((V_\text{out})\) by finding the
- value of \(V_C\) that occurs
- when \(V_C=V_E\). Use this
- condition to express the minimum \(V_C\) with respect to \(V_\text{supply}\), \(R_C\), and \(R_E\). Determine the minimum output voltage for \(V_\text{supply}=15\text{ V}\),
- \(R_C=2.74\text{ k}\Omega\),
- and \(R_E=1\text{
- k}\Omega\). What is the maximum input voltage that corresponds to
- this minimum output voltage (recall this is an inverting
- amplifier)? Hint: Express the equation above under the
- \(V_C=V_E\) condition in terms
- of \(V_E\) instead of \(V_C\) and then express it in terms
- of \(V_B\). Recall:
- \(V_E=V_B-V_{th}\). You can determine the minimum \(V_C\) \((V_\text{out})\) by finding the value of \(V_C\) that occurs when \(V_C=V_E\). Use this condition to express the minimum \(V_C\) with respect to \(V_\text{supply}\), \(R_C\), and \(R_E\). Determine the minimum output voltage for \(V_\text{supply}=15\text{ V}\), \(R_C=2.74\text{ k}\Omega\), and \(R_E=1\text{ k}\Omega\). What is the maximum input voltage that corresponds to this minimum output voltage (recall this is an inverting amplifier)? Hint: Express the equation above under the \(V_C=V_E\) condition in terms of \(V_E\) instead of \(V_C\) and then express it in terms of \(V_B\). Recall: \(V_E=V_B-V_{th}\). The input impedance of the common emitter amplifier is the
- same as the emitter follower, since we can follow the same
- logic and steps to arrive at the solution. The output
- impedance, however, is different because the output is
- connected to the collector instead of the emitter. "Looking
- back at" the collector from the output sees two paths, one
- through the collector resistor \(R_C\), and one through the
- collector itself (which is a very large impedance). These two
- impedances can be thought of as in parallel. The input impedance of the common emitter amplifier is the same as the emitter follower, since we can follow the same logic and steps to arrive at the solution. The output impedance, however, is different because the output is connected to the collector instead of the emitter. "Looking back at" the collector from the output sees two paths, one through the collector resistor \(R_C\), and one through the collector itself (which is a very large impedance). These two impedances can be thought of as in parallel. NOTE: in a later section we will work out a
- more precise estimate of \(R_\text{out}\). Your plot in Question 2.3.2 shows that
- the common emitter amplifier is unable to effectively amplify
- signals that oscillate around \(0\text{ V}\) due to the fact that
- the output signal gets clipped at \(V_\text{supply}\). One solution to
- this issue is to ‘bias’ the input of the amplifier so that the
- input oscillates around a DC offset instead of around \(0\text{ V}\). You found above that
- when the input voltage is less than the threshold voltage,
- \(V_\text{out}=V_\text{supply}\). We
- can define the quiescent voltage as: DEFINITION: Quiescent voltage: \(V_Q\) - the DC voltage at an
- output terminal with reference to ground when no signal is
- applied. Note: quiescent means ‘at rest’. So the common emitter amplifier we considered above has a
- quiescent voltage \(V_Q=V_\text{supply}\). This
- clearly is a major issue since the maximum clipping voltage is
- also \(V_\text{supply}\). In
- order to amplify signals that oscillate around zero, the
- quiescent voltage needs to be lowered (to roughly halfway
- between the clipping voltages). Consider the circuit below: NOTE: in a later section we will work out a more precise estimate of \(R_\text{out}\). Your plot in Question 2.3.2 shows that the common emitter amplifier is unable to effectively amplify signals that oscillate around \(0\text{ V}\) due to the fact that the output signal gets clipped at \(V_\text{supply}\). One solution to this issue is to ‘bias’ the input of the amplifier so that the input oscillates around a DC offset instead of around \(0\text{ V}\). You found above that when the input voltage is less than the threshold voltage, \(V_\text{out}=V_\text{supply}\). We can define the quiescent voltage as: DEFINITION: Quiescent voltage: \(V_Q\) - the DC voltage at an output terminal with reference to ground when no signal is applied. Note: quiescent means ‘at rest’. So the common emitter amplifier we considered above has a quiescent voltage \(V_Q=V_\text{supply}\). This clearly is a major issue since the maximum clipping voltage is also \(V_\text{supply}\). In order to amplify signals that oscillate around zero, the quiescent voltage needs to be lowered (to roughly halfway between the clipping voltages). Consider the circuit below: \(R_1\) and \(R_2\) form a voltage divider to
- set a ‘static state’ voltage at the base of the BJT. The
- transfer function of the bias network is \[T_\text{bias} =
- \frac{R_2}{R_1+R_2}\] \(R_1\) and \(R_2\) form a voltage divider to set a ‘static state’ voltage at the base of the BJT. The transfer function of the bias network is \[T_\text{bias} = \frac{R_2}{R_1+R_2}\] This makes the ‘static state’ base voltage \[V_B =
- \frac{R_2}{R_1+R_2}V_\text{supply}\] The base voltage should be above the threshold voltage such
- that the transistor is active in the ‘static state,’ so \[V_E =
- \frac{R_2}{R_1+R_2}V_\text{supply} - V_{th}\] The ‘static state’ current through \(R_E\) is then \[I_E = \frac{V_E}{R_E} =
- \frac{1}{R_E}\bigg(\frac{R_2}{R_1+R_2}V_\text{supply} -
- V_{th}\bigg)\] Assuming \(I_C=I_E\), the
- collector voltage, and therefore the quiescent voltage, can be
- determined \[V_Q = V_C = V_\text{supply} -
- I_CR_C
- = \bigg(1-\frac{R_CR_2}{R_E(R_1+R_2)}\bigg)V_\text{supply} +
- \frac{R_C}{R_E}V_{th}\] The circuit you will build will use a supply voltage of
- \(V_\text{supply}=15\text{
- V}\) and collector and emitter resistors of \(R_C=2.74\text{ k}\Omega\) and
- \(R_E = 1\text{ k}\Omega\)
- (you already determined the AC voltage gain for these
- resistance values). We need to set a quiescent voltage that is
- roughly half way between the two clipping voltages. \[V_B = \frac{R_2}{R_1+R_2}V_\text{supply}\] The base voltage should be above the threshold voltage such that the transistor is active in the ‘static state,’ so \[V_E = \frac{R_2}{R_1+R_2}V_\text{supply} - V_{th}\] The ‘static state’ current through \(R_E\) is then \[I_E = \frac{V_E}{R_E} = \frac{1}{R_E}\bigg(\frac{R_2}{R_1+R_2}V_\text{supply} - V_{th}\bigg)\] Assuming \(I_C=I_E\), the collector voltage, and therefore the quiescent voltage, can be determined \[V_Q = V_C = V_\text{supply} - I_CR_C = \bigg(1-\frac{R_CR_2}{R_E(R_1+R_2)}\bigg)V_\text{supply} + \frac{R_C}{R_E}V_{th}\] The circuit you will build will use a supply voltage of \(V_\text{supply}=15\text{ V}\) and collector and emitter resistors of \(R_C=2.74\text{ k}\Omega\) and \(R_E = 1\text{ k}\Omega\) (you already determined the AC voltage gain for these resistance values). We need to set a quiescent voltage that is roughly half way between the two clipping voltages. What quiescent voltage is halfway between the two
- clipping voltages? Determine the ‘static state’ base voltage value that
- will result in the quiescent voltage you determined. If \(R_2=10\text{
- k}\Omega\), what value of \(R_1\) will result in the desired
- quiescent voltage? What is the ‘static state’ collector current \(I_C\)? What quiescent voltage is halfway between the two clipping voltages? Determine the ‘static state’ base voltage value that will result in the quiescent voltage you determined. If \(R_2=10\text{ k}\Omega\), what value of \(R_1\) will result in the desired quiescent voltage? What is the ‘static state’ collector current \(I_C\)? In the next section, we will detail how to connect the input
- to this circuit. However, it is important to consider the
- effects the biasing network will have on the input impedance.
- The input voltage will now have two new paths, leading to three
- total paths: (1) through \(R_1\), (2) through \(R_2\), and (3) into the base. In the next section, we will detail how to connect the input to this circuit. However, it is important to consider the effects the biasing network will have on the input impedance. The input voltage will now have two new paths, leading to three total paths: (1) through \(R_1\), (2) through \(R_2\), and (3) into the base. The biasing network won’t impact the output impedance
- because it will still be dominated by \(R_C\) (the impedance looking into
- the collector will still by very large). A simple way to add a DC voltage and an AC voltage is to
- simply connect them together; however, this can lead to
- currents flowing into the source of the AC voltage (the
- function generator), which can lead to issues (like breaking
- the function generator). To mitigate this, a coupling capacitor
- should be used to couple the AC signal into the circuit. Since
- a capacitor acts as an open circuit to DC currents, the bias
- network will be unable to send a current back into the function
- generator. The biasing network won’t impact the output impedance because it will still be dominated by \(R_C\) (the impedance looking into the collector will still by very large). A simple way to add a DC voltage and an AC voltage is to simply connect them together; however, this can lead to currents flowing into the source of the AC voltage (the function generator), which can lead to issues (like breaking the function generator). To mitigate this, a coupling capacitor should be used to couple the AC signal into the circuit. Since a capacitor acts as an open circuit to DC currents, the bias network will be unable to send a current back into the function generator. The signal at the base then will be the addition of the DC
- bias set by the biasing network and the AC signal set by \(V_\text{in}\). If \(v_\text{in}\) is the AC component
- of \(V_\text{in}\), then \[V_B = v_\text{in} +
- \frac{R_2}{R_1+R_2}V_\text{supply}\] Note: If \(V_\text{in}\) is purely an AC
- signal, then \(v_\text{in}=V_\text{in}\).
- Otherwise, \(v_\text{in}=V_\text{in}-V_{DC}\),
- where \(V_{DC}\) is the DC
- part of \(V_\text{in}\). Another issue we haven’t considered, yet, is the fact that
- the power supply has series inductance. Therefore, the current
- through \(R_C\) (which is
- responsible for setting \(V_\text{out}\)) cannot change
- without disrupting the voltage supplied to the circuit (we
- discussed this in detail for lab 4). The solution is to add a
- decoupling capacitor between the supply voltage and ground. The signal at the base then will be the addition of the DC bias set by the biasing network and the AC signal set by \(V_\text{in}\). If \(v_\text{in}\) is the AC component of \(V_\text{in}\), then \[V_B = v_\text{in} + \frac{R_2}{R_1+R_2}V_\text{supply}\] Note: If \(V_\text{in}\) is purely an AC signal, then \(v_\text{in}=V_\text{in}\). Otherwise, \(v_\text{in}=V_\text{in}-V_{DC}\), where \(V_{DC}\) is the DC part of \(V_\text{in}\). Another issue we haven’t considered, yet, is the fact that the power supply has series inductance. Therefore, the current through \(R_C\) (which is responsible for setting \(V_\text{out}\)) cannot change without disrupting the voltage supplied to the circuit (we discussed this in detail for lab 4). The solution is to add a decoupling capacitor between the supply voltage and ground. Finally, the output of the circuit will oscillate around the
- quiescent voltage. We can show this by solving the circuit: \[V_E = V_B - V_{th} =
- v_\text{in} + \frac{R_2}{R_1+R_2}V_\text{supply} -
- V_{th}\] Finally, the output of the circuit will oscillate around the quiescent voltage. We can show this by solving the circuit: \[V_E = V_B - V_{th} = v_\text{in} + \frac{R_2}{R_1+R_2}V_\text{supply} - V_{th}\] So \[I_C=I_E =
- \frac{v_\text{in}}{R_E} +
- \frac{R_2}{R_E(R_1+R_2)}V_\text{supply} -
- \frac{V_{th}}{R_E}\] \[I_C=I_E = \frac{v_\text{in}}{R_E} + \frac{R_2}{R_E(R_1+R_2)}V_\text{supply} - \frac{V_{th}}{R_E}\] And finally \[V_\text{out} =
- \bigg(1-\frac{R_CR_2}{R_E(R_1+R_2)}\bigg)V_\text{supply} +
- \frac{R_C}{R_E}V_{th} - \frac{R_C}{R_E}v_\text{in} = V_Q -
- \frac{R_C}{R_E}v_\text{in}\] \(V_Q\), as we discussed
- previously, is just the DC offset at the output, so the AC
- component of \(V_\text{out}\)
- is \[v_\text{out} =
- -\frac{R_C}{R_E}v_\text{in}\] To access just the AC component, you can simply use the
- AC coupling feature on the oscilloscope to
- remove the quiescent voltage from the measurement. However, in
- order to only send the AC component to a load, you will need to
- use a coupling capacitor to send the AC signal across while
- blocking the quiescent voltage. \[V_\text{out} = \bigg(1-\frac{R_CR_2}{R_E(R_1+R_2)}\bigg)V_\text{supply} + \frac{R_C}{R_E}V_{th} - \frac{R_C}{R_E}v_\text{in} = V_Q - \frac{R_C}{R_E}v_\text{in}\] \(V_Q\), as we discussed previously, is just the DC offset at the output, so the AC component of \(V_\text{out}\) is \[v_\text{out} = -\frac{R_C}{R_E}v_\text{in}\] To access just the AC component, you can simply use the AC coupling feature on the oscilloscope to remove the quiescent voltage from the measurement. However, in order to only send the AC component to a load, you will need to use a coupling capacitor to send the AC signal across while blocking the quiescent voltage. This circuit above is a "complete" common emitter amplifier.
- The resistors \(R_C\) and
- \(R_E\) set the AC voltage
- gain. The resistors \(R_1\)
- and \(R_2\) bias the
- transistor and set the quiescent voltage \(V_Q\). The input coupling
- capacitor \(C_\text{in}\)
- allows you to safely add \(v_\text{in}\) (the AC component of
- \(V_\text{in}\)) to the
- voltage set by the biasing network formed by \(R_1\) and \(R_2\). The decoupling capacitor
- provides a power reservoir and offsets the effects of the power
- supply’s series inductance. And finally the output coupling
- capacitor \(C_\text{out}\)
- blocks the DC offset (quiescent voltage) while passing the AC
- signal to the load \(R_L\). Notice that the output coupling capacitor and the load form
- a RC filter (like the ones we studied in lab 3). This circuit above is a "complete" common emitter amplifier. The resistors \(R_C\) and \(R_E\) set the AC voltage gain. The resistors \(R_1\) and \(R_2\) bias the transistor and set the quiescent voltage \(V_Q\). The input coupling capacitor \(C_\text{in}\) allows you to safely add \(v_\text{in}\) (the AC component of \(V_\text{in}\)) to the voltage set by the biasing network formed by \(R_1\) and \(R_2\). The decoupling capacitor provides a power reservoir and offsets the effects of the power supply’s series inductance. And finally the output coupling capacitor \(C_\text{out}\) blocks the DC offset (quiescent voltage) while passing the AC signal to the load \(R_L\). Notice that the output coupling capacitor and the load form a RC filter (like the ones we studied in lab 3). Is this a low pass or a high pass filter? Write an expression for the cutoff frequency of the
- filter. Explain, from the perspective of the filter, how the
- coupling capacitor "blocks" the quiescent voltage from getting
- to the load. Write an expression for the cutoff frequency of the filter. Explain, from the perspective of the filter, how the coupling capacitor "blocks" the quiescent voltage from getting to the load. Draw 7 in your lab notebook
- with the values used in the prelab. For example \(V_\text{supply}=15\text{ V}\),
- \(R_C=2.74\text{ k}\Omega\),
- \(R_E=1\text{ k}\Omega\), and
- \(R_2=10\text{ k}\Omega\). You
- found \(R_1\) in Question
- @3.1. For the
- capacitors, the exact value isn’t critical for the function of
- the amplifier, but \(47\
- \mu\text{F}\) is a good value for the decoupling
- capacitor and \(C_\text{out}\), and \(220\text{ nF}\) is a good value
- for \(C_\text{in}\). The load
- does not need a label because we will consider different loads
- in the lab. These will be the values you will use in the lab and to
- solve the remaining problems in the prelab. We have been considering the current-amplifier model, where
- we use \(I_C=h_{FE}I_B\) and
- treat the base-emitter junction like a diode to predict the
- behavior of the circuit. This is a good model, but for some
- applications, treating the transistor as a
- transconductance device is more informative and
- accurate. This is called the Ebers-Moll model, and in this
- model, the collector current \(I_C\) is determined by the
- base-emitter voltage \(V_{BE}\) (which in reality is
- nearly \(V_{th}\), but
- increases slightly as a function of \(I_B\)): \[I_C =
- I_S\bigg(e^{V_{BE}/V_T}-1\bigg)\] where \(I_S\) is the
- saturation current of the particular transistor (which is
- temperature dependant), \(V_T =
- k_BT/e=25.2\text{ mV}\) at room temperature \((\sim300\text{ K})\), \(k_B\) is Boltzmann’s constant, and
- \(e\) is the electron’s
- charge. For our purposes, the Ebers-Moll model modifies our
- current-amplifier model of the transistor in only one important
- way. For small variations about the quiescent point, the
- transistor now acts as if it has a small internal resistor,
- \(r_e\), in series with the
- emitter. The magnitude of the intrinsic emitter resistance,
- \(r_e\), depends on the
- collector current \(I_C\): \[r_e = 25\ \Omega
- \left(\frac{1\text{ mA}}{I_C}\right)\] The presence of the intrinsic emitter resistance, \(r_e\), modifies the above input
- impedances to: Draw 7 in your lab notebook with the values used in the prelab. For example \(V_\text{supply}=15\text{ V}\), \(R_C=2.74\text{ k}\Omega\), \(R_E=1\text{ k}\Omega\), and \(R_2=10\text{ k}\Omega\). You found \(R_1\) in Question 2.4.1. For the capacitors, the exact value isn’t critical for the function of the amplifier, but \(47\ \mu\text{F}\) is a good value for the decoupling capacitor and \(C_\text{out}\), and \(220\text{ nF}\) is a good value for \(C_\text{in}\). The load does not need a label because we will consider different loads in the lab. These will be the values you will use in the lab and to solve the remaining problems in the prelab. We have been considering the current-amplifier model, where we use \(I_C=h_{FE}I_B\) and treat the base-emitter junction like a diode to predict the behavior of the circuit. This is a good model, but for some applications, treating the transistor as a transconductance device is more informative and accurate. This is called the Ebers-Moll model, and in this model, the collector current \(I_C\) is determined by the base-emitter voltage \(V_{BE}\) (which in reality is nearly \(V_{th}\), but increases slightly as a function of \(I_B\)): \[I_C = I_S\bigg(e^{V_{BE}/V_T}-1\bigg)\] where \(I_S\) is the saturation current of the particular transistor (which is temperature dependant), \(V_T = k_BT/e=25.2\text{ mV}\) at room temperature \((\sim300\text{ K})\), \(k_B\) is Boltzmann’s constant, and \(e\) is the electron’s charge. For our purposes, the Ebers-Moll model modifies our current-amplifier model of the transistor in only one important way. For small variations about the quiescent point, the transistor now acts as if it has a small internal resistor, \(r_e\), in series with the emitter. The magnitude of the intrinsic emitter resistance, \(r_e\), depends on the collector current \(I_C\): \[r_e = 25\ \Omega \left(\frac{1\text{ mA}}{I_C}\right)\] The presence of the intrinsic emitter resistance, \(r_e\), modifies the above input impedances to: \[R_\text{in} = (R_e + r_e)\
- h_{FE}\] where \(R_e\) is the total
- impedance of the resistors connected between the emitter and
- ground. If this is only the resistor, \(R_E\), then \(R_e=R_E\). This is true for both
- the emitter follower and the common emitter amplifier.
- Note: With the biasing network, \(R_1\) and \(R_2\) will be in parallel with
- this for the true input impedance The output impedance of the emitter follower can then be
- shown to be \[R_\text{out} =
- \frac{R_B}{h_{FE}+1}+r_e\ \ \text{(EF)}\] The common emitter amplifier’s output impedance doesn’t
- change because it does not depend on the resistance past the
- emitter. However, it does modify the gain of the common emitter
- amplifier to: \[G =
- \frac{-R_C}{R_e+r_e}\] which shows that the common emitter gain is not infinite
- when the external emitter resistor goes to zero. For the following questions, use the component
- values in the circuit diagram you made. \[R_\text{in} = (R_e + r_e)\ h_{FE}\] where \(R_e\) is the total impedance of the resistors connected between the emitter and ground. If this is only the resistor, \(R_E\), then \(R_e=R_E\). This is true for both the emitter follower and the common emitter amplifier. Note: With the biasing network, \(R_1\) and \(R_2\) will be in parallel with this for the true input impedance The output impedance of the emitter follower can then be shown to be \[R_\text{out} = \frac{R_B}{h_{FE}+1}+r_e\ \ \text{(EF)}\] The common emitter amplifier’s output impedance doesn’t change because it does not depend on the resistance past the emitter. However, it does modify the gain of the common emitter amplifier to: \[G = \frac{-R_C}{R_e+r_e}\] which shows that the common emitter gain is not infinite when the external emitter resistor goes to zero. For the following questions, use the component values in the circuit diagram you made. Calculate the input impedance \(R_\text{in}\) of the circuit you
- designed. Don’t forget to consider the fact that the biasing
- resistors are in parallel with common emitter amplifier’s
- intrinsic input impedance. Calculate the input impedance \(R_\text{in}\) of the circuit you designed. Don’t forget to consider the fact that the biasing resistors are in parallel with common emitter amplifier’s intrinsic input impedance. What is the value of the output impedance? Calculate the fraction of the original amplitude
- obtained when a \(470\
- \Omega\) load is attached. HINT: the \(470\ \Omega\) resistor is in
- series with the output impedance of the circuit to ground. The
- output capacitor only blocks the DC component; it passes the AC
- signal just fine. Calculate the fraction of the original amplitude obtained when a \(470\ \Omega\) load is attached. HINT: the \(470\ \Omega\) resistor is in series with the output impedance of the circuit to ground. The output capacitor only blocks the DC component; it passes the AC signal just fine. A standard non-amplified speaker has an input impedance
- of \(8\ \Omega\). If your
- computer headphone jack had an output voltage at \(1\text{ V}\) unloaded and an
- output impedance of \(8\
- \Omega\), what would the loaded voltage be if you hooked
- it up to the \(8\ \Omega\)
- speaker? Now, instead you can use the common emitter to amplify
- the signal from the computer first. For the same \(1\text{ V}\) AC signal, what will
- the output voltage be. Consider both the AC voltage gain and
- the output impedance. A standard non-amplified speaker has an input impedance of \(8\ \Omega\). If your computer headphone jack had an output voltage at \(1\text{ V}\) unloaded and an output impedance of \(8\ \Omega\), what would the loaded voltage be if you hooked it up to the \(8\ \Omega\) speaker? Now, instead you can use the common emitter to amplify the signal from the computer first. For the same \(1\text{ V}\) AC signal, what will the output voltage be. Consider both the AC voltage gain and the output impedance. As you found above, the output impedance of the amplifier
- you designed is quite high and makes it impractical for driving
- small loads. Load impedances are often small; for example,
- speakers are typically \(4\
- \Omega\), \(6\
- \Omega\), or \(8\
- \Omega\). This makes \(R_L/(R_\text{out}+R_L)\approx0\).
- The emitter follower has a large input impedance, so it will
- not draw much current from amplifier, and therefore, barely any
- voltage will drop across the output impedance. The emitter
- follower, having a very small output impedance, will then be
- able to deliver the voltage to the load in a more practical
- way. As you found above, the output impedance of the amplifier you designed is quite high and makes it impractical for driving small loads. Load impedances are often small; for example, speakers are typically \(4\ \Omega\), \(6\ \Omega\), or \(8\ \Omega\). This makes \(R_L/(R_\text{out}+R_L)\approx0\). The emitter follower has a large input impedance, so it will not draw much current from amplifier, and therefore, barely any voltage will drop across the output impedance. The emitter follower, having a very small output impedance, will then be able to deliver the voltage to the load in a more practical way. Draw the dual stage amplifier in your lab notebook and label
- all the components. The first stage will have all the same
- values as the amplifier you designed above. Use \(820\ \Omega\) for the emitter
- resistor of the second stage. Draw the dual stage amplifier in your lab notebook and label all the components. The first stage will have all the same values as the amplifier you designed above. Use \(820\ \Omega\) for the emitter resistor of the second stage. What is the value of the input impedance of the second
- stage? The output impedance of the second stage depends on the
- impedance connected to the base. In this case, the output
- impedance of the first stage will be the impedance leading into
- the base. Calculate the output impedance of the
- circuit. Calculate the fraction of the output will make it to an
- \(8\ \Omega\) load. What is the value of the input impedance of the second stage? The output impedance of the second stage depends on the impedance connected to the base. In this case, the output impedance of the first stage will be the impedance leading into the base. Calculate the output impedance of the circuit. Calculate the fraction of the output will make it to an \(8\ \Omega\) load. What is the gain of this circuit? Please review the lab activities so that you’re better
- prepared when you arrive to your lab section. Please review the lab activities so that you’re better prepared when you arrive to your lab section. You can find more on BJTs in these recommended sources: Steck
- Sections 4.1, 4.2, 4.3, 4.4, 4.6, 4.6.1, 4.8, 4.9, and
- 4.11.3 Steck Sections 4.1, 4.2, 4.3, 4.4, 4.6, 4.6.1, 4.8, 4.9, and 4.11.3 Fischer-Cripps Chapters 5 and 6 Horowitz and Hill Chapter 2 (in both editions). There
- are sections on both the emitter follower and the common
- emitter amplifier, and a section on the Ebers-Moll model. It’s
- a long chapter, but it is worth thumbing through for your final
- project. Horowitz and Hill Chapter 2 (in both editions). There are sections on both the emitter follower and the common emitter amplifier, and a section on the Ebers-Moll model. It’s a long chapter, but it is worth thumbing through for your final project. First you will build the common emitter amplifier with the
- biasing network, but without an input voltage, to be able to
- measure the ‘static state’ of the amplifier. First you will build the common emitter amplifier with the biasing network, but without an input voltage, to be able to measure the ‘static state’ of the amplifier. Build the version of the common emitter amplifier shown
- in Figure 5 without the
- capacitors \(C_\text{in}\) and
- \(C_\text{out}\) (and without
- \(V_\text{in}\)). Measure the
- resistors before putting them in the circuit, and if they
- differ from the values used in your calculations, recalculate
- the predicted quiescent voltages. Draw the circuit schematic in
- your lab book and label all components. Measure the DC voltages (quiescent voltages) \(V_B\) (at the transistor base),
- \(V_E\) (at the emitter), and
- \(V_C\) (at the collector)? Do
- they agree with your predictions from your prelab? Build the version of the common emitter amplifier shown in Figure 5 without the capacitors \(C_\text{in}\) and \(C_\text{out}\) (and without \(V_\text{in}\)). Measure the resistors before putting them in the circuit, and if they differ from the values used in your calculations, recalculate the predicted quiescent voltages. Draw the circuit schematic in your lab book and label all components. Measure the DC voltages (quiescent voltages) \(V_B\) (at the transistor base), \(V_E\) (at the emitter), and \(V_C\) (at the collector)? Do they agree with your predictions from your prelab? Before you apply the input signal, consider the fact
- that the signal will cause the current draw from the power
- supply to fluctuate. This means we’ll need to use a capacitor
- to decouple the power supply. Use a \(47\ \mu\text{F}\) as a decoupling
- capacitor. You will need to place this capacitor with the
- correct orientation to avoid destroying it. DO NOT CONNECT THE FUNCTION GENERATOR DIRECTLY
- TO THE BASE OF THE BJT! Add the input coupling
- capacitor \(C_\text{in}\) and
- the input AC source \(V_\text{in}\) (and use the sync
- output to trigger the scope). The capacitor allows one to
- transmit an AC signal while maintaining the DC voltages
- established by the bias network. When you switch on the power,
- you may see high frequency spontaneous oscillations. These must
- be suppressed before you can proceed. Also, reducing the length
- of your circuit wires can help. Do not add \(C_\text{out}\) yet. Assemble a test setup to observe the input (before \(C_\text{in}\)) and output of the
- amplifier with \(10\text{
- kHz}\) sine waves. Check that your setup works, and you
- can measure both the input and output. For the scope channel connected to the output, switch
- the coupling between DC and AC coupling and adjust the scope to
- see the signal in both cases. Explain the different behavior
- and say why you may want one or the other. Which coupling mode should you use to determine the AC
- gain? Use that mode to determine the AC gain and compare it to
- your prediction. In order to determine the clipping, we want to know the
- absolute voltage that clipping occurs, this means we
- DO NOT WANT AC COUPLING on to determine this.
- Vary the input amplitude to determine the output amplitude at
- which clipping begins. Compare the clipping voltage to the
- prediction in the prelab. Describe why the \(V_\text{min}\) clipping is not
- flat. Check in with an instructor about the clipping
- behavior. Before you apply the input signal, consider the fact that the signal will cause the current draw from the power supply to fluctuate. This means we’ll need to use a capacitor to decouple the power supply. Use a \(47\ \mu\text{F}\) as a decoupling capacitor. You will need to place this capacitor with the correct orientation to avoid destroying it. DO NOT CONNECT THE FUNCTION GENERATOR DIRECTLY TO THE BASE OF THE BJT! Add the input coupling capacitor \(C_\text{in}\) and the input AC source \(V_\text{in}\) (and use the sync output to trigger the scope). The capacitor allows one to transmit an AC signal while maintaining the DC voltages established by the bias network. When you switch on the power, you may see high frequency spontaneous oscillations. These must be suppressed before you can proceed. Also, reducing the length of your circuit wires can help. Do not add \(C_\text{out}\) yet. Assemble a test setup to observe the input (before \(C_\text{in}\)) and output of the amplifier with \(10\text{ kHz}\) sine waves. Check that your setup works, and you can measure both the input and output. For the scope channel connected to the output, switch the coupling between DC and AC coupling and adjust the scope to see the signal in both cases. Explain the different behavior and say why you may want one or the other. Which coupling mode should you use to determine the AC gain? Use that mode to determine the AC gain and compare it to your prediction. In order to determine the clipping, we want to know the absolute voltage that clipping occurs, this means we DO NOT WANT AC COUPLING on to determine this. Vary the input amplitude to determine the output amplitude at which clipping begins. Compare the clipping voltage to the prediction in the prelab. Describe why the \(V_\text{min}\) clipping is not flat. Check in with an instructor about the clipping behavior. Add the output coupling capacitor \(C_\text{out}\) as you designed in
- the prelab. It will be polarized. Since the left side is
- connected to a positive DC voltage of \(V_C\) and the right side will be
- connected to ground through the scope, you should have the
- negative side (the one that is marked and has the shorter lead)
- on the right. Move your scope measurement to occur after \(C_\text{out}\). When you first
- turn it on, you may find that the output voltage has a large DC
- offset due to charging of the output coupling capacitor. This
- should discharge since the scope provides a \(1\text{ M}\Omega\) path to ground
- but if it doesn’t, you can add a \(220\text{ k}\Omega\) resistor to
- ground after \(C_\text{out}\).
- Check that the output now oscillates around \(0\text{ V}\) with the scope
- channel set to DC coupling. Measure the gain of the amplifier for \(10\text{ kHz}\) sine waves using
- an amplitude that ensures the voltages are less than half of
- the clipping voltage (either positive or negative). You should
- use the 10x scope probe for measuring the output. Does your
- measurement agree with your prediction? Screen shots here would
- be good. Add the output coupling capacitor \(C_\text{out}\) as you designed in the prelab. It will be polarized. Since the left side is connected to a positive DC voltage of \(V_C\) and the right side will be connected to ground through the scope, you should have the negative side (the one that is marked and has the shorter lead) on the right. Move your scope measurement to occur after \(C_\text{out}\). When you first turn it on, you may find that the output voltage has a large DC offset due to charging of the output coupling capacitor. This should discharge since the scope provides a \(1\text{ M}\Omega\) path to ground but if it doesn’t, you can add a \(220\text{ k}\Omega\) resistor to ground after \(C_\text{out}\). Check that the output now oscillates around \(0\text{ V}\) with the scope channel set to DC coupling. Measure the gain of the amplifier for \(10\text{ kHz}\) sine waves using an amplitude that ensures the voltages are less than half of the clipping voltage (either positive or negative). You should use the 10x scope probe for measuring the output. Does your measurement agree with your prediction? Screen shots here would be good. The common emitter amplifier often has a large output
- impedance. Connect a \(470\
- \Omega\) load from the output to ground. What fraction
- of the original output do you now see? Does this agree with
- your prediction from section? If not, can you use your
- measurements of the output voltage before and after the
- resistor was in place to refine the model of your amplifier’s
- output impedance? Remove the \(470\
- \Omega\) load resistor. Measure the impedance of your speaker with the
- DMM. Attach the speaker to your circuit board. Connect the
- black wire to ground and connect the red wire to a free row on
- the circuit board. Drive the speaker directly with the function
- generator output. You should hear a tone. Vary the frequency
- and amplitude to check the effect on the output of the speaker.
- Then setup the same amplitude that you used in the previous
- section and a frequency of \(1\text{
- kHz}\). Switch back to driving the common emitter amplifier
- circuit with the function generator and connect the speaker to
- the output, just like you did with the \(470\ \Omega\) load resistor.
- Describe the results of both speaker tests. Does the gain
- provided by the common emitter amplifier result in a louder
- tone from the speaker? Explain your results. The common emitter amplifier often has a large output impedance. Connect a \(470\ \Omega\) load from the output to ground. What fraction of the original output do you now see? Does this agree with your prediction from section? If not, can you use your measurements of the output voltage before and after the resistor was in place to refine the model of your amplifier’s output impedance? Remove the \(470\ \Omega\) load resistor. Measure the impedance of your speaker with the DMM. Attach the speaker to your circuit board. Connect the black wire to ground and connect the red wire to a free row on the circuit board. Drive the speaker directly with the function generator output. You should hear a tone. Vary the frequency and amplitude to check the effect on the output of the speaker. Then setup the same amplitude that you used in the previous section and a frequency of \(1\text{ kHz}\). Switch back to driving the common emitter amplifier circuit with the function generator and connect the speaker to the output, just like you did with the \(470\ \Omega\) load resistor. Describe the results of both speaker tests. Does the gain provided by the common emitter amplifier result in a louder tone from the speaker? Explain your results. Ordinarily, the quiescent voltage, is determined by a
- bias circuit (as was done for the common emitter stage). In the
- present case, the collector voltage \(V_C\) of the previous circuit
- already has a DC offset (the quiescent voltage of the first
- stage) suitable for biasing the emitter follower, so a direct
- DC connection can be made between the two circuits. Add the
- emitter follower to your circuit to build the dual stage
- amplifier as you drew in your lab notebook for the
- prelab. Using your measured resistor values, calculate the DC
- voltages for the emitter follower’s base, emitter, and
- collector. Measure the quiescent (DC) voltages (\(V_B\), \(V_E\), \(V_C\)) for the emitter follower
- part (you should disconnect the function generator from the
- circuit). Do the measurements agree with your predictions?
- Correct for/reconcile any errors before proceeding. Ordinarily, the quiescent voltage, is determined by a bias circuit (as was done for the common emitter stage). In the present case, the collector voltage \(V_C\) of the previous circuit already has a DC offset (the quiescent voltage of the first stage) suitable for biasing the emitter follower, so a direct DC connection can be made between the two circuits. Add the emitter follower to your circuit to build the dual stage amplifier as you drew in your lab notebook for the prelab. Using your measured resistor values, calculate the DC voltages for the emitter follower’s base, emitter, and collector. Measure the quiescent (DC) voltages (\(V_B\), \(V_E\), \(V_C\)) for the emitter follower part (you should disconnect the function generator from the circuit). Do the measurements agree with your predictions? Correct for/reconcile any errors before proceeding. The emitter follower amplifier should have a low output
- impedance. Connect a \(470\
- \Omega\) load from the output to ground. What fraction
- of the original output do you now see? Does this agree with
- your prelab predictions? If not, can you use your measurements
- of the output voltage before and after the resistor was in
- place to refine the model of your amplifier’s output
- impedance? Remove the load resistor and drive a speaker with the
- output of the amplifier. Explain how you hooked up the speaker.
- Drive your amplifier with the function generator. Describe your
- measurements and observations. Do they agree with your model of
- the output impedance of the dual stage amplifier? Compare your
- results with the output from just the common emitter amplifier.
- Do the results make sense? Next you will use your computer (or phone) to drive the
- speaker. Before doing this, remove the function generator from
- the circuit. Now drive your amplifier with the audio source
- (computer). Describe your measurements and observations. Do
- they agree with your model of the output impedance of the dual
- stage amplifier? The emitter follower amplifier should have a low output impedance. Connect a \(470\ \Omega\) load from the output to ground. What fraction of the original output do you now see? Does this agree with your prelab predictions? If not, can you use your measurements of the output voltage before and after the resistor was in place to refine the model of your amplifier’s output impedance? Remove the load resistor and drive a speaker with the output of the amplifier. Explain how you hooked up the speaker. Drive your amplifier with the function generator. Describe your measurements and observations. Do they agree with your model of the output impedance of the dual stage amplifier? Compare your results with the output from just the common emitter amplifier. Do the results make sense? Next you will use your computer (or phone) to drive the speaker. Before doing this, remove the function generator from the circuit. Now drive your amplifier with the audio source (computer). Describe your measurements and observations. Do they agree with your model of the output impedance of the dual stage amplifier? In this lab, we will gloss over the basics of digital
- electronics. You will utilize some of the most basic components
- that are used to build more complex circuits, like computers.
- You will learn to use logic gates, memory circuits, and digital
- clocks (a kind of oscillator), and you will learn how to
- combine gates and predict the behavior with Boolean
- algebra. This subject can easily span an entire semester, but we will
- just dip our toes in the water so that you will be equipped to
- employ some basic components into your final project if needed.
- The digital clock you will build in this lab, for example, has
- many applications. It is worth also investigating other
- kinds of oscillators for your project (if relevant). Duty cycle - percentage of time during one
- cycle that a system is active (+5V in the case of TTL digital
- logic) Truth-table - table that shows all possible
- input combinations and the resulting outputs of digital logic
- components Flip-flop- a circuit that has two stable
- states and can be used to store state information In almost all experiments in the physical sciences, the
- signals that represent physical quantities start out as
- analog waveforms. However, in the modern day, all our
- data eventually ends up on a computer (which is a digital
- circuit) to store and display. This requires analog-to-digital
- converters (ADC or A/D converter). There are plenty of
- commercially available ADCs that read voltages and connect to
- computers via USB, ethernet, RS-232, PCI, or PCIe; however,
- most instruments, such as the oscilloscope you use, have ADCs
- built in and communicate with a computer via USB, RS-232,
- ethernet, or GPIB. Scientists usually buy their data
- acquisition equipment rather than build it, so they usually
- don’t have to know too much about the digital circuitry that
- makes it work. In lab 5 you built a 3-bit digital-to-analog converter
- (DAC). Both DACs and ADCs have limited precision by the number
- of bits. A set of \(N\) bits
- has \(2^N\) possible different
- values. The precision will be determined by the range of value
- and the number of possible values. If you try to represent an
- analog voltage by \(7\) bits,
- your minimum uncertainty will be about \(1\%\) of the total range, since
- there are \(2^7 = 128\)
- possible combinations of \(7\)
- bits. For higher accuracy you need more bits. In this lab, we will gloss over the basics of digital electronics. You will utilize some of the most basic components that are used to build more complex circuits, like computers. You will learn to use logic gates, memory circuits, and digital clocks (a kind of oscillator), and you will learn how to combine gates and predict the behavior with Boolean algebra. This subject can easily span an entire semester, but we will just dip our toes in the water so that you will be equipped to employ some basic components into your final project if needed. The digital clock you will build in this lab, for example, has many applications. It is worth also investigating other kinds of oscillators for your project (if relevant). Duty cycle - percentage of time during one cycle that a system is active (+5V in the case of TTL digital logic) Truth-table - table that shows all possible input combinations and the resulting outputs of digital logic components Flip-flop- a circuit that has two stable states and can be used to store state information In almost all experiments in the physical sciences, the signals that represent physical quantities start out as analog waveforms. However, in the modern day, all our data eventually ends up on a computer (which is a digital circuit) to store and display. This requires analog-to-digital converters (ADC or A/D converter). There are plenty of commercially available ADCs that read voltages and connect to computers via USB, ethernet, RS-232, PCI, or PCIe; however, most instruments, such as the oscilloscope you use, have ADCs built in and communicate with a computer via USB, RS-232, ethernet, or GPIB. Scientists usually buy their data acquisition equipment rather than build it, so they usually don’t have to know too much about the digital circuitry that makes it work. In lab 5 you built a 3-bit digital-to-analog converter (DAC). Both DACs and ADCs have limited precision by the number of bits. A set of \(N\) bits has \(2^N\) possible different values. The precision will be determined by the range of value and the number of possible values. If you try to represent an analog voltage by \(7\) bits, your minimum uncertainty will be about \(1\%\) of the total range, since there are \(2^7 = 128\) possible combinations of \(7\) bits. For higher accuracy you need more bits. There are three key components of digital circuits: logic memory timing Transistors are the building blocks of all of these
- components, but both logic and memory can be exclusively made
- with gates. DEFINITION: Logic gates - a simple
- transistor circuit that implements some Boolean logic
- operation. In digital circuits, it is easier to abstract the discrete
- transistor circuits into gate circuits (similar to how we can
- treat an op-amp as a lumped element completely independent of
- the exact transistor layout that makes up the op-amp). In
- computers, gates are CMOS (where gates
- are designed with MOSFETs), but gates originated as TTL
- (where gates are made from BJTs). Most gates on DIP chips are
- still TTL (including the ones we will use in this lab). Gates can be used to construct arbitrary combinatorial logic
- (they can generate any truth-table), but to create a
- machine that steps through a sequence of instructions like a
- computer does, we also need memory and a
- clock. The fundamental single-bit memory element of
- digital electronics is called a flip-flop. We will
- study two types, called SR (or RS) and JK. Both of these can be
- built exclusively with gates (the ones we use are TTL). A
- digital clock is a repeating digital waveform used to
- step a digital circuit through a sequence of states. We will
- introduce the 555 timer chip and use it to generate a clock
- signal. Digital circuits that are able to step through a
- sequence of states with the aid of flip-flops and a clock are
- called sequential logic. The voltage in a digital circuit is allowed to be in only
- one of two states: HIGH or LOW. HIGH is taken to mean logical
- \((1)\) or logical TRUE. LOW
- is taken to mean logical \((0)\) or logical FALSE. In the TTL
- logic family (see Figure 1), the
- “ideal” HIGH and LOW voltage levels are \(5\text{ V}\) and \(0\text{ V}\), respectively, but
- any input voltage in the range of \(2–5\text{ V}\) is interpreted as
- HIGH, and any input voltage in the range of \(0–0.8\text{ V}\) as LOW. Voltages
- outside this range are undefined, and therefore “illegal,”
- except if they occur briefly during transitions. If the input
- to a TTL circuit is a voltage in this undefined range, the
- response is unpredictable, with the circuit sometimes
- interpreting it as a \(“1”\)
- and sometimes as a \(“0.”\)
- Avoid sending voltages in the undefined range into TTL
- components. Transistors are the building blocks of all of these components, but both logic and memory can be exclusively made with gates. DEFINITION: Logic gates - a simple transistor circuit that implements some Boolean logic operation. In digital circuits, it is easier to abstract the discrete transistor circuits into gate circuits (similar to how we can treat an op-amp as a lumped element completely independent of the exact transistor layout that makes up the op-amp). In computers, gates are CMOS (where gates are designed with MOSFETs), but gates originated as TTL (where gates are made from BJTs). Most gates on DIP chips are still TTL (including the ones we will use in this lab). Gates can be used to construct arbitrary combinatorial logic (they can generate any truth-table), but to create a machine that steps through a sequence of instructions like a computer does, we also need memory and a clock. The fundamental single-bit memory element of digital electronics is called a flip-flop. We will study two types, called SR (or RS) and JK. Both of these can be built exclusively with gates (the ones we use are TTL). A digital clock is a repeating digital waveform used to step a digital circuit through a sequence of states. We will introduce the 555 timer chip and use it to generate a clock signal. Digital circuits that are able to step through a sequence of states with the aid of flip-flops and a clock are called sequential logic. The voltage in a digital circuit is allowed to be in only one of two states: HIGH or LOW. HIGH is taken to mean logical \((1)\) or logical TRUE. LOW is taken to mean logical \((0)\) or logical FALSE. In the TTL logic family (see Figure 1), the “ideal” HIGH and LOW voltage levels are \(5\text{ V}\) and \(0\text{ V}\), respectively, but any input voltage in the range of \(2–5\text{ V}\) is interpreted as HIGH, and any input voltage in the range of \(0–0.8\text{ V}\) as LOW. Voltages outside this range are undefined, and therefore “illegal,” except if they occur briefly during transitions. If the input to a TTL circuit is a voltage in this undefined range, the response is unpredictable, with the circuit sometimes interpreting it as a \(“1”\) and sometimes as a \(“0.”\) Avoid sending voltages in the undefined range into TTL components. The flow of digital signals is controlled by transistors in
- various configurations depending on the logic family (we
- mentioned CMOS and TTL above). For most purposes, we can
- imagine that the logic gates are composed of several ideal
- switches with just two states: OPEN and CLOSED. The state of a
- switch is controlled by a digital signal. The switch remains
- closed so long as a logical \((1)\) signal is applied. A logical
- \((0)\) control signal keeps
- it open. Logic signals interact by means of gates. The three
- fundamental gates, AND, OR, and NOT, are named after the three
- fundamental operations of logic that they carry out. The AND
- and OR gates each have two inputs and one output. The output
- state is determined by the states of the two inputs. The NOT
- gate has one input and one output. The function of each gate is defined by a truth table, which
- specifies the output state for every possible combination of
- input states. The output values of the truth tables can be
- understood in terms of two switches. If the switches are in
- series, you get the AND function. Parallel switches perform the
- OR operation. The most common gates are shown in Figure 2 and Figure 3. A small circle after a gate or at
- an input indicates negation (NOT). The flow of digital signals is controlled by transistors in various configurations depending on the logic family (we mentioned CMOS and TTL above). For most purposes, we can imagine that the logic gates are composed of several ideal switches with just two states: OPEN and CLOSED. The state of a switch is controlled by a digital signal. The switch remains closed so long as a logical \((1)\) signal is applied. A logical \((0)\) control signal keeps it open. Logic signals interact by means of gates. The three fundamental gates, AND, OR, and NOT, are named after the three fundamental operations of logic that they carry out. The AND and OR gates each have two inputs and one output. The output state is determined by the states of the two inputs. The NOT gate has one input and one output. The function of each gate is defined by a truth table, which specifies the output state for every possible combination of input states. The output values of the truth tables can be understood in terms of two switches. If the switches are in series, you get the AND function. Parallel switches perform the OR operation. The most common gates are shown in Figure 2 and Figure 3. A small circle after a gate or at an input indicates negation (NOT). Read Section 6.2 of the lab
- thoroughly and enter in your lab notebook the circuit diagrams
- (symbols) and truth tables of all the circuits that you will
- test: NAND, NOR, NOT (INVERT), and XOR (EXCLUSIVE OR). Read through the appendix. Design a circuit to perform
- the XOR function using only NAND gates or only NOR gates.
- Simplify the circuit so that you use the smallest possible
- number of gates. Prove that your circuit is equivalent to the XOR using
- the truth tables or with Boolean algebra. Read Section 6.2 of the lab thoroughly and enter in your lab notebook the circuit diagrams (symbols) and truth tables of all the circuits that you will test: NAND, NOR, NOT (INVERT), and XOR (EXCLUSIVE OR). Read through the appendix. Design a circuit to perform the XOR function using only NAND gates or only NOR gates. Simplify the circuit so that you use the smallest possible number of gates. Prove that your circuit is equivalent to the XOR using the truth tables or with Boolean algebra. In sequential logic circuits, the output depends upon
- previous values of the input signals as well as their
- present-time values. Such circuits necessarily include memory
- elements that store the logic values of the earlier signals.
- The fundamental memory circuit is the RS memory element. The JK
- flip-flop has an RS flip-flop at its core, but it adds
- circuitry that synchronizes output transitions to a clock
- signal. Timing control by a clock is essential to most complex
- sequential circuits. In sequential logic circuits, the output depends upon previous values of the input signals as well as their present-time values. Such circuits necessarily include memory elements that store the logic values of the earlier signals. The fundamental memory circuit is the RS memory element. The JK flip-flop has an RS flip-flop at its core, but it adds circuitry that synchronizes output transitions to a clock signal. Timing control by a clock is essential to most complex sequential circuits. RS memory circuit The truth table for the RS memory element shows how the
- circuit remembers. Suppose it starts in a state with \(Q=0\) and \(R=S=0\). A positive pulse \(S\) at the input sets it into the
- state \(Q=1\), where it
- remains after \(S\) returns to
- zero. A later pulse \(R\) on
- the other input resets the circuit to \(Q=0\), where it remains until the
- next \(S\) pulse. The truth table for the RS memory element shows how the circuit remembers. Suppose it starts in a state with \(Q=0\) and \(R=S=0\). A positive pulse \(S\) at the input sets it into the state \(Q=1\), where it remains after \(S\) returns to zero. A later pulse \(R\) on the other input resets the circuit to \(Q=0\), where it remains until the next \(S\) pulse. JK flip-flop (TTL74107) There are three kinds of inputs to the JK flip-flop: There are two outputs: \(Q\) and it’s complement \(\bar{Q}\) (not \(Q\)). The index \(n\) counts the
- number of clock pulses since the start of the experiment. In
- the absence of a clock pulse, the output remains unchanged at
- the previously acquired value, \(Q_n\), which is independent of the
- present-time data inputs \(J\)
- and \(K\). Only on the arrival
- of a clock pulse, $, can the output change to a new value,
- \(Q_{n+1}\). The value of
- \(Q_n\) depends on the \(J\) and \(K\) inputs in the way specified in
- the truth table. The change occurs at the falling (trailing)
- edge of the clock pulse, indicated by a downward arrow in the
- truth table in Figure 5. The
- direct input, \(\text{CLR}\),
- overrides the clock and data inputs. During normal operation,
- \(\text{CLR} = 1\). At the
- moment \(\text{CLR}\) goes to
- zero, the output goes to zero and remains there as long as
- \(\text{CLR} = 0\). There are two outputs: \(Q\) and it’s complement \(\bar{Q}\) (not \(Q\)). The index \(n\) counts the number of clock pulses since the start of the experiment. In the absence of a clock pulse, the output remains unchanged at the previously acquired value, \(Q_n\), which is independent of the present-time data inputs \(J\) and \(K\). Only on the arrival of a clock pulse, $, can the output change to a new value, \(Q_{n+1}\). The value of \(Q_n\) depends on the \(J\) and \(K\) inputs in the way specified in the truth table. The change occurs at the falling (trailing) edge of the clock pulse, indicated by a downward arrow in the truth table in Figure 5. The direct input, \(\text{CLR}\), overrides the clock and data inputs. During normal operation, \(\text{CLR} = 1\). At the moment \(\text{CLR}\) goes to zero, the output goes to zero and remains there as long as \(\text{CLR} = 0\). READ Steck
- section 15.1 and 15.1.1. Figure 6 shows the circuit for
- generating a clock with the 555 and summarizes the formulas
- relating the resistor and capacitor values to the output low
- time T1 and the output high time T2. Much more information is
- available in Steck
- section 15.1.2. READ Steck section 15.1 and 15.1.1. Figure 6 shows the circuit for generating a clock with the 555 and summarizes the formulas relating the resistor and capacitor values to the output low time T1 and the output high time T2. Much more information is available in Steck section 15.1.2. Design a \(4\text{
- kHz}\) clock using the 555-timer chip. Make the low
- level \(1/4\) of the output
- period (a \(75\%\) duty cycle:
- \(25\%\) low, \(75\%\) high). How large a capacitor would you need to substitute in
- order to modify your clock to run at \(2\text{ Hz}\) (e.g. for visual
- observation of LEDs), keeping all other components
- fixed? Design a \(4\text{ kHz}\) clock using the 555-timer chip. Make the low level \(1/4\) of the output period (a \(75\%\) duty cycle: \(25\%\) low, \(75\%\) high). How large a capacitor would you need to substitute in order to modify your clock to run at \(2\text{ Hz}\) (e.g. for visual observation of LEDs), keeping all other components fixed? Please review the lab activities so that you’re better
- prepared when you arrive to your lab section. You can find more on digital circuits in these recommended
- sources: Please review the lab activities so that you’re better prepared when you arrive to your lab section. You can find more on digital circuits in these recommended sources: Steck
- Sections 9.1, 9.2, 9.3, 10.1, 10.2, 11.4, 13.1, 13.2, 15.1.1,
- 15.1.2 Steck Sections 9.1, 9.2, 9.3, 10.1, 10.2, 11.4, 13.1, 13.2, 15.1.1, 15.1.2 Fischer-Cripps Chapter 11 Horowitz and Hill 2nd Ed. Chapter 8 Horowitz and Hill 3rd Ed. Chapter 10 Each chip has a dot or notch to indicate the end where pins
- 1 and 14 are located. The pin numbers increase sequentially as
- you go counterclockwise around the chip viewed from above. In
- 74xx family logic chips, pin 7 is always grounded \((0\text{ V})\) and pin 14 is
- always connected to the \(+5\text{
- V}\) supply. You connect these to the breadboard the
- same way as the op-amp (across the groove in the middle of the
- breadboard). Decoupling capacitors for the power to these chips
- are not needed in steady state use of these chips, but it’s
- typically a good idea to use them when dealing with switching
- on/off states rapidly. Each chip has a dot or notch to indicate the end where pins 1 and 14 are located. The pin numbers increase sequentially as you go counterclockwise around the chip viewed from above. In 74xx family logic chips, pin 7 is always grounded \((0\text{ V})\) and pin 14 is always connected to the \(+5\text{ V}\) supply. You connect these to the breadboard the same way as the op-amp (across the groove in the middle of the breadboard). Decoupling capacitors for the power to these chips are not needed in steady state use of these chips, but it’s typically a good idea to use them when dealing with switching on/off states rapidly. Throughout this lab you will switch inputs between \(0\text{ V}\) and \(5\text{ V}\). This can be done by
- moving wires between two rails (one at ground and on at \(5\text{ V}\)); however, for the
- memory circuits, it can cause problems to leave an input
- floating for too long (the time it takes to move the wire). In
- these cases, it is crucial to use a switch to switch between
- these voltages. Throughout this lab you will switch inputs between \(0\text{ V}\) and \(5\text{ V}\). This can be done by moving wires between two rails (one at ground and on at \(5\text{ V}\)); however, for the memory circuits, it can cause problems to leave an input floating for too long (the time it takes to move the wire). In these cases, it is crucial to use a switch to switch between these voltages. The middle pin of a switch is connected to either of the
- other two of the pins depending on the position of the lever.
- Connect one outer pin of the switch to ground and the other to
- \(5\text{ V}\). Measure the middle pin with your DMM with respect to
- ground and confirm that the switch switches between the two
- desired voltages. The middle pin of a switch is connected to either of the other two of the pins depending on the position of the lever. Connect one outer pin of the switch to ground and the other to \(5\text{ V}\). Measure the middle pin with your DMM with respect to ground and confirm that the switch switches between the two desired voltages. The logic level of any state (input, output, or any
- intermediate state) using a light emitting diode (LED). When a
- state is \((1)\), \(5\text{ V}\) will be applied to
- one end, and the LED will light up, and when a state is \((0)\), there won’t be a voltage
- across the LED, so it won’t light up. This is a nice way to
- visualize what is happening in your circuit without needing to
- endless probe around with your DMM. You will likely want quite
- a bit of LEDs for this purpose, so you may want to use at least
- one 10-LED bank (MV57164). It can be nice to use individual
- LEDs (HLMP-C625) to be able to place each one physically where
- you want in the circuit. The logic level of any state (input, output, or any intermediate state) using a light emitting diode (LED). When a state is \((1)\), \(5\text{ V}\) will be applied to one end, and the LED will light up, and when a state is \((0)\), there won’t be a voltage across the LED, so it won’t light up. This is a nice way to visualize what is happening in your circuit without needing to endless probe around with your DMM. You will likely want quite a bit of LEDs for this purpose, so you may want to use at least one 10-LED bank (MV57164). It can be nice to use individual LEDs (HLMP-C625) to be able to place each one physically where you want in the circuit. To limit the amount of current though each diode, place
- a resistor in series with it. What value of resistor should you
- use to limit the current to \(20\text{ mA}\) (don’t forget that
- the LED has a voltage drop of about \(2\text{ V}\))? Record your
- calculation. Check that the LED lights up appropriately. If you
- don’t see light, try reversing the \(+5\text{ V}\) and ground
- connections. You can review Lab 6 for more information on
- LEDs. Connect an LED to the output of each switch and toggle
- them to confirm you can visualize the state of each switch.
- These switches can be used as the inputs for all the circuits
- you will build moving forward. You should use other LEDs to
- visualize output states of your circuits as well. To limit the amount of current though each diode, place a resistor in series with it. What value of resistor should you use to limit the current to \(20\text{ mA}\) (don’t forget that the LED has a voltage drop of about \(2\text{ V}\))? Record your calculation. Check that the LED lights up appropriately. If you don’t see light, try reversing the \(+5\text{ V}\) and ground connections. You can review Lab 6 for more information on LEDs. Connect an LED to the output of each switch and toggle them to confirm you can visualize the state of each switch. These switches can be used as the inputs for all the circuits you will build moving forward. You should use other LEDs to visualize output states of your circuits as well. Check your power supply before connecting to the circuit
- board. Often supplies have a fixed \(5\text{ V}\) output for powering
- TTL digital circuits. However, our supplies do not. Chose a
- channel to set to \(5\text{
- V}\). Input logical values can be set by connecting wires from
- the gate inputs to either \(0\text{
- V}\) (logical \(0\)) or
- \(+5\text{ V}\) (logical \(1\)). Use one long rail on your
- prototyping board for \(0\text{
- V}\) and one for \(+5\text{
- V}\). Note: Disconnecting an input from the
- \(+5\text{ V}\) rail is not
- the same as connecting it to \(0\text{ V}\). If it is
- disconnected, the input can float up to \(+5\text{ V}\) on its
- own. Configure an LED to observe the output of the circuit
- you are testing. Record the measured truth tables for the NAND (7400),
- NOR (7402), and INVERT (7404) gates, using the LED indicator
- for your measurements. Check your power supply before connecting to the circuit board. Often supplies have a fixed \(5\text{ V}\) output for powering TTL digital circuits. However, our supplies do not. Chose a channel to set to \(5\text{ V}\). Input logical values can be set by connecting wires from the gate inputs to either \(0\text{ V}\) (logical \(0\)) or \(+5\text{ V}\) (logical \(1\)). Use one long rail on your prototyping board for \(0\text{ V}\) and one for \(+5\text{ V}\). Note: Disconnecting an input from the \(+5\text{ V}\) rail is not the same as connecting it to \(0\text{ V}\). If it is disconnected, the input can float up to \(+5\text{ V}\) on its own. Configure an LED to observe the output of the circuit you are testing. Record the measured truth tables for the NAND (7400), NOR (7402), and INVERT (7404) gates, using the LED indicator for your measurements. Connect a NAND gate so that it performs the INVERT
- function. Do this for a NOR gate also. Connect a NAND gate so that it performs the INVERT function. Do this for a NOR gate also. Record your circuit and measured truth table. Verify the truth tables for an XOR chip (7486). Build and test the XOR circuit you designed using only
- NAND or only NOR gates in section 3.1.1.2. Build and test the XOR circuit you designed using only NAND or only NOR gates in section 3.1.1.2. Build an RS memory circuit from two NOR gates. Draw a
- schematic of your circuit. Demonstrate the memory property by going through a
- complete memory cycle: Set \((R = 0,\
- S = 1)\), Store \((0,\
- 0)\), Reset \((1,\
- 0)\), Store \((0,\
- 0)\), Set \((0,\ 1)\).
- Record all inputs and outputs for each cycle. You can determine
- the output by using one LED for each output or measuring the
- voltage of each output. Do your results agree with your
- predictions? Examine the effect of the “illegal” input \((R = 1,\ S = 1)\) for different
- initial states of the RS system. Describe the outcomes of the
- illegal operation. Build an RS memory circuit from two NOR gates. Draw a schematic of your circuit. Demonstrate the memory property by going through a complete memory cycle: Set \((R = 0,\ S = 1)\), Store \((0,\ 0)\), Reset \((1,\ 0)\), Store \((0,\ 0)\), Set \((0,\ 1)\). Record all inputs and outputs for each cycle. You can determine the output by using one LED for each output or measuring the voltage of each output. Do your results agree with your predictions? Examine the effect of the “illegal” input \((R = 1,\ S = 1)\) for different initial states of the RS system. Describe the outcomes of the illegal operation. Build the \(\sim4\text{
- kHz}\) digital clock using a 555 Timer according to your
- design in section 3.3.1.1. Measure
- the frequency, the pulse length (time the output is high), the
- duty cycle, and the nominal \(5\text{
- V}\) amplitude. Include a screen shot showing the
- results. Do your measurements agree with your predictions using
- the measured values of your components? Check that a suitable large capacitor placed in parallel
- with the existing one converts the clock to \(2\text{ Hz}\). Build the \(\sim4\text{ kHz}\) digital clock using a 555 Timer according to your design in section 3.3.1.1. Measure the frequency, the pulse length (time the output is high), the duty cycle, and the nominal \(5\text{ V}\) amplitude. Include a screen shot showing the results. Do your measurements agree with your predictions using the measured values of your components? Check that a suitable large capacitor placed in parallel with the existing one converts the clock to \(2\text{ Hz}\). Test a JK flip-flop by constructing a truth table
- utilizing different inputs for \(J\) and \(K\) and creating a clock
- transition by switching the voltage from \(0\text{ V}\) to \(5\text{ V}\) to \(0\text{ V}\). This is a perfect
- opportunity to use the switch on the front panel of your setup.
- Connect LEDs to both outputs to record your data. Since the
- output depends upon the previous state, \(Q_n\), you will need to tabulate
- \(Q_{n+1}\) for both possible
- previous states, \(Q_n=0\) and
- \(Q_n=1\). You should add an
- additional column, \(Q_{n+2}\), to get a better feel
- for the behavior of the flip-flop. Set \(\text{CLR} = 1\)
- and \(J = K = 1\). Now drive
- the clock input of the flip-flop with \(4\text{ kHz}\) pulses from your
- clock circuit. Use the oscilloscope to measure the clock input
- and the output, \(Q\), of the
- flip-flop. You may find Figure 8
- helpful to setup this part. Record your measurements and
- compare with your prediction from section 3.2.1. Include a screen shot showing
- the results. Do the same test with \(J = K
- = 0\) and record what happens. Test a JK flip-flop by constructing a truth table utilizing different inputs for \(J\) and \(K\) and creating a clock transition by switching the voltage from \(0\text{ V}\) to \(5\text{ V}\) to \(0\text{ V}\). This is a perfect opportunity to use the switch on the front panel of your setup. Connect LEDs to both outputs to record your data. Since the output depends upon the previous state, \(Q_n\), you will need to tabulate \(Q_{n+1}\) for both possible previous states, \(Q_n=0\) and \(Q_n=1\). You should add an additional column, \(Q_{n+2}\), to get a better feel for the behavior of the flip-flop. Set \(\text{CLR} = 1\) and \(J = K = 1\). Now drive the clock input of the flip-flop with \(4\text{ kHz}\) pulses from your clock circuit. Use the oscilloscope to measure the clock input and the output, \(Q\), of the flip-flop. You may find Figure 8 helpful to setup this part. Record your measurements and compare with your prediction from section 3.2.1. Include a screen shot showing the results. Do the same test with \(J = K = 0\) and record what happens. We imagine a logical variable, \(A\), that takes on the values
- \(0\) or \(1\). If \(A = 0\) then \(\bar{A} = 1\) and if \(A = 1\) then \(\bar{A}=0\) . Here are some
- obvious identities using the AND, OR and NOT operations.
- Looking at these identities you can see why the ‘plus’ \((+)\) symbol was chosen for OR and
- ‘times’ \((\cdot)\) for
- AND. We imagine a logical variable, \(A\), that takes on the values \(0\) or \(1\). If \(A = 0\) then \(\bar{A} = 1\) and if \(A = 1\) then \(\bar{A}=0\) . Here are some obvious identities using the AND, OR and NOT operations. Looking at these identities you can see why the ‘plus’ \((+)\) symbol was chosen for OR and ‘times’ \((\cdot)\) for AND. Two Boolean expressions are equal if and only if their truth
- tables are identical. \[(A+B) + C = A +
- (B+C)\] Two Boolean expressions are equal if and only if their truth tables are identical. \[(A+B) + C = A + (B+C)\] \[(AB)C=A(BC)\] \[A(B+C)=AB+AC\] Related identities: \[(A+AB)=A\] \[(A+\bar{A}B)=A+B\] \[(A+B)\cdot (A+C) = (A+
- BC)\] \[\overline{A \cdot B\cdot
- \ldots} = \bar{A}+\bar{B}+\ldots\] \[\overline{A + B+ \ldots} =
- \bar{A}\cdot \bar{B}\cdot\ldots\] Each of the above equalities is a theorem that can be
- proved. Let’s do an example by directly comparing the truth
- tables for the left and right sides. We take on DeMorgan’s
- first theorem for two variables, \(\overline{AB}=\bar{A}+\bar{B}\): \[(A+B)\cdot (A+C) = (A+ BC)\] \[\overline{A \cdot B\cdot \ldots} = \bar{A}+\bar{B}+\ldots\] \[\overline{A + B+ \ldots} = \bar{A}\cdot \bar{B}\cdot\ldots\] Each of the above equalities is a theorem that can be proved. Let’s do an example by directly comparing the truth tables for the left and right sides. We take on DeMorgan’s first theorem for two variables, \(\overline{AB}=\bar{A}+\bar{B}\): The last columns of the truth tables are identical. Thus,
- the first theorem is proven for two variables. Boolean algebra can be used to simplify logical expressions
- and reduce the number of gates required in a circuit. In the
- figure below, we show two ways to implement the expression,
- \(Y=A+\bar{A}BC\). Direct implementation using NOT, NOR, and
- NAND The last columns of the truth tables are identical. Thus, the first theorem is proven for two variables. Boolean algebra can be used to simplify logical expressions and reduce the number of gates required in a circuit. In the figure below, we show two ways to implement the expression, \(Y=A+\bar{A}BC\). Direct implementation using NOT, NOR, and NAND You will install and learn the basics of using LTspice (a
- particular SPICE program) and simulate a voltage divider. You will install and learn the basics of using LTspice (a particular SPICE program) and simulate a voltage divider. Proficiency with: SPICE: A general purpose open source
- Simulation Program with Integrated Circuits Emphasis LTspice: A SPICE program developed by
- Linear Technology (now owned and maintained by Analog
- Devices) Installing LTspice: Download
- and install the LTspice simulation software. How to use LTspice: This
- tutorial video demonstrates basic functions of the program by
- simulating a voltage divider. It lasts about 12 minutes. If you
- have installed the program already, you can skip the
- installation part and watch starting from 2:30. This tutorial (and the following instructions) are based on
- the Windows version. For help with the Mac version, you should
- also review these two files: SPICE: A general purpose open source Simulation Program with Integrated Circuits Emphasis LTspice: A SPICE program developed by Linear Technology (now owned and maintained by Analog Devices) Installing LTspice: Download and install the LTspice simulation software. How to use LTspice: This tutorial video demonstrates basic functions of the program by simulating a voltage divider. It lasts about 12 minutes. If you have installed the program already, you can skip the installation part and watch starting from 2:30. This tutorial (and the following instructions) are based on the Windows version. For help with the Mac version, you should also review these two files: Something here Adjust the scale of y-axes of the graph and select which
- data to present as shown in the video for a good presentation
- of the simulation. Choose power dissipated in R1. Notice that the graph
- shows two values using the vertical axes on the left for one
- value and the vertical axes on the right for the other
- value. You can zoom in the graph by selecting an area with the
- mouse. You can select or deselect graphs using ‘Pick Visible
- Traces’ icon on the tool bar. Adjust the scale of y-axes of the graph and select which data to present as shown in the video for a good presentation of the simulation. Choose power dissipated in R1. Notice that the graph shows two values using the vertical axes on the left for one value and the vertical axes on the right for the other value. You can zoom in the graph by selecting an area with the mouse. You can select or deselect graphs using ‘Pick Visible Traces’ icon on the tool bar. Copy the image of the graph or circuit to clipboard
- using the option in the ‘Tools’ menu. This will copy an image
- of the active window within LTspice. Copy the result of the
- simulation showing the \(V_{out}\) and power at R1 and
- paste it into your lab notebook. On Mac, you can either do a
- screenshot or print to a PDF file. Verify that these results match what you find from
- calculations using Ohm’s Law (\(V =
- IR\)) and the power equation (\(P = IV = I^2 R = V^2 /R\)).
- Include your calculations in your lab notebook. Copy the image of the graph or circuit to clipboard using the option in the ‘Tools’ menu. This will copy an image of the active window within LTspice. Copy the result of the simulation showing the \(V_{out}\) and power at R1 and paste it into your lab notebook. On Mac, you can either do a screenshot or print to a PDF file. Verify that these results match what you find from calculations using Ohm’s Law (\(V = IR\)) and the power equation (\(P = IV = I^2 R = V^2 /R\)). Include your calculations in your lab notebook. Repeat the steps above for Case 2 an Case 3. You don’t need
- to do the calculations for Case 3. Save the circuit file with an appropriate descriptive
- filename. The default extension of the saved file is .asc when
- the circuit window is selected. Upload the .asc file to
- Canvas. Write a short conclusion paragraph about this activity.
- Combine this conclusion with your log of the steps above (a
- scan of your lab notebook), including snapshot circuits and
- result plots from LTspice, and save as a PDF and submit to
- Canvas. Repeat the steps above for Case 2 an Case 3. You don’t need to do the calculations for Case 3. Save the circuit file with an appropriate descriptive filename. The default extension of the saved file is .asc when the circuit window is selected. Upload the .asc file to Canvas. Write a short conclusion paragraph about this activity. Combine this conclusion with your log of the steps above (a scan of your lab notebook), including snapshot circuits and result plots from LTspice, and save as a PDF and submit to Canvas. Prelabs are essential activities designed to prepare you for
- the lab activities. They are due before the lab (see Canvas for
- the due dates), and are graded on completion. However,
- correctness is essential for being able to complete the labs
- correctly. It is recommended to corroborate with peers and/or
- come to office hours to ensure your prelabs are done correctly
- and you are properly prepared for lab. You will be asked to perform calculations in the prelab
- using predetermined or given values. For example, you may be
- asked to calculate the parallel resistance of 2 resistors \[\frac{1}{R_\text{total}} =
- \frac{1}{R_1}+\frac{1}{R_2}\] using \(50\ \Omega\) and
- \(100\ \Omega\). When you get
- to lab and grab those resistors, you will measure them and they
- could be something like \(50.5\
- \Omega\) and \(98.4\
- \Omega\). It will save you time to write your
- calculations as functions (in Python, Mathematica, etc.) so
- that you can re-call the function with updated input
- values. Prelabs are essential activities designed to prepare you for the lab activities. They are due before the lab (see Canvas for the due dates), and are graded on completion. However, correctness is essential for being able to complete the labs correctly. It is recommended to corroborate with peers and/or come to office hours to ensure your prelabs are done correctly and you are properly prepared for lab. You will be asked to perform calculations in the prelab using predetermined or given values. For example, you may be asked to calculate the parallel resistance of 2 resistors \[\frac{1}{R_\text{total}} = \frac{1}{R_1}+\frac{1}{R_2}\] using \(50\ \Omega\) and \(100\ \Omega\). When you get to lab and grab those resistors, you will measure them and they could be something like \(50.5\ \Omega\) and \(98.4\ \Omega\). It will save you time to write your calculations as functions (in Python, Mathematica, etc.) so that you can re-call the function with updated input values. For example (in Python) instead of You should This way you can re-call the function later in the lab with
- the updated values without copy-pasting a bunch of code and
- editing it (this is very bad practice). Many of the functions you build could be used several times
- throughout the course. The A decent way to make it easy to access all your functions is
- to make a In If you make a directory called “images” in your working
- directory, and place all your images in there, you can call This way you can re-call the function later in the lab with the updated values without copy-pasting a bunch of code and editing it (this is very bad practice). Many of the functions you build could be used several times throughout the course. The A decent way to make it easy to access all your functions is to make a In If you make a directory called “images” in your working directory, and place all your images in there, you can call If you’re having trouble exporting to PDF (I did), you can
- export to HTML and then convert the HTML to PDF with an online
- tool like Cloud
- Convert. If you’re having trouble exporting to PDF (I did), you can export to HTML and then convert the HTML to PDF with an online tool like Cloud Convert.4 More identities
+ 4 More identities
\[\begin{split}
\cos{x} &= \frac{e^{jx}+e^{jx}}{2}\\
@@ -251,66 +133,38 @@
-
5 Practice Problems
+ 5 Practice Problems
-
-
-
-
-
- Lab 4 - Operational Amplifiers (OP-Amps)
-I
+ Lab 4 - Operational Amplifiers (OP-Amps) I
Contents
- 1 Goals
- 1 Goals
+
- 
-
+
-
-
2 Prelab
- 2.1 Op-amps
+ 2 Prelab
+ 2.1 Op-amps
-
- 2.2 Open Loop Gain
+ 2.2 Open Loop Gain
- 
-
+ 2.2.1 Prelab Question
- 2.3 Input impedance
- 2.3.1 Prelab Question
- 2.4 Output current
- 2.4.1 Prelab Question
- 2.5 Intro to negative
- feedback
- 2.5.1 Prelab Question
- 2.5.2 Prelab Question
- 2.2.1 Prelab Question
+ 2.3 Input impedance
+ 2.3.1 Prelab Question
+ 2.4 Output current
+ 2.4.1 Prelab Question
+ 2.5 Intro to negative feedback
+ 2.5.1 Prelab Question
+ 2.5.2 Prelab Question
+
-
- 2.6 Negative feedback
- continued
- 2.6 Negative feedback continued
+
- 
-
+ 2.6.1 Prelab Question
- 2.7 Non-Inverting
- Amplifier
- 2.6.1 Prelab Question
+ 2.7 Non-Inverting Amplifier
+
- 
-
+ 2.7.1 Prelab Question
- 2.7.2 Prelab Question
- 2.7.3 Prelab Question
- 2.7.1 Prelab Question
+ 2.7.2 Prelab Question
+ 2.7.3 Prelab Question
+
-
- 2.8 Input and Output
- Impedance of the Non-Inverting Amplifier
- 2.8.1 Prelab Question
- 2.8.2 Prelab Question
- 2.8 Input and Output Impedance of the Non-Inverting Amplifier
+ 2.8.1 Prelab Question
+ 2.8.2 Prelab Question
+
- 
-
+ 2.8.3 Prelab Question
- 2.9 Powering the
- op-amp
- 2.8.3 Prelab Question
+ 2.9 Powering the op-amp
+
- 
-
+
- 
-
+ 2.9.1 Prelab Question
- 2.9.2 Prelab Question
- 2.9.3 Prelab Question
+ 2.9.1 Prelab Question
+ 2.9.2 Prelab Question
+ 2.9.3 Prelab Question
-
-
+
-
-
-
+
-
-
+
-
-
+
-
- 2.10 Lab activities
- 2.10.1 Prelab
- Question
- 3 Op-amp TLDR
- 3.1 Golden Rules
- 2.10 Lab activities
+ 2.10.1 Prelab Question
+ 3 Op-amp TLDR
+ 3.1 Golden Rules
+
-
- 3.2 Definitions
+ 3.2 Definitions
4 Useful Readings
- 4 Useful Readings
+
-
- 5 IC Tips
- 5 IC Tips
+
-
+
-
-
-
-
-
6 Lab Activities
- 6.1 The Function Generator
- and Its Output Impedance.
+ 6 Lab Activities
+ 6.1 The Function Generator and Its Output Impedance.
- 6.2 Building an op-amp
- test circuit
- 6.2 Building an op-amp test circuit
+
- 
-
+
-
- 6.3 Voltage Buffer
+ 6.3 Voltage Buffer
- 
-
+
-
+
-
- 6.4 Non-Inverting
- Amplifier
+ 6.4 Non-Inverting Amplifier
-
+
-
- 6.4.1 Frequency
- limitations of the amplifier
+ 6.4.1 Frequency limitations of the amplifier
-
- 6.4.2 Output voltage
- limitations of the amplifier
+ 6.4.2 Output voltage limitations of the amplifier
-
- 6.4.3 Input impedance of
- the amplifier
+ 6.4.3 Input impedance of the amplifier
-
- 
-
+ 6.4.4 Output impedance of
- the amplifier
+ 6.4.4 Output impedance of the amplifier
-
diff --git a/_includes/lab5.html b/_includes/lab5.html
index 204f863..3f8bf32 100644
--- a/_includes/lab5.html
+++ b/_includes/lab5.html
@@ -3,8 +3,7 @@
-
+
Lab 5 - Operational Amplifiers (OP-Amps)
-II
+ Lab 5 - Operational Amplifiers (OP-Amps) II
Contents
- 1 Goals
- 1 Goals
+
-
-
-
-
-
- 2 Op-amp Review
- 2.1 Golden Rules
- 2 Op-amp Review
+ 2.1 Golden Rules
+
-
- 2.2 Definitions
- 3 Prelab
- 3.1 Inverting
- Amplifier
+ 2.2 Definitions
+ 3 Prelab
+ 3.1 Inverting Amplifier
- 
-
+
-
- 3.1.1 Prelab Question
- 3.2 Deriving the
- Closed-Loop Gain of the Inverting Amplifier
- 3.1.1 Prelab Question
+ 3.2 Deriving the Closed-Loop Gain of the Inverting Amplifier
+
- 
-
+ 3.2.1 Prelab Question
- 3.2.1 Prelab Question
+ 3.2.2 Prelab Question
- 3.2.3 Prelab Question
- 3.2.2 Prelab Question
+ 3.2.3 Prelab Question
+
-
- 3.3 The Input and Output
- Impedance of the Inverting Amplifier
- 3.3.1 Prelab Question
- 3.3 The Input and Output Impedance of the Inverting Amplifier
+ 3.3.1 Prelab Question
+
-
- 3.3.2 Prelab Question
+ 3.3.2 Prelab Question
- 
-
+
-
- 3.3.3 Prelab Question
- 3.3.4 Prelab Question
- 3.3.3 Prelab Question
+ 3.3.4 Prelab Question
+
-
-
3.4 Frequency Dependance
- of the Inverting Amplifier
- 3.4 Frequency Dependance of the Inverting Amplifier
+ 3.4.1 Prelab Question
- 3.5 Summing Amplifier
+ 3.4.1 Prelab Question
+ 3.5 Summing Amplifier
- 
-
+ 3.5.1 Prelab Question
- 3.5.1 Prelab Question
+ 3.5.2 Prelab Question
- 3.6 Integrator
+ 3.5.2 Prelab Question
+ 3.6 Integrator
- 
-
+ 3.6.1 Prelab Question
- 3.6.1 Prelab Question
+
-
-
- 3.7 Complex Analysis of
- the Integrator’s Gain
- 3.7 Complex Analysis of the Integrator’s Gain
+ 3.7.1 Prelab Question
+ 3.7.1 Prelab Question
3.8 Considerations for
- \(R\) and \(C\) selections for the
- integrator
- 3.8 Considerations for \(R\) and \(C\) selections for the integrator
+
-
-
-
+
- 
-
+ 3.8.1 Prelab Question
+ 3.8.1 Prelab Question
-
- 3.9 Lab activities
- 3.9.1 Prelab Question
- 4 Useful Readings
- 3.9 Lab activities
+ 3.9.1 Prelab Question
+ 4 Useful Readings
+
-
- 5 IC Tips
- 5 IC Tips
+
-
+
-
-
-
-
-
6 Lab activities
- 6.1 Inverting
- amplifier
+ 6 Lab activities
+ 6.1 Inverting amplifier
-
-
+
-
- 6.2 Summing Amplifier
- Application - Digital-to-Analog Conversion
+ 6.2 Summing Amplifier Application - Digital-to-Analog Conversion
-
-
-
6.3 Integrator
- Application
- 6.3 Integrator Application
+
- 6.4 The Differentiator
- Amplifier
- 6.4 The Differentiator Amplifier
+
-
diff --git a/_includes/lab6.html b/_includes/lab6.html
index cc08222..5cd1243 100644
--- a/_includes/lab6.html
+++ b/_includes/lab6.html
@@ -3,8 +3,7 @@
-
+
Lab 6 - Optical Communication Link
Contents
- 1 Goals
- 1 Goals
+
-
-
-
- 2 Definitions
- 3 Prelab
- 3.1 Diodes
- 2 Definitions
+ 3 Prelab
+ 3.1 Diodes
+
-
- 
-
+ 3.1.1 Prelab Question
+ 3.1.1 Prelab Question
-
- 3.1.2 Prelab Question
+ 3.1.2 Prelab Question
- 3.1.3 Prelab Question
+ 3.1.3 Prelab Question
-
+
-
-
-
- 3.2 Light emitting diode
- (LED)
- 3.2 Light emitting diode (LED)
+ 3.2.1 Prelab Question
- 3.3 PIN Photodiodes
+ 3.2.1 Prelab Question
+ 3.3 PIN Photodiodes
- 
-
+
- 
-
+ 3.3.1 Prelab Question
+ 3.3.1 Prelab Question
-
- 3.4 Current to Voltage
- Amplifier (Transimpedance Amplifier)
- 3.4 Current to Voltage Amplifier (Transimpedance Amplifier)
+
- 
-
+ 3.4.1 Prelab Question
- 3.4.2 Prelab Question
- 3.4.3 Prelab Question
- 3.4.1 Prelab Question
+ 3.4.2 Prelab Question
+ 3.4.3 Prelab Question
+
- 
-
+ 3.4.4 Prelab Question
- 3.4.5 Prelab Question
+ 3.4.4 Prelab Question
+ 3.4.5 Prelab Question
- 
-
+
-
- 3.5 Optical Communication
- Link
- 3.5 Optical Communication Link
+
- 
-
+ 3.5.1 Prelab Question
+ 3.5.1 Prelab Question
-
- 3.6 Lab activities
- 3.6.1 Prelab question
- 4 Useful Readings
- 3.6 Lab activities
+ 3.6.1 Prelab question
+ 4 Useful Readings
+
-
- 5 Lab Activities
- 5.1 Introducing
- Diodes
+ 5 Lab Activities
+ 5.1 Introducing Diodes
- 
-
+ 5.1.1 Determine the I-V
- characteristics for a silicon diode
+ 5.1.1 Determine the I-V characteristics for a silicon diode
-
- 5.1.2 Determine the I-V
- characteristics for a light emitting diode
+ 5.1.2 Determine the I-V characteristics for a light emitting diode
-
- 5.2 Photometer
- 5.2.1 Test the Op-Amp
+ 5.2 Photometer
+ 5.2.1 Test the Op-Amp
5.3 Test with Inverting
- Amplifier
+ 5.3 Test with Inverting Amplifier
-
-
-
5.4 Room Light
- Photometer
+ 5.4 Room Light Photometer
-
-
-
5.5 Optical Communication
- Link
- 5.5.1 LED emitter
+ 5.5 Optical Communication Link
+ 5.5.1 LED emitter
-
- 5.5.2 Measure the output
- of the LED with the photometer
+ 5.5.2 Measure the output of the LED with the photometer
- Appendix
- A: Some Related Concepts About Measuring Light
- Appendix A: Some Related Concepts About Measuring Light
+
- 
-
+ Appendix
- B: Light Output in Lumens for Various Light Sources
+ Appendix B: Light Output in Lumens for Various Light Sources
-
-
+
Light Output (lm)
diff --git a/_includes/lab7.html b/_includes/lab7.html
index 87d1960..511bfe1 100644
--- a/_includes/lab7.html
+++ b/_includes/lab7.html
@@ -3,8 +3,7 @@
-
+
Lab 7 - Transistors
Contents
- 1 Goals
- 1 Goals
+ 2 SPICE Activities
- 2.1 Intro to Bipolar
- Junction Transistors (BJT)
- 2 SPICE Activities
+ 2.1 Intro to Bipolar Junction Transistors (BJT)
+
- 
-
+ 2.1.1 Question
- 2.1.1 Question
+
-
- 2.2 Basic BJT
- Operation
- 2.2 Basic BJT Operation
+
- 
-
+ 2.2.1 Question
+ 2.2.1 Question
- 
-
+
-
- 2.2.2 Question
- 2.2.2 Question
+
-
-
-
- 2.2.3 Question
- 2.2.3 Question
+
-
-
-
- import numpy as np
-from pathlib import Path
-
-data_dir = Path("simulated_data")
-
-data_1V = np.loadtxt(data_dir / "ICvsVCE-data-1V.txt", skiprows=1)
-
-data_2V = np.loadtxt(data_dir / "ICvsVCE-data-2V.txt", skiprows=1)
-
-data_3V = np.loadtxt(data_dir / "ICvsVCE-data-3V.txt", skiprows=1)
-
-data_4V = np.loadtxt(data_dir / "ICvsVCE-data-4V.txt", skiprows=1)
-
-data_5V = np.loadtxt(data_dir / "ICvsVCE-data-5V.txt", skiprows=1)data_xV values will be numpy arrays with as
- many rows as data points in your data and 2 columns (the input
- voltage, and the corresponding collector currents). You can
- “slice” the collector voltages for each array with
- data_xV[:, 0] and you can “slice” the collector
- currents with data_xV[:, 1]. Plot all 5 of these
- on the same \(I_C\) vs \(V_{CE}\) plot with a legend
- labeling the \(V_\text{in}\)
- of each curve.2.2.4 Question
-
+
+ import numpy as np
+ from pathlib import Path
+
+ data_dir = Path("simulated_data")
+
+ data_1V = np.loadtxt(data_dir / "ICvsVCE-data-1V.txt", skiprows=1)
+
+ data_2V = np.loadtxt(data_dir / "ICvsVCE-data-2V.txt", skiprows=1)
+
+ data_3V = np.loadtxt(data_dir / "ICvsVCE-data-3V.txt", skiprows=1)
+
+ data_4V = np.loadtxt(data_dir / "ICvsVCE-data-4V.txt", skiprows=1)
+
+ data_5V = np.loadtxt(data_dir / "ICvsVCE-data-5V.txt", skiprows=1)
+ data_xV values will be numpy arrays with as many rows as data points in your data and 2 columns (the input voltage, and the corresponding collector currents). You can “slice” the collector voltages for each array with data_xV[:, 0] and you can “slice” the collector currents with data_xV[:, 1]. Plot all 5 of these on the same \(I_C\) vs \(V_{CE}\) plot with a legend labeling the \(V_\text{in}\) of each curve.2.2.4 Question
+
-
- 2.3 BJT Switch
- 2.3.1 Question
- 2.3 BJT Switch
+ 2.3.1 Question
+
-
- 2.4 PNPs
- 2.4 PNPs
+
- 
-
+ 2.4.1 Question
- 2.4.1 Question
+
-
-
-
-
-
- 2.5 Improving the
- Push-Pull Amplifier
- 2.5 Improving the Push-Pull Amplifier
+
- 
-
+ 2.5.1 Question
- 2.5.1 Question
+
-
-
-
-
- 2.6 FET Basics
- 2.6 FET Basics
+
- 
-
+
-
@@ -783,10 +285,8 @@
Type of control
- Current \((I_B)\)
- Voltage \((V_{GS})\)
+ Current \((I_B)\)
+ Voltage \((V_{GS})\)
Positive control
@@ -815,377 +315,131 @@
2.6.1 Question
- 2.6.1 Question
+
-
- 2.7 MOSFET Current-Voltage
- Relations
- 2.7 MOSFET Current-Voltage Relations
+
- 
-
+ 2.7.1 Question
- 2.7.1 Question
+
- 
-
+
-
-
- 2.7.2 Question
+ 2.7.2 Question
-
-
+ v_gs = np.array([2, 4, 6, 8])
-i_d = np.array([i0, i1, i2, i3])
+ v_gs = np.array([2, 4, 6, 8])
+ i_d = np.array([i0, i1, i2, i3])
+
+ def fitting_function_mosfet(V_GS, k):
- """
- :param V_GS: array of gate-source voltages
- :param k: device dependent constant
- :return: drain current
- """
- return k * V_GS ** 2
+ def fitting_function_mosfet(V_GS, k):
+ """
+ :param V_GS: array of gate-source voltages
+ :param k: device dependent constant
+ :return: drain current
+ """
+ return k * V_GS ** 2
+
-
- curve_fit function (Documentation
- can be found here). You can access this function with
- from scipy.optimize import curve_fit.curve_fit function (Documentation can be found here). You can access this function with from scipy.optimize import curve_fit.
- initial_guess = (1,) # the initial guess for fitting parameters.
-
-popt, pcov = curve_fit(fitting_function_mosfet, v_gs, i_d, initial_guess)initial_guess needs to be a
- tuple (or list) with \(n\)
- elements. popt will be a list with elements
- representing the results of the fit (so it will be \(n\)-long), and pcov
- is a covariance matrix (of size \(n\times n\)). The estimate of the
- error can be determined with
- perr = np.sqrt(np.diag(pcov)).
+
+ initial_guess = (1,) # the initial guess for fitting parameters.
+
+ popt, pcov = curve_fit(fitting_function_mosfet, v_gs, i_d, initial_guess)
+ initial_guess needs to be a tuple (or list) with \(n\) elements. popt will be a list with elements representing the results of the fit (so it will be \(n\)-long), and pcov is a covariance matrix (of size \(n\times n\)). The estimate of the error can be determined with perr = np.sqrt(np.diag(pcov)).
-
+ fig, ax = plt.subplots(1, 1, figsize=(4, 3))
-
-ax.scatter(v_gs, i_d, color='k', s=100)
-
-v_gs_fit = np.linspace(0, 10, 100)
-ax.plot(v_gs_fit, function(v_gs_fit, popt[0]), 'r')
-
-ax.set_xlabel("$V_{{GS}}$ (V)")
-ax.set_ylabel("$I_D$ (mA)")
-ax.set_title("$I_D = k(V_{{GS}}-V_{{th}})^2$")
-
-loc = (0, 850)
-ax.annotate(f"$(k={popt[0]:.4f} \pm {perr[0]:.4f})$", loc)
-
-fig.tight_layout()
+ fig, ax = plt.subplots(1, 1, figsize=(4, 3))
+
+ ax.scatter(v_gs, i_d, color='k', s=100)
+
+ v_gs_fit = np.linspace(0, 10, 100)
+ ax.plot(v_gs_fit, function(v_gs_fit, popt[0]), 'r')
+
+ ax.set_xlabel("$V_{{GS}}$ (V)")
+ ax.set_ylabel("$I_D$ (mA)")
+ ax.set_title("$I_D = k(V_{{GS}}-V_{{th}})^2$")
+
+ loc = (0, 850)
+ ax.annotate(f"$(k={popt[0]:.4f} \pm {perr[0]:.4f})$", loc)
+
+ fig.tight_layout()
+
-
- 4 in :.4f) so that the
- digits displayed are correct. As a refresher, there should only
- be one significant digit in the error (unless it starts with 1,
- then you can take two), and the number of digits past the
- decimal should match in both the parameter and the error.4 in :.4f) so that the digits displayed are correct. As a refresher, there should only be one significant digit in the error (unless it starts with 1, then you can take two), and the number of digits past the decimal should match in both the parameter and the error.2.8 A dial controlled
- current
+ 2.8 A dial controlled current
- 
-
+ 2.8.1 Question
- 2.8.1 Question
+
-
- v_ds = np.linspace(0, 10, 100) and plug this into
- your function to get the \(y\)-axis.v_ds = np.linspace(0, 10, 100) and plug this into your function to get the \(y\)-axis.2.8.2 Question
- 2.8.2 Question
+
-
- ax.ylim() to show
- the plot nicely.ax.ylim() to show the plot nicely.
-
- 2.9 Op-amp design
- 2.9 Op-amp design
+
-
- 2.9.1 Question
- 2.9.1 Question
+ 2.2.4 Prelab Question
- 2.2.4 Prelab Question
+
-
- 2.3 Common Emitter
- Amplifier
+ 2.3 Common Emitter Amplifier
- 
-
+ 2.3.1 Prelab Question
+ 2.3.1 Prelab Question
-
- 2.3.2 Prelab Question
+ 2.3.2 Prelab Question
-
-
-
- 2.3.3 Prelab Question
- 2.3.3 Prelab Question
+
-
- 2.3.4 Prelab Question
- 2.3.4 Prelab Question
+
-
- 2.4 Quiescent Voltage and
- Biasing a Transistor Amplifier
- 2.4 Quiescent Voltage and Biasing a Transistor Amplifier
+
- 
-
+ 2.4.1 Prelab Question
- 2.4.1 Prelab Question
+
-
- 2.4.2 Prelab Question
- 2.4.2 Prelab Question
+
-
- 2.5 Completing the Common
- Emitter Amplifier
- 2.5 Completing the Common Emitter Amplifier
+
- 
-
+
- 
-
+
- 
-
+ 2.5.1 Prelab Question
- 2.5.1 Prelab Question
+
- 2.5.2 Prelab Question
- 2.6 Ebers-Moll Model of a
- Bipolar Transistor
- 2.5.2 Prelab Question
+ 2.6 Ebers-Moll Model of a Bipolar Transistor
+ 2.6.1 Prelab Question
+ 2.6.1 Prelab Question
-
- 2.6.2 Prelab Question
+ 2.6.2 Prelab Question
-
- 2.7 Dual Stage
- amplifier
- 2.7 Dual Stage amplifier
+
- 
-
+ 2.7.1 Prelab Question
- 2.7.2 Prelab Question
+ 2.7.1 Prelab Question
+ 2.7.2 Prelab Question
-
- 2.8 Lab activities
- 2.8.1 Prelab Question
- 3 Useful Readings
+ 2.8 Lab activities
+ 2.8.1 Prelab Question
+ 3 Useful Readings
-
- 4 Lab activities
+ 4 Lab activities
- 
-
+ 4.1 Common Emitter
- Amplifier
- 4.1.1 Quiescent scale
- 4.1 Common Emitter Amplifier
+ 4.1.1 Quiescent scale
+
-
- 4.1.2 Check limits with AC
- signal
+ 4.1.2 Check limits with AC signal
-
- 4.1.3 Measuring the AC
- gain
+ 4.1.3 Measuring the AC gain
-
- 4.1.4 Output
- impedance
+ 4.1.4 Output impedance
-
- 4.2 Dual Stage
- Amplifier
- 4.2.1 Quiescent scale
+ 4.2 Dual Stage Amplifier
+ 4.2.1 Quiescent scale
-
- 4.2.2 Low frequency AC
- gain
+ 4.2.2 Low frequency AC gain
-
- 4.2.3 Output
- impedance
+ 4.2.3 Output impedance
-
diff --git a/_includes/lab9.html b/_includes/lab9.html
index cb2c853..1a08d93 100644
--- a/_includes/lab9.html
+++ b/_includes/lab9.html
@@ -3,8 +3,7 @@
-
+
Lab 9 - Digital Electronics: Logic and
-clocks
+ Lab 9 - Digital Electronics: Logic and clocks
Contents
- 1 Goals
- 1.1 Some Useful
- Definitions
- 2 Intro to Digital
- Circuits
- 1 Goals
+ 1.1 Some Useful Definitions
+ 2 Intro to Digital Circuits
+
-
- 
-
+ 3 Prelab
- 3.1 Digital Logic
- Gates
- 3 Prelab
+ 3.1 Digital Logic Gates
+
-
+
- 
-
+ 3.1.1 Prelab Question
+ 3.1.1 Prelab Question
-
- 3.2 Memory Elements and
- Flip-Flops
- 3.2 Memory Elements and Flip-Flops
+
-
+
-
-
- 
-
+ 3.2.1 Prelab Question
+ 3.2.1 Prelab Question
-
- 3.3 555 timer and digital
- clock
- 3.3 555 timer and digital clock
+
- 
-
+ 3.3.1 Prelab Question
+ 3.3.1 Prelab Question
-
- 3.4 Lab activities
- 3.4.1 Prelab Question
- 4 Useful Readings
- 3.4 Lab activities
+ 3.4.1 Prelab Question
+ 4 Useful Readings
+
-
- 5 Digital Logic Chip
- Pin-Outs
- 5 Digital Logic Chip Pin-Outs
+
- 
-
+ 6 Lab Activities
- 6.1 Switches
- 6 Lab Activities
+ 6.1 Switches
+
-
-
-
- 6.2 TTL Gates
- 6.2.1 Truth tables
+ 6.2 TTL Gates
+ 6.2.1 Truth tables
-
- 6.2.2 Modifying basic
- gates
+ 6.2.2 Modifying basic gates
-
- 6.2.3 Exclusice OR
+ 6.2.3 Exclusice OR
- 6.3 Sequential Logic
- 6.3.1 RS memory
- circuit
+ 6.3 Sequential Logic
+ 6.3.1 RS memory circuit
-
- 6.3.2 Digital clock with
- 555 timer
+ 6.3.2 Digital clock with 555 timer
-
- 6.3.3 JK flip-flop
+ 6.3.3 JK flip-flop
-
- 
-
+ 7 Appendix: Boolean
- Algebra
- 7.1 Fundamental laws
- 7 Appendix: Boolean Algebra
+ 7.1 Fundamental laws
+
-
+
-
@@ -731,39 +268,24 @@
7.2 Equality
- 7.3 Associative laws
- 7.2 Equality
+ 7.3 Associative laws
+ 7.4 Distributive laws
+ 7.4 Distributive laws
7.5 DeMorgan’s
- theorems
- 7.6 Example proof
- 7.5 DeMorgan’s theorems
+ 7.6 Example proof
+
-
+
@@ -802,7 +324,7 @@
-
+
-
@@ -845,23 +367,13 @@
7.7 Example of
- simplification
- 7.7 Example of simplification
+
diff --git a/_includes/ltspice.html b/_includes/ltspice.html
index 6df17c5..cc5d18a 100644
--- a/_includes/ltspice.html
+++ b/_includes/ltspice.html
@@ -3,8 +3,7 @@
-
+
-
+ Lab Skill Activity - Simulating Electronic
-Circuits
+ Lab Skill Activity - Simulating Electronic Circuits
Contents
- 1 Goals
- 1 Goals
+
-
2 Definitions
- 3 Preparation
- 2 Definitions
+ 3 Preparation
+
-
- 4 Simulating a Voltage
- Divider
+ 4 Simulating a Voltage Divider
4.1 Making the
- circuit
+ 4.1 Making the circuit
-
@@ -147,15 +89,13 @@
10V peak-to-peak with 0V DC offset, 1kHz, sine wave
-
Resistor 1 (\(\Omega\))
+ Resistor 1 (\(\Omega\))
1k
10k
10k
- Resistor 2 (\(\Omega\))
+ Resistor 2 (\(\Omega\))
1k
90k
90k
@@ -163,78 +103,36 @@
4.2 Running a simulation
- of the circuit
+ 4.2 Running a simulation of the circuit
-
-
4.3 Displaying the
- simulation graph
+ 4.3 Displaying the simulation graph
-
- 4.4 Copying the graph or
- circuit on the screen
+ 4.4 Copying the graph or circuit on the screen
-
- 4.5 Variation of the
- Simulation
- 4.6 Save your
- simulation
- 4.7 Summary
- 4.5 Variation of the Simulation
+ 4.6 Save your simulation
+ 4.7 Summary
+ Prelab Expectations and Recommendations
Contents
- 1 Modularize your
- work
- 1 Modularize your work
+
+ r = 1. / (1. / 50. + 1. / 100.)r = 1. / (1. / 50. + 1. / 100.)
- def parallel_r(r1, r2):
- return 1. / (1. / r1 + 1. / r2)
-
-print(parallel_r(50., 100.))1.1 Recycling
- functions
- parallel_r() function
- above is a great example of one you may use repeatedly..py script in the directory you will be
- working in. You can call it whatever you want, but for sake of
- example, here we will call it jlab.py.jlab.py you can write all your scripts, and
- then in your Jupyter notebooks, you can import and access your
- functions like this
- import jlab as jl
-
-print(jl.parallel_r(50.5, 98.4))2 Including
- images/scans
-
+ def parallel_r(r1, r2):
+ return 1. / (1. / r1 + 1. / r2)
+
+ print(parallel_r(50., 100.))1.1 Recycling functions
+ parallel_r() function above is a great example of one you may use repeatedly..py script in the directory you will be working in. You can call it whatever you want, but for sake of example, here we will call it jlab.py.jlab.py you can write all your scripts, and then in your Jupyter notebooks, you can import and access your functions like this
+ import jlab as jl
+
+ print(jl.parallel_r(50.5, 98.4))2 Including images/scans
+ 3 Exporting to PDF
- 
You can export to PDF directly
- through VS Code. Here’s
- some more info on setting up.3.1 HTML alternative
- 3 Exporting to PDF
+ You can export to PDF directly through VS Code. Here’s some more info on setting up.3.1 HTML alternative
+
