From d9e84c8bcf990f73e645fba61ae7684b50bfd5af Mon Sep 17 00:00:00 2001 From: TinyTapeoutBot <139130078+TinyTapeoutBot@users.noreply.github.com> Date: Mon, 6 Jan 2025 13:00:28 +0200 Subject: [PATCH] feat: update project tt_um_wokwi_419326042276877313 from urish/tt10-zero-one Commit: b000937553f3191d8af96f2ea7eb874cad893a86 Workflow: https://github.com/urish/tt10-zero-one/actions/runs/12630918243 --- .../tt_um_wokwi_419326042276877313/LICENSE | 201 + .../commit_id.json | 9 + .../docs/info.md | 20 + .../tt_um_wokwi_419326042276877313/info.yaml | 48 + .../stats/metrics.csv | 276 + .../stats/synthesis-stats.txt | 62 + .../tt_um_wokwi_419326042276877313.gds | Bin 0 -> 367520 bytes .../tt_um_wokwi_419326042276877313.lef | 460 ++ .../tt_um_wokwi_419326042276877313.v | 6535 +++++++++++++++++ .../wokwi-diagram.json | 129 + 10 files changed, 7740 insertions(+) create mode 100644 projects/tt_um_wokwi_419326042276877313/LICENSE create mode 100644 projects/tt_um_wokwi_419326042276877313/commit_id.json create mode 100644 projects/tt_um_wokwi_419326042276877313/docs/info.md create mode 100644 projects/tt_um_wokwi_419326042276877313/info.yaml create mode 100644 projects/tt_um_wokwi_419326042276877313/stats/metrics.csv create mode 100644 projects/tt_um_wokwi_419326042276877313/stats/synthesis-stats.txt create mode 100644 projects/tt_um_wokwi_419326042276877313/tt_um_wokwi_419326042276877313.gds create mode 100644 projects/tt_um_wokwi_419326042276877313/tt_um_wokwi_419326042276877313.lef create mode 100644 projects/tt_um_wokwi_419326042276877313/tt_um_wokwi_419326042276877313.v create mode 100644 projects/tt_um_wokwi_419326042276877313/wokwi-diagram.json diff --git a/projects/tt_um_wokwi_419326042276877313/LICENSE b/projects/tt_um_wokwi_419326042276877313/LICENSE new file mode 100644 index 0000000..261eeb9 --- /dev/null +++ b/projects/tt_um_wokwi_419326042276877313/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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A single tile is about 167x108 uM. + tiles: "1x1" # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2 + + +# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins. +pinout: + # Inputs + ui[0]: "one" + ui[1]: "" + ui[2]: "" + ui[3]: "" + ui[4]: "" + ui[5]: "" + ui[6]: "" + ui[7]: "" + + # Outputs + uo[0]: "seg_a" + uo[1]: "seg_b" + uo[2]: "seg_c" + uo[3]: "seg_d" + uo[4]: "seg_f" + uo[5]: "seg_g" + uo[6]: "seg_h" + uo[7]: "" + + # Bidirectional pins + uio[0]: "" + uio[1]: "" + uio[2]: "" + uio[3]: "" + uio[4]: "" + uio[5]: "" + uio[6]: "" + uio[7]: "" + +# Do not change! +yaml_version: 6 diff --git a/projects/tt_um_wokwi_419326042276877313/stats/metrics.csv b/projects/tt_um_wokwi_419326042276877313/stats/metrics.csv new file mode 100644 index 0000000..da0380e --- /dev/null +++ b/projects/tt_um_wokwi_419326042276877313/stats/metrics.csv @@ -0,0 +1,276 @@ +Metric,Value +design__lint_error__count,0 +design__lint_timing_construct__count,0 +design__lint_warning__count,0 +design__inferred_latch__count,0 +design__instance__count,251 +design__instance__area,384.118 +design__instance_unmapped__count,0 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0000000..17d5226 --- /dev/null +++ b/projects/tt_um_wokwi_419326042276877313/stats/synthesis-stats.txt @@ -0,0 +1,62 @@ +64. Printing statistics. + +=== not_cell === + + Number of wires: 2 + Number of wire bits: 2 + Number of public wires: 2 + Number of public wire bits: 2 + Number of ports: 2 + Number of port bits: 2 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1 + sky130_fd_sc_hd__inv_2 1 + + Chip area for module '\not_cell': 3.753600 + of which used for sequential elements: 0.000000 (0.00%) + +=== tt_um_wokwi_419326042276877313 === + + Number of wires: 9 + Number of wire bits: 44 + Number of public wires: 9 + Number of public wire bits: 44 + Number of ports: 8 + Number of port bits: 43 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 25 + not_cell 1 + sky130_fd_sc_hd__buf_2 4 + sky130_fd_sc_hd__conb_1 20 + + Area for cell type \not_cell is unknown! + + Chip area for module '\tt_um_wokwi_419326042276877313': 95.091200 + of which used for sequential elements: 0.000000 (0.00%) + +=== design hierarchy === + + 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