diff --git a/projects/tt_um_ssp_opamp/docs/info.md b/projects/tt_um_ssp_opamp/docs/info.md
index ab69e38..a1098c9 100644
--- a/projects/tt_um_ssp_opamp/docs/info.md
+++ b/projects/tt_um_ssp_opamp/docs/info.md
@@ -22,23 +22,34 @@ Miller Compensation involves using a capacitor between the output of the first s
 In the op-amp design submissions, **Amr Abdelrahman** and **Majid Sami** each presented their designs. The details of their submissions are as follows.
 
 #### (1) Design by Amr Abdelrahman
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 ![Opamp Schematic](pic_opamp_sch.png "Opamp Schematic")
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 ![Opamp Testbench](pic_opamp_testbench.png "Opamp Testbench")
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 ![Opamp Layout](pic_opamp_layout.png "Opamp Layout")
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 ![Opamp Simulation Specifications](pic_opamp_Specs.png "Opamp Simulation Specifications")
 
 #### (2) Design by Majid Sami
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 ![Opamp Schematic](pic1_opamp_sch.png "Opamp Schematic")
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 ![Opamp Testbench](pic1_opamp_testbench.png "Opamp Testbench")
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 ![Opamp Layout](pic1_opamp_layout.png "Opamp Layout")
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 ![Opamp Simulation Specifications](pic1_opamp_specs.png "Opamp Simulation Specifications")
 
 ### POR (Power On Reset) Circuit
 Power-on reset (POR) circuit ensures that electronic systems start up in a known, stable state by generating a reset signal when power is initially applied. This circuit detects when the power supply reaches a sufficient voltage level and holds the reset line active until the voltage stabilizes, preventing erratic behavior and data corruption. POR circuits are crucial in microcontrollers, consumer electronics, and industrial systems, as they guarantee reliable initialization and consistent performance, thereby enhancing system stability and functionality during power-up.The circuit designed without capacitor which yields 30% reduction of chip’s area compared to the conventional designs
 
 #### (3) Design by Khalid Alorayir
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 ![POR Schematic](pic_por_sch.png "POR Schematic")
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 ![POR Testbench](pic_por_testbench.png "POR Testbench")
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 ![POR Layout](pic_por_lay.png "POR Layout")
 
 ## How to test