From 142ac39459a28bc9dac781c471fc6ef23becfc64 Mon Sep 17 00:00:00 2001 From: Saptarshi Neogi Date: Sat, 22 Oct 2022 12:57:08 +0530 Subject: [PATCH] Update and rename Assignment_2.out to VTC of CMOS Inverter.out --- Assignment_2.out => VTC of CMOS Inverter.out | 5 ----- 1 file changed, 5 deletions(-) rename Assignment_2.out => VTC of CMOS Inverter.out (96%) diff --git a/Assignment_2.out b/VTC of CMOS Inverter.out similarity index 96% rename from Assignment_2.out rename to VTC of CMOS Inverter.out index 52abf9f..607be52 100644 --- a/Assignment_2.out +++ b/VTC of CMOS Inverter.out @@ -1,8 +1,3 @@ -* Key: 709e140a0113ab1df9a99d1553364809 -* T-Spice Demo 9.12 Simulation Sun Oct 09 20:24:07 2022 F:\IIT Dhanbad\1st Semester\Digital VLSI Lab\Day 1\Assignment_2.sp -* Command line: tspice -o "F:\IIT Dhanbad\1st Semester\Digital VLSI Lab\Day 1\Assignment_2.out" "F:\IIT Dhanbad\1st Semester\Digital VLSI Lab\Day 1\Assignment_2.sp" -* T-Spice Win32 Demo 9.12.20040112.04:26:10 -* Operating System: Windows NT/95 * Warning : Source perimeter (PS) is zero for MOSFET device M1 * Warning : Drain perimeter (PD) is zero for MOSFET device M1 * Warning : Source perimeter (PS) is zero for MOSFET device M2