diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 63305edfec3..4422b004100 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -602,6 +602,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
 	sun8i-v40-bananapi-m2-berry.dtb
 dtb-$(CONFIG_MACH_SUN8I_V3S) += \
 	sun8i-s3-pinecube.dtb \
+	sun8i-s3-olinuxino.dtb \
 	sun8i-v3s-licheepi-zero.dtb
 dtb-$(CONFIG_MACH_SUN50I_H5) += \
 	sun50i-h5-bananapi-m2-plus.dtb \
@@ -1000,7 +1001,9 @@ dtb-$(CONFIG_STM32MP15x) += \
 	stm32mp15xx-dhcom-drc02.dtb \
 	stm32mp15xx-dhcom-pdk2.dtb \
 	stm32mp15xx-dhcom-picoitx.dtb \
-	stm32mp15xx-dhcor-avenger96.dtb
+	stm32mp15xx-dhcor-avenger96.dtb \
+	stm32mp1-olinuxino-lime.dtb \
+	stm32mp1-olinuxino-som.dtb
 
 dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
 dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
diff --git a/arch/arm/dts/stm32mp1-olinuxino-lime-u-boot.dtsi b/arch/arm/dts/stm32mp1-olinuxino-lime-u-boot.dtsi
new file mode 100644
index 00000000000..a0d9a33f6dc
--- /dev/null
+++ b/arch/arm/dts/stm32mp1-olinuxino-lime-u-boot.dtsi
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright : STMicroelectronics 2018
+ */
+
+#include <dt-bindings/clock/stm32mp1-clksrc.h>
+#include "stm32mp15-u-boot.dtsi"
+#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
+
+/ {
+	aliases {
+		mmc0 = &sdmmc1;
+		usb0 = &usbotg_hs;
+	};
+	config {
+	};
+};
+
+&clk_hse {
+	st,digbypass;
+};
+
+&i2c4 {
+	u-boot,dm-pre-reloc;
+};
+
+&i2c4_pins_a {
+	u-boot,dm-pre-reloc;
+	pins {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+/*
+&pmic {
+	u-boot,dm-pre-reloc;
+};
+*/
+
+&rcc {
+	st,clksrc = <
+		CLK_MPU_PLL1P
+		CLK_AXI_PLL2P
+		CLK_MCU_PLL3P
+		CLK_PLL12_HSE
+		CLK_PLL3_HSE
+		CLK_PLL4_HSE
+		CLK_RTC_LSE
+		CLK_MCO1_DISABLED
+		CLK_MCO2_DISABLED
+	>;
+
+	st,clkdiv = <
+		1 /*MPU*/
+		0 /*AXI*/
+		0 /*MCU*/
+		1 /*APB1*/
+		1 /*APB2*/
+		1 /*APB3*/
+		1 /*APB4*/
+		2 /*APB5*/
+		23 /*RTC*/
+		0 /*MCO1*/
+		0 /*MCO2*/
+	>;
+
+	st,pkcs = <
+		CLK_CKPER_HSE
+		CLK_FMC_ACLK
+		CLK_QSPI_ACLK
+		CLK_ETH_PLL4P
+		CLK_SDMMC12_PLL4P
+		CLK_DSI_DSIPLL
+		CLK_STGEN_HSE
+		CLK_USBPHY_HSE
+		CLK_SPI2S1_PLL3Q
+		CLK_SPI2S23_PLL3Q
+		CLK_SPI45_HSI
+		CLK_SPI6_HSI
+		CLK_I2C46_HSI
+		CLK_SDMMC3_PLL4P
+		CLK_USBO_USBPHY
+		CLK_ADC_CKPER
+		CLK_CEC_LSE
+		CLK_I2C12_HSI
+		CLK_I2C35_HSI
+		CLK_UART1_HSI
+		CLK_UART24_HSI
+		CLK_UART35_HSI
+		CLK_UART6_HSI
+		CLK_UART78_HSI
+		CLK_SPDIF_PLL4P
+		CLK_FDCAN_PLL4R
+		CLK_SAI1_PLL3Q
+		CLK_SAI2_PLL3Q
+		CLK_SAI3_PLL3Q
+		CLK_SAI4_PLL3Q
+		CLK_RNG1_LSI
+		CLK_RNG2_LSI
+		CLK_LPTIM1_PCLK1
+		CLK_LPTIM23_PCLK3
+		CLK_LPTIM45_LSE
+	>;
+
+	/* VCO = 1300.0 MHz => P = 650 (CPU) */
+/*
+	pll1: st,pll@0 {
+		compatible = "st,stm32mp1-pll";
+		reg = <0>;
+		cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+		frac = < 0x800 >;
+		u-boot,dm-pre-reloc;
+	};
+*/
+
+	/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
+	pll2: st,pll@1 {
+		compatible = "st,stm32mp1-pll";
+		reg = <1>;
+		cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+		frac = < 0x1400 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+	pll3: st,pll@2 {
+		compatible = "st,stm32mp1-pll";
+		reg = <2>;
+		cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+		frac = < 0x1a04 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
+	pll4: st,pll@3 {
+		compatible = "st,stm32mp1-pll";
+		reg = <3>;
+		cfg = < 3 98 5 7 7 PQR(1,1,1) >;
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&sdmmc1 {
+	u-boot,dm-spl;
+};
+
+&sdmmc1_b4_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc1_dir_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc2 {
+	u-boot,dm-spl;
+};
+
+&sdmmc2_b4_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc2_d47_pins_a {
+	u-boot,dm-spl;
+	pins {
+		u-boot,dm-spl;
+	};
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart4_pins_a {
+	u-boot,dm-pre-reloc;
+	pins1 {
+		u-boot,dm-pre-reloc;
+	};
+	pins2 {
+		u-boot,dm-pre-reloc;
+	};
+};
diff --git a/arch/arm/dts/stm32mp1-olinuxino-lime.dts b/arch/arm/dts/stm32mp1-olinuxino-lime.dts
new file mode 100644
index 00000000000..5c10d87c35c
--- /dev/null
+++ b/arch/arm/dts/stm32mp1-olinuxino-lime.dts
@@ -0,0 +1,382 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
+ */
+/dts-v1/;
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxaa-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+	model = "STM32MP1 OLinuXino-LIME";
+	compatible = "olimex,stm32mp1xx-olinuxino-lime", "st,stm32mp157";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@c0000000 {
+		device_type = "memory";
+		reg = <0xC0000000 0x40000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		mcuram2: mcuram2@10000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10000000 0x40000>;
+			no-map;
+		};
+
+		vdev0vring0: vdev0vring0@10040000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10040000 0x1000>;
+			no-map;
+		};
+
+		vdev0vring1: vdev0vring1@10041000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10041000 0x1000>;
+			no-map;
+		};
+
+		vdev0buffer: vdev0buffer@10042000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10042000 0x4000>;
+			no-map;
+		};
+
+		mcuram: mcuram@30000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x30000000 0x40000>;
+			no-map;
+		};
+
+		retram: retram@38000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x38000000 0x10000>;
+			no-map;
+		};
+
+		gpu_reserved: gpu@e8000000 {
+			reg = <0xe8000000 0x8000000>;
+			no-map;
+		};
+	};
+
+	aliases {
+		serial0 = &uart4;
+		ethernet0 = &ethernet0;
+	};
+
+	vdd_sd3v3: regulator_vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vbus_otg: regulator_otg {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-otg";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd: vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd_usb: vdd-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-usb";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd11: vdd11 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd11";
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1100000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd18: vdd18 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd18";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	reg_usb0_vbus: usb0-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb0-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpioc 6 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+	reg_usb1_vbus: usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpiof 15 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+};
+
+&dac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
+	status = "disabled";
+};
+
+&dts {
+	status = "okay";
+};
+
+&gpu {
+	contiguous-area = <&gpu_reserved>;
+	status = "okay";
+};
+
+&reg_usb0_vbus {
+	status="okay";
+};
+
+&reg_usb1_vbus {
+	status="okay";
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_pins_a>;
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+
+	pmic: stpmic@33 {
+		compatible = "st,stpmic1";
+		reg = <0x33>;
+		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		status = "disabled";
+	};
+
+	axp209: pmic@34 {
+               compatible = "x-powers,axp209";
+                reg = <0x34>;
+                interrupt-parent = <&gpioa>;
+                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+        };
+
+        eeprom: eeprom@50 {
+                compatible = "atmel,24c16";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+};
+
+&ipcc {
+	status = "okay";
+};
+
+&iwdg2 {
+	timeout-sec = <32>;
+	status = "okay";
+};
+
+&m4_rproc {
+	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
+			<&vdev0vring1>, <&vdev0buffer>;
+	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
+	mbox-names = "vq0", "vq1", "shutdown";
+	interrupt-parent = <&exti>;
+	interrupts = <68 1>;
+	status = "okay";
+};
+
+&pwr_regulators {
+	vdd-supply = <&vdd>;
+	vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
+
+&rng1 {
+	status = "okay";
+};
+
+&rtc {
+	status = "okay";
+};
+
+&sdmmc1 {
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
+	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
+	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
+	broken-cd;
+	st,neg-edge;
+	bus-width = <4>;
+	vmmc-supply = <&vdd_sd3v3>;
+	/*vqmmc-supply = <&sd_switch>;*/
+	status = "okay";
+};
+
+&sdmmc2 {
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
+	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
+	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
+	non-removable;
+	no-sd;
+	no-sdio;
+	st,neg-edge;
+	bus-width = <8>;
+	vmmc-supply = <&vdd_sd3v3>;
+	vqmmc-supply = <&vdd_sd3v3>;
+	mmc-ddr-3_3v;
+	status = "okay";
+};
+
+&timers6 {
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+	timer@5 {
+		status = "okay";
+	};
+};
+
+&ethernet0 {
+	status = "okay";
+	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
+	pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
+	pinctrl-names = "default", "sleep";
+	phy-mode = "rgmii-id";
+	phy-handle = <&phy1>;
+	st,eth_ref_clk_sel;
+	phy-reset-gpios = <&gpiod 10 GPIO_ACTIVE_LOW>;
+
+	mdio0 {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy1: ethernet-phy@1 {
+			reg = <1>;
+		};
+	};
+};
+
+&m_can1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&m_can1_pins_a>;
+	pinctrl-1 = <&m_can1_sleep_pins_a>;
+	status = "okay";
+};
+
+&qspi {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
+	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>;
+	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash0: mx66l51235l@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <108000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins_a>;
+	status = "disabled";
+};
+
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins_a>;
+	status = "okay";
+};
+
+
+&usbh_ehci {
+	phys = <&usbphyc_port0>;
+	phy-names = "usb";
+	status = "okay";
+};
+
+
+&usbotg_hs {
+	dr_mode = "peripheral";
+	phys = <&usbphyc_port1 0>;
+	phy-names = "usb2-phy";
+	vbus-supply = <&vbus_otg>;
+	status = "okay";
+};
+
+&usbphyc {
+	status = "okay";
+};
+
+&usbphyc_port0 {
+	phy-supply = <&vdd_usb>;
+		vdda1v1-supply = <&vdd11>;
+	vdda1v8-supply = <&vdd18>;
+
+};
+
+&usbphyc_port1 {
+	phy-supply = <&vdd_usb>;
+	vdda1v1-supply = <&vdd11>;
+	vdda1v8-supply = <&vdd18>;
+
+};
diff --git a/arch/arm/dts/stm32mp1-olinuxino-som-u-boot.dtsi b/arch/arm/dts/stm32mp1-olinuxino-som-u-boot.dtsi
new file mode 100644
index 00000000000..33a1102a07a
--- /dev/null
+++ b/arch/arm/dts/stm32mp1-olinuxino-som-u-boot.dtsi
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright : STMicroelectronics 2018
+ */
+
+#include <dt-bindings/clock/stm32mp1-clksrc.h>
+#include "stm32mp15-u-boot.dtsi"
+#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
+
+/ {
+	aliases {
+		mmc0 = &sdmmc1;
+		usb0 = &usbotg_hs;
+	};
+	config {
+	};
+};
+
+&clk_hse {
+	st,digbypass;
+};
+
+&i2c4 {
+	u-boot,dm-pre-reloc;
+};
+
+&i2c4_pins_a {
+	u-boot,dm-pre-reloc;
+	pins {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+/*
+&pmic {
+	u-boot,dm-pre-reloc;
+};
+*/
+
+&rcc {
+	st,clksrc = <
+		CLK_MPU_PLL1P
+		CLK_AXI_PLL2P
+		CLK_MCU_PLL3P
+		CLK_PLL12_HSE
+		CLK_PLL3_HSE
+		CLK_PLL4_HSE
+		CLK_RTC_LSE
+		CLK_MCO1_DISABLED
+		CLK_MCO2_DISABLED
+	>;
+
+	st,clkdiv = <
+		1 /*MPU*/
+		0 /*AXI*/
+		0 /*MCU*/
+		1 /*APB1*/
+		1 /*APB2*/
+		1 /*APB3*/
+		1 /*APB4*/
+		2 /*APB5*/
+		23 /*RTC*/
+		0 /*MCO1*/
+		0 /*MCO2*/
+	>;
+
+	st,pkcs = <
+		CLK_CKPER_HSE
+		CLK_FMC_ACLK
+		CLK_QSPI_ACLK
+		CLK_ETH_PLL4P
+		CLK_SDMMC12_PLL4P
+		CLK_DSI_DSIPLL
+		CLK_STGEN_HSE
+		CLK_USBPHY_HSE
+		CLK_SPI2S1_PLL3Q
+		CLK_SPI2S23_PLL3Q
+		CLK_SPI45_HSI
+		CLK_SPI6_HSI
+		CLK_I2C46_HSI
+		CLK_SDMMC3_PLL4P
+		CLK_USBO_USBPHY
+		CLK_ADC_CKPER
+		CLK_CEC_LSE
+		CLK_I2C12_HSI
+		CLK_I2C35_HSI
+		CLK_UART1_HSI
+		CLK_UART24_HSI
+		CLK_UART35_HSI
+		CLK_UART6_HSI
+		CLK_UART78_HSI
+		CLK_SPDIF_PLL4P
+		CLK_FDCAN_PLL4R
+		CLK_SAI1_PLL3Q
+		CLK_SAI2_PLL3Q
+		CLK_SAI3_PLL3Q
+		CLK_SAI4_PLL3Q
+		CLK_RNG1_LSI
+		CLK_RNG2_LSI
+		CLK_LPTIM1_PCLK1
+		CLK_LPTIM23_PCLK3
+		CLK_LPTIM45_LSE
+	>;
+
+	/* VCO = 1300.0 MHz => P = 650 (CPU) */
+	pll1: st,pll@0 {
+		compatible = "st,stm32mp1-pll";
+		reg = <0>;
+		cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+		frac = < 0x800 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
+	pll2: st,pll@1 {
+		compatible = "st,stm32mp1-pll";
+		reg = <1>;
+		cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+		frac = < 0x1400 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+	pll3: st,pll@2 {
+		compatible = "st,stm32mp1-pll";
+		reg = <2>;
+		cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+		frac = < 0x1a04 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
+	pll4: st,pll@3 {
+		compatible = "st,stm32mp1-pll";
+		reg = <3>;
+		cfg = < 3 98 5 7 7 PQR(1,1,1) >;
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&sdmmc1 {
+	u-boot,dm-spl;
+};
+
+&sdmmc1_b4_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc1_dir_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc2 {
+	u-boot,dm-spl;
+};
+
+&sdmmc2_b4_pins_a {
+	u-boot,dm-spl;
+	pins1 {
+		u-boot,dm-spl;
+	};
+	pins2 {
+		u-boot,dm-spl;
+	};
+};
+
+&sdmmc2_d47_pins_a {
+	u-boot,dm-spl;
+	pins {
+		u-boot,dm-spl;
+	};
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart4_pins_a {
+	u-boot,dm-pre-reloc;
+	pins1 {
+		u-boot,dm-pre-reloc;
+	};
+	pins2 {
+		u-boot,dm-pre-reloc;
+	};
+};
diff --git a/arch/arm/dts/stm32mp1-olinuxino-som.dts b/arch/arm/dts/stm32mp1-olinuxino-som.dts
new file mode 100644
index 00000000000..3706c70daa3
--- /dev/null
+++ b/arch/arm/dts/stm32mp1-olinuxino-som.dts
@@ -0,0 +1,346 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
+ */
+/dts-v1/;
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxaa-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+	model = "STM32MP1XX OLinuXino-SOM";
+	compatible = "olimex,stm32mp1xx-olinuxino-som" , "st,stm32mp153";
+	aliases {
+		ethernet0 = &ethernet0;
+		serial0 = &uart4;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@c0000000 {
+		device_type = "memory";
+		reg = <0xC0000000 0x40000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		mcuram2: mcuram2@10000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10000000 0x40000>;
+			no-map;
+		};
+
+		vdev0vring0: vdev0vring0@10040000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10040000 0x1000>;
+			no-map;
+		};
+
+		vdev0vring1: vdev0vring1@10041000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10041000 0x1000>;
+			no-map;
+		};
+
+		vdev0buffer: vdev0buffer@10042000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10042000 0x4000>;
+			no-map;
+		};
+
+		mcuram: mcuram@30000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x30000000 0x40000>;
+			no-map;
+		};
+
+		retram: retram@38000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x38000000 0x10000>;
+			no-map;
+		};
+
+		gpu_reserved: gpu@e8000000 {
+			reg = <0xe8000000 0x8000000>;
+			no-map;
+		};
+	};
+
+	aliases {
+		serial0 = &uart4;
+	};
+
+	vdd_sd3v3: regulator_vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vbus_otg: regulator_otg {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-otg";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd: vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd_usb: vdd-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-usb";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	vdd11: vdd11 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd11";
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1100000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+
+	vbus_otg: regulator_otg {
+		 compatible = "regulator-fixed";
+                regulator-name = "vdd-otg";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
+                enable-active-high;
+
+	};
+
+	vdd: vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-always-on;
+		regulator-initial-mode = <0>;
+		//regulator-over-current-protection;
+	};
+	reg_usb0_vbus: usb0-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb0-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpioc 6 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+	reg_usb1_vbus: usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpiof 15 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+};
+
+&dac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
+	status = "disabled";
+};
+
+&dts {
+	status = "okay";
+};
+
+&gpu {
+	contiguous-area = <&gpu_reserved>;
+	status = "okay";
+};
+
+&reg_usb0_vbus {
+	status="okay";
+};
+
+&reg_usb1_vbus {
+	status="okay";
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_pins_a>;
+//	i2c-scl-rising-time-ns = <185>;
+//	i2c-scl-falling-time-ns = <20>;
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+
+	pmic: stpmic@33 {
+		compatible = "st,stpmic1";
+		reg = <0x33>;
+		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		status = "disabled";
+	};
+};
+
+&ipcc {
+	status = "okay";
+};
+
+&iwdg2 {
+	timeout-sec = <32>;
+	status = "okay";
+};
+
+&m4_rproc {
+	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
+			<&vdev0vring1>, <&vdev0buffer>;
+	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
+	mbox-names = "vq0", "vq1", "shutdown";
+	interrupt-parent = <&exti>;
+	interrupts = <68 1>;
+	status = "okay";
+};
+
+&pwr_regulators {
+	vdd-supply = <&vdd>;
+	vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
+
+&rng1 {
+	status = "okay";
+};
+
+&rtc {
+	status = "okay";
+};
+
+&sdmmc1 {
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
+	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
+	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
+	broken-cd;
+	st,neg-edge;
+	bus-width = <4>;
+	vmmc-supply = <&vdd_sd3v3>;
+	/*vqmmc-supply = <&sd_switch>;*/
+	status = "okay";
+};
+
+&sdmmc2 {
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
+	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
+	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
+	non-removable;
+	no-sd;
+	no-sdio;
+	st,neg-edge;
+	bus-width = <8>;
+	vmmc-supply = <&vdd_sd3v3>;
+	vqmmc-supply = <&vdd_sd3v3>;
+	mmc-ddr-3_3v;
+	status = "okay";
+};
+
+&timers6 {
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+	timer@5 {
+		status = "okay";
+	};
+};
+
+
+&qspi {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
+	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>;
+	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash0: w25q128@0 {
+		compatible = "jedec,spi-nor", "winbond,w25q128";
+		reg = <0>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <108000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins_a>;
+	status = "disabled";
+};
+
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins_a>;
+	status = "okay";
+};
+
+&usbphyc {
+        status = "okay";
+};
+
+&usbphyc_port0 {
+        phy-supply = <&vdd_usb>;
+};
+
+&usbphyc_port1 {
+        phy-supply = <&vdd_usb>;
+};
+
+&usbh_ehci {
+        phys = <&usbphyc_port0>, <&usbphyc_port1 1>;
+        phy-names = "usb", "usb";
+        status = "okay";
+};
+
+&usbh_ohci {
+        phys = <&usbphyc_port0>, <&usbphyc_port1 1>;
+        phy-names = "usb", "usb";
+        status = "okay";
+};
+
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 8dfbcd14407..0b6e6253e02 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -513,7 +513,7 @@
 			resets = <&ccu RST_BUS_MMC2>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-			max-frequency = <200000000>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/arch/arm/dts/sun8i-s3-olinuxino.dts b/arch/arm/dts/sun8i-s3-olinuxino.dts
new file mode 100644
index 00000000000..5171b1f3b9b
--- /dev/null
+++ b/arch/arm/dts/sun8i-s3-olinuxino.dts
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+/*
+ * Copyright 2021 Dimitar Gamishev <hehopmajieh@debian.bg>
+ */
+
+/dts-v1/;
+#include "sun8i-v3.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "sunxi-common-regulators.dtsi"
+
+/ {
+	model = "S3-OLinuXino";
+	compatible = "olimex,s3-olinuxino", "allwinner,sun8i-s3";
+
+	aliases {
+		serial0 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+
+	reg_vcc3v3: vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	reg_vcc5v0: vcc5v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+};
+
+&emac {
+	phy-handle = <&int_mii_phy>;
+	phy-mode = "mii";
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	axp209: pmic@34 {
+		compatible = "x-powers,axp203",
+			     "x-powers,axp209";
+		reg = <0x34>;
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+};
+
+
+&mmc0 {
+	vmmc-supply = <&reg_dcdc3>;
+	bus-width = <4>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	rtl8723bs: sdio_wifi@1 {
+		reg = <1>;
+	};
+};
+
+&pio {
+	vcc-pd-supply = <&reg_dcdc3>;
+	vcc-pe-supply = <&reg_ldo3>;
+};
+
+&reg_usb0_vbus {
+	gpio = <&pio 1 8 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+//	regulator-always-on;
+};
+
+#include "axp209.dtsi"
+
+&ac_power_supply {
+	status = "okay";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1100000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-sys-cpu-ephy";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-3v3";
+};
+
+&reg_ldo1 {
+	regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+	regulator-min-microvolt = <1200000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-name = "avdd-dovdd-2v8-csi";
+	regulator-soft-start;
+	regulator-ramp-delay = <1600>;
+};
+
+&reg_ldo4 {
+	regulator-min-microvolt = <2800000>;
+	regulator-max-microvolt = <2800000>;
+	regulator-name = "dvdd-2v8-csi";
+};
+
+&spi0 {
+	status = "disabled";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q128", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
+};
+
+&uart1 {
+	pinctrl-0 = <&uart1_pg_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "host";
+	status = "okay";
+};
+
+
+&usbphy {
+	usb0_id_det-gpios = <&pio 6 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
+	usb0_vbus-supply = <&reg_usb0_vbus>;
+	usb0_vbus_det-gpios = <&pio 1 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PB10 */
+
+	status = "okay";
+};
+
diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi
index 0c734167692..4fc4131a2ec 100644
--- a/arch/arm/dts/sun8i-v3s.dtsi
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@ -363,6 +363,12 @@
 				function = "uart2";
 			};
 
+			/omit-if-no-ref/
+			uart1_pg_pins: uart1-pg-pins {
+				pins = "PG6", "PG7";
+				function = "uart1";
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2", "PF3",
 				       "PF4", "PF5";
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 079d66a80c1..ef61ef09430 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -85,6 +85,11 @@ config TARGET_DH_STM32MP1_PDK2
 	help
 		Target the DH PDK2 development kit with STM32MP15x SoM.
 
+config TARGET_OLIMEX_STM32MP1
+        bool "OLIMEX STM32MP1"
+        select STM32MP15x
+        help
+                Target the Olimex STM32MP1 Olinuxino board
 endchoice
 
 config SYS_TEXT_BASE
@@ -163,5 +168,6 @@ endif
 source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
 source "board/st/stm32mp1/Kconfig"
 source "board/dhelectronics/dh_stm32mp1/Kconfig"
+source "board/olimex/stm32mp1_olinuxino/Kconfig"
 
 endif
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index aa39867080d..58b3ff764e9 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -19,3 +19,4 @@ endif
 
 obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o
 obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
+obj-$(CONFIG_AXP_PMIC_BUS) += pmic_bus.o
diff --git a/arch/arm/mach-stm32mp/pmic_bus.c b/arch/arm/mach-stm32mp/pmic_bus.c
new file mode 100644
index 00000000000..f52d619af30
--- /dev/null
+++ b/arch/arm/mach-stm32mp/pmic_bus.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * Sunxi PMIC bus access helpers
+ *
+ * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
+ * axp223 uses the rsb bus, these functions abstract this.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+#include <dm.h>
+#include <power/pmic_bus.h>
+
+#define AXP209_I2C_ADDR			0x34
+
+	struct udevice *dev;
+
+int pmic_bus_init(void)
+{
+	/* This cannot be 0 because it is used in SPL before BSS is ready */
+	static int needs_init = 1;
+	__maybe_unused int ret;
+	struct udevice *bus;
+
+	if (!needs_init)
+		return 0;
+
+	ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
+	if (ret)
+		return ret;
+
+	ret = dm_i2c_probe(bus, AXP209_I2C_ADDR, 0, &dev);
+	if (ret)
+		return ret;
+
+	needs_init = 0;
+	return 0;
+}
+
+int pmic_bus_read(u8 reg, u8 *data)
+{
+	return dm_i2c_read(dev, reg, data, 1);
+}
+
+int pmic_bus_write(u8 reg, u8 data)
+{
+	return dm_i2c_write(dev,reg, &data,1);
+}
+
+int pmic_bus_setbits(u8 reg, u8 bits)
+{
+	int ret;
+	u8 val;
+
+	ret = pmic_bus_read(reg, &val);
+	if (ret)
+		return ret;
+
+	if ((val & bits) == bits)
+		return 0;
+
+	val |= bits;
+	return pmic_bus_write(reg, val);
+}
+
+int pmic_bus_clrbits(u8 reg, u8 bits)
+{
+	int ret;
+	u8 val;
+
+	ret = pmic_bus_read(reg, &val);
+	if (ret)
+		return ret;
+
+	if (!(val & bits))
+		return 0;
+
+	val &= ~bits;
+	return pmic_bus_write(reg, val);
+}
diff --git a/arch/arm/mach-stm32mp/pwr_regulator.c b/arch/arm/mach-stm32mp/pwr_regulator.c
index 846637ab162..71b2776a92a 100644
--- a/arch/arm/mach-stm32mp/pwr_regulator.c
+++ b/arch/arm/mach-stm32mp/pwr_regulator.c
@@ -81,12 +81,13 @@ static const struct pmic_child_info pwr_children_info[] = {
 
 static int stm32mp_pwr_bind(struct udevice *dev)
 {
+#if defined(CONFIG_PMIC_STPMIC1)
 	int children;
 
 	children = pmic_bind_children(dev, dev_ofnode(dev), pwr_children_info);
 	if (!children)
 		dev_dbg(dev, "no child found\n");
-
+#endif
 	return 0;
 }
 
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index fff5043b8d6..8c74e8e7c7a 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -105,12 +105,6 @@ config SUN6I_PRCM
 	  Support for the PRCM (Power/Reset/Clock Management) unit available
 	  in A31 SoC.
 
-config AXP_PMIC_BUS
-	bool "Sunxi AXP PMIC bus access helpers"
-	help
-	  Select this PMIC bus access helpers for Sunxi platform PRCM or other
-	  AXP family PMIC devices.
-
 config SUN8I_RSB
 	bool "Allwinner sunXi Reduced Serial Bus Driver"
 	help
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c
index 0394ce85644..c8ebbf5ee86 100644
--- a/arch/arm/mach-sunxi/pmic_bus.c
+++ b/arch/arm/mach-sunxi/pmic_bus.c
@@ -12,7 +12,7 @@
 #include <asm/arch/p2wi.h>
 #include <asm/arch/rsb.h>
 #include <i2c.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 
 #define AXP152_I2C_ADDR			0x30
 
diff --git a/board/olimex/common/boards.c b/board/olimex/common/boards.c
index 1ebc4815b16..851732e236c 100644
--- a/board/olimex/common/boards.c
+++ b/board/olimex/common/boards.c
@@ -269,6 +269,10 @@ struct olinuxino_boards olinuxino_boards[] = {
 		OLINUXINO_BOARD(9849, "A64-OLinuXino-1Ge16GW", "sun50i-a64-olinuxino-emmc")
 		OLINUXINO_CONFIG(EMMC, GBYTES(16), GBYTES(2), COM)
 	},
+	{
+		OLINUXINO_BOARD(10728, "A64-OLinuXino-1Ge16GW-EA", "sun50i-a64-olinuxino-emmc")
+		OLINUXINO_CONFIG(EMMC, GBYTES(16), GBYTES(2), COM)
+	},
 #endif
 #if defined(CONFIG_TARGET_A13_OLINUXINO)
         {
@@ -298,7 +302,21 @@ struct olinuxino_boards olinuxino_boards[] = {
                 OLINUXINO_CONFIG(NONE, -1, MBYTES(512), COM)
         },
 #endif
+#if defined(CONFIG_TARGET_OLIMEX_STM32MP1)
+        {
+		OLINUXINO_BOARD(10469, "STMP157-OLinuXino-LIME2H-IND", "stm32mp1-olinuxino")
+		OLINUXINO_CONFIG(NONE, -1, GBYTES(1), IND)
+        },
+        {
+		OLINUXINO_BOARD(10887, "STMP157-OLinuXino-LIME2H-EXT", "stm32mp1-olinuxino")
+		OLINUXINO_CONFIG(NONE, -1, GBYTES(1), COM)
+        },
+        {
+		OLINUXINO_BOARD(10997, "STMP157-OLinuXino-LIME2-EXT", "stm32mp1-olinuxino")
+		OLINUXINO_CONFIG(EMMC, -1, GBYTES(1), COM)
+        },
 
+#endif
 	{
 		.id = 0,
 	}
diff --git a/board/olimex/common/cmd.c b/board/olimex/common/cmd.c
index b86364f9f23..7952a7499cf 100644
--- a/board/olimex/common/cmd.c
+++ b/board/olimex/common/cmd.c
@@ -6,7 +6,9 @@
 
 #include <common.h>
 #include <spl.h>
+#ifndef CONFIG_TARGET_OLIMEX_STM32MP1
 #include <asm/arch/spl.h>
+#endif
 #include <linux/ctype.h>
 
 
@@ -17,7 +19,7 @@
 #include <olimex/lcd_olinuxino.h>
 #include <olimex/sys_eeprom.h>
 
-#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO)
+#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO) || defined(CONFIG_TARGET_OLIMEX_STM32MP1)
 static int do_config_info(struct cmd_tbl *cmdtp, int flag,
 			  int argc, char *const argv[])
 {
@@ -107,6 +109,7 @@ static int do_config_write(struct cmd_tbl *cmdtp, int flag,
 			return CMD_RET_FAILURE;
 		}
 	} else {
+#if !defined(CONFIG_TARGET_OLIMEX_STM32MP1)
 		sunxi_get_sid(sid);
 		if (sid[0] != 0) {
 
@@ -125,10 +128,12 @@ static int do_config_write(struct cmd_tbl *cmdtp, int flag,
 			memcpy(&info.mac, &mac, 12);
 
 		}
+#endif	
 	}
 
 	printf("Erasing EEPROM configuration...\n");
 	if (olinuxino_i2c_eeprom_erase()) {
+#ifndef CONFIG_TARGET_OLIMEX_STM32MP1
 #ifdef CONFIG_MMC
 		bootdev = sunxi_get_boot_device();
 
@@ -140,6 +145,7 @@ static int do_config_write(struct cmd_tbl *cmdtp, int flag,
 		}
 #else
 		return CMD_RET_FAILURE;
+#endif
 #endif
 	}
 
@@ -148,6 +154,7 @@ static int do_config_write(struct cmd_tbl *cmdtp, int flag,
 	printf("Writting EEPROM configuration...\n");
 	if (!olinuxino_i2c_eeprom_write())
 		olinuxino_i2c_eeprom_read();
+#ifndef CONFIG_TARGET_OLIMEX_STM32MP1
 
 #ifdef CONFIG_MMC
 	bootdev = sunxi_get_boot_device();
@@ -158,7 +165,7 @@ static int do_config_write(struct cmd_tbl *cmdtp, int flag,
 			olinuxino_mmc_eeprom_read();
 	}
 #endif
-
+#endif
 	return CMD_RET_SUCCESS;
 }
 
@@ -251,7 +258,7 @@ static int do_olinuxino_opts(struct cmd_tbl *cmdtp, int flag, int argc, char *co
 		cp = find_cmd_tbl(argv[1], cmd_monitor, ARRAY_SIZE(cmd_monitor));
 	else
 #endif
-#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO)
+#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO) || defined(CONFIG_TARGET_OLIMEX_STM32MP1)
 	if (!strcmp(argv[0], "config"))
 		cp = find_cmd_tbl(argv[1], cmd_config, ARRAY_SIZE(cmd_config));
 	else
@@ -270,7 +277,7 @@ static int do_olinuxino_opts(struct cmd_tbl *cmdtp, int flag, int argc, char *co
 }
 
 static struct cmd_tbl cmd_olinuxino[] = {
-#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO)
+#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO) || defined(CONFIG_TARGET_OLIMEX_STM32MP1)
 	U_BOOT_CMD_MKENT(config, CONFIG_SYS_MAXARGS, 0, do_olinuxino_opts, "", ""),
 #endif
 #ifdef CONFIG_VIDEO_LCD_OLINUXINO
@@ -299,7 +306,7 @@ U_BOOT_CMD(
 	olinuxino, 7, 0, do_olinuxino_ops,
 	"OLinuXino board configurator",
 	"\n"
-#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO)
+#if defined(CONFIG_TARGET_A20_OLINUXINO) || defined(CONFIG_TARGET_A10_OLINUXINO) || defined(CONFIG_TARGET_OLIMEX_STM32MP1)
 	"olinuxino config info		- Print current configuration: ID, serial, ram, storage, grade...\n"
 	"olinuxino config list		- Print supported boards and their IDs\n"
 	"olinuxino config erase		- Erase currently stored configuration\n"
diff --git a/board/olimex/common/sys_eeprom.c b/board/olimex/common/sys_eeprom.c
index c3ff900ca97..34d80054dbf 100644
--- a/board/olimex/common/sys_eeprom.c
+++ b/board/olimex/common/sys_eeprom.c
@@ -8,7 +8,9 @@
 #include <i2c.h>
 #include <mmc.h>
 #include <spl.h>
+#ifndef CONFIG_TARGET_OLIMEX_STM32MP1
 #include <asm/arch/spl.h>
+#endif
 #include <u-boot/crc.h>
 
 #include <linux/delay.h>
@@ -20,13 +22,22 @@ struct olinuxino_eeprom *eeprom = OLINUXINO_EEPROM_DATA;
 static int olinuxino_i2c_eeprom_init(void)
 {
 	int ret;
+#ifdef CONFIG_DM_I2C
+        struct udevice *dev;
+        ret = i2c_get_chip_for_busnum(0,0x50, 1, &dev);
+        if (ret) {
+                printf("%s: Cannot find udev for a bus %d\n",
+                       __func__, 4);
+                return ret;
+        }
+#else
 
 	if ((ret = i2c_set_bus_num(OLINUXINO_EEPROM_BUS)))
 		return ret;
 
 	if ((ret = i2c_probe(0x50)))
 		return ret;
-
+#endif
 	return 0;
 }
 
@@ -35,11 +46,19 @@ int olinuxino_i2c_eeprom_read(void)
 	uint32_t crc;
 	int ret;
 
-	if ((ret = olinuxino_i2c_eeprom_init()))
-		return ret;
+	 if ((ret = olinuxino_i2c_eeprom_init()))
+                return ret;
+#ifdef CONFIG_DM_I2C
+        struct udevice *dev;
+        ret = i2c_get_chip_for_busnum(0,0x50, 1, &dev);
 
-	if ((ret = i2c_read(OLINUXINO_EEPROM_ADDRESS, 0, 1, (uint8_t *)eeprom, 256)))
-		return ret;
+        if ((ret = dm_i2c_read(dev, 0x00, (uint8_t *)eeprom, 256)))
+                return ret;
+
+#else
+        if ((ret = i2c_read(OLINUXINO_EEPROM_ADDRESS, 0, 1, (uint8_t *)eeprom, 256)))
+                return ret;
+#endif
 
 	if (eeprom->header != OLINUXINO_EEPROM_MAGIC) {
 		memset(eeprom, 0xFF, 256);
@@ -58,56 +77,91 @@ int olinuxino_i2c_eeprom_read(void)
 #ifndef CONFIG_SPL_BUILD
 int olinuxino_i2c_eeprom_write(void)
 {
-	uint8_t *data = (uint8_t *)eeprom;
-	uint16_t i;
-	int ret;
-
-	if ((ret = olinuxino_i2c_eeprom_init())) {
-		printf("ERROR: Failed to init eeprom!\n");
-		return ret;
-	}
-
-	/* Restore magic header */
-	eeprom->header = OLINUXINO_EEPROM_MAGIC;
-
-	/* Calculate new chechsum */
-	eeprom->crc = crc32(0L, data, 252);
-
-	/* Write new values */
-	for(i = 0; i < 256; i += 16) {
-		if ((ret = i2c_write(OLINUXINO_EEPROM_ADDRESS, i, 1, data + i , 16))) {
-			printf("ERROR: Failed to write eeprom!\n");
-			return ret;
-		}
-		mdelay(5);
-	}
+        uint8_t *data = (uint8_t *)eeprom;
+        uint16_t i;
+        int ret;
+#ifdef CONFIG_DM_I2C
+        struct udevice *dev;
+        if ((ret = i2c_get_chip_for_busnum(0,0x50, 1, &dev))) {
+                printf("ERROR: Failed to init eeprom!\n");
+                return ret;
+        }
+#else
+        if ((ret = olinuxino_i2c_eeprom_init())) {
+                printf("ERROR: Failed to init eeprom!\n");
+                return ret;
+        }
+#endif
+        /* Restore magic header */
+        eeprom->header = OLINUXINO_EEPROM_MAGIC;
+
+        /* Calculate new chechsum */
+        eeprom->crc = crc32(0L, data, 252);
+
+        /* Write new values */
+#ifdef CONFIG_DM_I2C
+         for(i = 0; i < 256; i += 16) {
+                 if ((ret = dm_i2c_write(dev, i,data + i , 16))) {
+                         printf("ERROR: Failed to write eeprom!\n");
+                         return ret;
+                }
+                mdelay(5);
+         }
+#else
+        for(i = 0; i < 256; i += 16) {
+                if ((ret = i2c_write(OLINUXINO_EEPROM_ADDRESS, i, 1, data + i , 16))) {
+                        printf("ERROR: Failed to write eeprom!\n");
+                        return ret;
+                }
+                mdelay(5);
+        }
+#endif
 
 	return 0;
 }
 
 int olinuxino_i2c_eeprom_erase(void)
 {
-	uint8_t *data = (uint8_t *)eeprom;
-	uint16_t i;
-	int ret;
-
-	/* Initialize EEPROM */
-	if ((ret = olinuxino_i2c_eeprom_init())) {
-		printf("ERROR: Failed to init eeprom!\n");
-		return ret;
-	}
-
-	/* Erase previous data */
-	memset((uint8_t *)eeprom, 0xFF, 256);
-
-	/* Write data */
-	for(i = 0; i < 256; i += 16) {
-		if ((ret = i2c_write(OLINUXINO_EEPROM_ADDRESS, i, 1, data + i, 16))) {
-			printf("ERROR: Failed to write eeprom!\n");
-			return ret;
-		}
-		mdelay(5);
-	}
+        uint8_t *data = (uint8_t *)eeprom;
+        uint16_t i;
+        int ret;
+
+        /* Initialize EEPROM */
+#ifdef CONFIG_DM_I2C
+        struct udevice *dev;
+        if ((ret = i2c_get_chip_for_busnum(0,0x50, 1, &dev))) {
+                 printf("ERROR: Failed to init eeprom!\n");
+                 return ret;
+        }
+#else
+
+        if ((ret = olinuxino_i2c_eeprom_init())) {
+                printf("ERROR: Failed to init eeprom!\n");
+                return ret;
+        }
+#endif
+        /* Erase previous data */
+        memset((uint8_t *)eeprom, 0xFF, 256);
+
+        /* Write data */
+#ifdef CONFIG_DM_I2C
+         for(i = 0; i < 256; i += 16) {
+                 if ((ret = dm_i2c_write(dev, i,data + i , 16))) {
+                        printf("ERROR: Failed to write eeprom!\n");
+                        return ret;
+                 }
+                 mdelay(5);
+         }
+#else
+
+        for(i = 0; i < 256; i += 16) {
+                if ((ret = i2c_write(OLINUXINO_EEPROM_ADDRESS, i, 1, data + i, 16))) {
+                        printf("ERROR: Failed to write eeprom!\n");
+                        return ret;
+                }
+                mdelay(5);
+        }
+#endif
 
 	return 0;
 }
diff --git a/board/olimex/stm32mp1_olinuxino/Kconfig b/board/olimex/stm32mp1_olinuxino/Kconfig
new file mode 100644
index 00000000000..296343abed5
--- /dev/null
+++ b/board/olimex/stm32mp1_olinuxino/Kconfig
@@ -0,0 +1,13 @@
+if TARGET_OLIMEX_STM32MP1
+
+config SYS_BOARD
+	default "stm32mp1_olinuxino"
+
+config SYS_VENDOR
+	default "olimex"
+
+config SYS_CONFIG_NAME
+	default "stm32mp1"
+
+source "board/st/common/Kconfig"
+endif
diff --git a/board/olimex/stm32mp1_olinuxino/MAINTAINERS b/board/olimex/stm32mp1_olinuxino/MAINTAINERS
new file mode 100644
index 00000000000..fd70131f9e6
--- /dev/null
+++ b/board/olimex/stm32mp1_olinuxino/MAINTAINERS
@@ -0,0 +1,8 @@
+DH_STM32MP1_PDK2 BOARD
+M:	Marek Vasut <marex@denx.de>
+S:	Maintained
+F:	arch/arm/dts/stm32mp15xx-dhcom*
+F:	board/dhelectronics/dh_stm32mp1/
+F:	configs/stm32mp15_dhcom_basic_defconfig
+F:	configs/stm32mp15_dhcor_basic_defconfig
+F:	include/configs/stm32mp1.h
diff --git a/board/olimex/stm32mp1_olinuxino/Makefile b/board/olimex/stm32mp1_olinuxino/Makefile
new file mode 100644
index 00000000000..0a8d7b44d75
--- /dev/null
+++ b/board/olimex/stm32mp1_olinuxino/Makefile
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+#
+# Copyright (C) 2021, Mitko Gamishev <gamishev@gmail.com>
+#
+
+obj-y	+= ../common/sys_eeprom.o
+obj-y	+= ../common/boards.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y	+= spl.o
+else
+obj-y	+= ../common/cmd.o
+obj-y	+= stm32mp1.o
+endif
diff --git a/board/olimex/stm32mp1_olinuxino/spl.c b/board/olimex/stm32mp1_olinuxino/spl.c
new file mode 100644
index 00000000000..30e682a454c
--- /dev/null
+++ b/board/olimex/stm32mp1_olinuxino/spl.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ */
+
+#include <config.h>
+#include <common.h>
+#include <init.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <axp_pmic.h>
+
+/* board early initialisation in board_f: need to use global variable */
+static u32 opp_voltage_mv __section(".data");
+
+void board_vddcore_init(u32 voltage_mv)
+{
+//	if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER_SUPPORT))
+		opp_voltage_mv = voltage_mv;
+}
+
+int board_early_init_f(void)
+{
+
+		printf("Init AXP209 PMIC \n");
+
+		printf("VDD Core set to: %d mv \n",opp_voltage_mv);
+		int ret;
+
+		ret = axp_init();
+		ret = axp_set_aldo3(1200);
+		ret = axp_set_dcdc2(opp_voltage_mv);
+		mdelay(100);
+		if (ret)
+			printf("AXP Init Failed \n");
+		printf("---------%d------------\n",ret);
+
+
+	return 0;
+}
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+#if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE)
+
+#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
+#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
+
+	/* UART4 clock enable */
+	setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
+
+#define GPIOG_BASE 0x50008000
+	/* GPIOG clock enable */
+	writel(BIT(6), RCC_MP_AHB4ENSETR);
+	/* GPIO configuration for ST boards: Uart4 TX = G11 */
+	writel(0xffbfffff, GPIOG_BASE + 0x00);
+	writel(0x00006000, GPIOG_BASE + 0x24);
+#else
+
+#error("CONFIG_DEBUG_UART_BASE: not supported value")
+
+#endif
+}
+#endif
diff --git a/board/olimex/stm32mp1_olinuxino/stm32mp1.c b/board/olimex/stm32mp1_olinuxino/stm32mp1.c
new file mode 100644
index 00000000000..e19dbdcad50
--- /dev/null
+++ b/board/olimex/stm32mp1_olinuxino/stm32mp1.c
@@ -0,0 +1,680 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_BOARD
+
+#include <common.h>
+#include <adc.h>
+#include <bootm.h>
+#include <clk.h>
+#include <config.h>
+#include <dm.h>
+#include <env.h>
+#include <env_internal.h>
+#include <fdt_support.h>
+#include <g_dnl.h>
+#include <generic-phy.h>
+#include <hang.h>
+#include <i2c.h>
+#include <init.h>
+#include <led.h>
+#include <log.h>
+#include <malloc.h>
+#include <misc.h>
+#include <mtd_node.h>
+#include <net.h>
+#include <netdev.h>
+#include <phy.h>
+#include <remoteproc.h>
+#include <reset.h>
+#include <syscon.h>
+#include <usb.h>
+#include <watchdog.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+#include <jffs2/load_kernel.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/iopoll.h>
+#include <power/regulator.h>
+#include <usb/dwc2_udc.h>
+#include <olimex/sys_eeprom.h>
+#include <olimex/boards.h>
+
+
+/* SYSCFG registers */
+#define SYSCFG_BOOTR		0x00
+#define SYSCFG_PMCSETR		0x04
+#define SYSCFG_IOCTRLSETR	0x18
+#define SYSCFG_ICNR		0x1C
+#define SYSCFG_CMPCR		0x20
+#define SYSCFG_CMPENSETR	0x24
+#define SYSCFG_PMCCLRR		0x44
+
+#define SYSCFG_BOOTR_BOOT_MASK		GENMASK(2, 0)
+#define SYSCFG_BOOTR_BOOTPD_SHIFT	4
+
+#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE		BIT(0)
+#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI	BIT(1)
+#define SYSCFG_IOCTRLSETR_HSLVEN_ETH		BIT(2)
+#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC		BIT(3)
+#define SYSCFG_IOCTRLSETR_HSLVEN_SPI		BIT(4)
+
+#define SYSCFG_CMPCR_SW_CTRL		BIT(1)
+#define SYSCFG_CMPCR_READY		BIT(8)
+
+#define SYSCFG_CMPENSETR_MPU_EN		BIT(0)
+
+#define SYSCFG_PMCSETR_ETH_CLK_SEL	BIT(16)
+#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL	BIT(17)
+
+#define SYSCFG_PMCSETR_ETH_SELMII	BIT(20)
+
+#define SYSCFG_PMCSETR_ETH_SEL_MASK	GENMASK(23, 21)
+#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII	0
+#define SYSCFG_PMCSETR_ETH_SEL_RGMII	BIT(21)
+#define SYSCFG_PMCSETR_ETH_SEL_RMII	BIT(23)
+
+/*
+ * Get a global data pointer
+ */
+DECLARE_GLOBAL_DATA_PTR;
+
+#define USB_LOW_THRESHOLD_UV		200000
+#define USB_WARNING_LOW_THRESHOLD_UV	660000
+#define USB_START_LOW_THRESHOLD_UV	1230000
+#define USB_START_HIGH_THRESHOLD_UV	2150000
+
+int board_early_init_f(void)
+{
+	/* nothing to do, only used in SPL */
+	return 0;
+}
+
+int checkboard(void)
+{
+	int ret;
+	char *mode;
+	u32 otp;
+	struct udevice *dev;
+	const char *fdt_compat;
+	int fdt_compat_len;
+	char mac[17], rev[3];
+	const char *name;
+
+	if (IS_ENABLED(CONFIG_TFABOOT))
+		mode = "trusted";
+	else
+		mode = "basic";
+
+	if (!olinuxino_i2c_eeprom_read()) {
+		printf("Verifying data: ");
+
+		if (olinuxino_eeprom_is_valid()) {
+			printf("EEPROM Valid\n");
+			name = olinuxino_get_board_name();
+			olinuxino_get_board_revision(rev);
+			printf("%-7s%s Rev.%s", "ID:", name, rev);
+			printf("\n%-7s%08X\n", "SN:", eeprom->serial);
+			olinuxino_get_board_mac(mac);
+			printf("%-7s%s\n", "MAC:", mac);
+		} else {
+			printf("Error\n");
+		}
+	}
+
+	fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
+				 &fdt_compat_len);
+
+	log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
+		 fdt_compat && fdt_compat_len ? fdt_compat : "");
+
+	/* display the STMicroelectronics board identification */
+	if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_DRIVER_GET(stm32mp_bsec),
+						  &dev);
+		if (!ret)
+			ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
+					&otp, sizeof(otp));
+		if (ret > 0 && otp)
+			log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
+				 otp >> 16,
+				 (otp >> 12) & 0xF,
+				 (otp >> 4) & 0xF,
+				 ((otp >> 8) & 0xF) - 1 + 'A',
+				 otp & 0xF);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_USB_GADGET_DOWNLOAD
+#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
+#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
+	    !strcmp(name, "usb_dnl_dfu"))
+		put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
+	else if (IS_ENABLED(CONFIG_FASTBOOT) &&
+		 !strcmp(name, "usb_dnl_fastboot"))
+		put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
+			      &dev->idProduct);
+	else
+		put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
+
+	return 0;
+}
+#endif /* CONFIG_USB_GADGET_DOWNLOAD */
+
+static int get_led(struct udevice **dev, char *led_string)
+{
+	char *led_name;
+	int ret;
+
+	led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
+	if (!led_name) {
+		log_debug("could not find %s config string\n", led_string);
+		return -ENOENT;
+	}
+	ret = led_get_by_label(led_name, dev);
+	if (ret) {
+		log_debug("get=%d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int setup_led(enum led_state_t cmd)
+{
+	struct udevice *dev;
+	int ret;
+
+	if (!CONFIG_IS_ENABLED(LED))
+		return 0;
+
+	ret = get_led(&dev, "u-boot,boot-led");
+	if (ret)
+		return ret;
+
+	ret = led_set_state(dev, cmd);
+	return ret;
+}
+
+static void __maybe_unused led_error_blink(u32 nb_blink)
+{
+	int ret;
+	struct udevice *led;
+	u32 i;
+
+	if (!nb_blink)
+		return;
+
+	if (CONFIG_IS_ENABLED(LED)) {
+		ret = get_led(&led, "u-boot,error-led");
+		if (!ret) {
+			/* make u-boot,error-led blinking */
+			/* if U32_MAX and 125ms interval, for 17.02 years */
+			for (i = 0; i < 2 * nb_blink; i++) {
+				led_set_state(led, LEDST_TOGGLE);
+				mdelay(125);
+				WATCHDOG_RESET();
+			}
+			led_set_state(led, LEDST_ON);
+		}
+	}
+
+	/* infinite: the boot process must be stopped */
+	if (nb_blink == U32_MAX)
+		hang();
+}
+
+static void sysconf_init(void)
+{
+	u8 *syscfg;
+	struct udevice *pwr_dev;
+	struct udevice *pwr_reg;
+	struct udevice *dev;
+	u32 otp = 0;
+	int ret;
+	u32 bootr, val;
+
+	syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+	/* interconnect update : select master using the port 1 */
+	/* LTDC = AXI_M9 */
+	/* GPU  = AXI_M8 */
+	/* today information is hardcoded in U-Boot */
+	writel(BIT(9), syscfg + SYSCFG_ICNR);
+
+	/* disable Pull-Down for boot pin connected to VDD */
+	bootr = readl(syscfg + SYSCFG_BOOTR);
+	bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
+	bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
+	writel(bootr, syscfg + SYSCFG_BOOTR);
+
+	/* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
+	 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
+	 * The customer will have to disable this for low frequencies
+	 * or if AFMUX is selected but the function not used, typically for
+	 * TRACE. Otherwise, impact on power consumption.
+	 *
+	 * WARNING:
+	 *   enabling High Speed mode while VDD>2.7V
+	 *   with the OTP product_below_2v5 (OTP 18, BIT 13)
+	 *   erroneously set to 1 can damage the IC!
+	 *   => U-Boot set the register only if VDD < 2.7V (in DT)
+	 *      but this value need to be consistent with board design
+	 */
+	ret = uclass_get_device_by_driver(UCLASS_PMIC,
+					  DM_DRIVER_GET(stm32mp_pwr_pmic),
+					  &pwr_dev);
+	if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_DRIVER_GET(stm32mp_bsec),
+						  &dev);
+		if (ret) {
+			log_err("Can't find stm32mp_bsec driver\n");
+			return;
+		}
+
+		ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
+		if (ret > 0)
+			otp = otp & BIT(13);
+
+		/* get VDD = vdd-supply */
+		ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
+						  &pwr_reg);
+
+		/* check if VDD is Low Voltage */
+		if (!ret) {
+			if (regulator_get_value(pwr_reg) < 2700000) {
+				writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
+				       SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
+				       SYSCFG_IOCTRLSETR_HSLVEN_ETH |
+				       SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
+				       SYSCFG_IOCTRLSETR_HSLVEN_SPI,
+				       syscfg + SYSCFG_IOCTRLSETR);
+
+				if (!otp)
+					log_err("product_below_2v5=0: HSLVEN protected by HW\n");
+			} else {
+				if (otp)
+					log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
+			}
+		} else {
+			log_debug("VDD unknown");
+		}
+	}
+
+	/* activate automatic I/O compensation
+	 * warning: need to ensure CSI enabled and ready in clock driver
+	 */
+	writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
+
+	/* poll until ready (1s timeout) */
+	ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
+				 val & SYSCFG_CMPCR_READY,
+				 1000000);
+	if (ret) {
+		log_err("SYSCFG: I/O compensation failed, timeout.\n");
+		led_error_blink(10);
+	}
+
+	clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
+}
+
+/* board dependent setup after realloc */
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
+
+	if (IS_ENABLED(CONFIG_DM_REGULATOR))
+		regulators_enable_boot_on(_DEBUG);
+
+	if (!IS_ENABLED(CONFIG_TFABOOT))
+		sysconf_init();
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	const void *fdt_compat;
+	int fdt_compat_len;
+	int ret;
+	u32 otp;
+	struct udevice *dev;
+	char buf[10];
+	char dtb_name[256];
+	int buf_len;
+	char ethaddr[18];
+	char cmd[64];
+
+
+	if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
+		fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
+					 &fdt_compat_len);
+		if (fdt_compat && fdt_compat_len) {
+			if (strncmp(fdt_compat, "st,", 3) != 0) {
+				env_set("board_name", fdt_compat);
+			} else {
+				env_set("board_name", fdt_compat + 3);
+
+				buf_len = sizeof(dtb_name);
+				strncpy(dtb_name, fdt_compat + 3, buf_len);
+				buf_len -= strlen(fdt_compat + 3);
+				strncat(dtb_name, ".dtb", buf_len);
+				env_set("fdtfile", dtb_name);
+			}
+		}
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_DRIVER_GET(stm32mp_bsec),
+						  &dev);
+
+		if (!ret)
+			ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
+					&otp, sizeof(otp));
+		if (ret > 0 && otp) {
+			snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
+			env_set("board_id", buf);
+
+			snprintf(buf, sizeof(buf), "0x%04x",
+				 ((otp >> 8) & 0xF) - 1 + 0xA);
+			env_set("board_rev", buf);
+		}
+	}
+
+	olinuxino_get_board_mac(ethaddr);
+	if (strncmp("FF:FF:FF:FF:FF:FF", ethaddr, 17)) {
+		sprintf(cmd,"env set -f ethaddr %s\n", ethaddr);
+		run_command(cmd, 0);
+	}
+
+	u32 mod_reg;
+	mod_reg = readl(0x50002000);
+	mod_reg = (mod_reg & ~(1UL << 0)) | (0 << 0);
+	mod_reg = (mod_reg & ~(1UL << 1)) | (0 << 1);
+	writel(mod_reg , 0x50002000);
+
+	mod_reg = readl(0x5000200c);
+	mod_reg = (mod_reg | (1UL << 0));
+	writel(mod_reg , 0x5000200c);
+
+	return 0;
+}
+
+void board_quiesce_devices(void)
+{
+	setup_led(LEDST_OFF);
+}
+
+/* eth init function : weak called in eqos driver */
+int board_interface_eth_init(struct udevice *dev,
+			     phy_interface_t interface_type)
+{
+	u8 *syscfg;
+	u32 value;
+	bool eth_clk_sel_reg = false;
+	bool eth_ref_clk_sel_reg = false;
+
+	/* Gigabit Ethernet 125MHz clock selection. */
+	eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+
+	/* Ethernet 50Mhz RMII clock selection */
+	eth_ref_clk_sel_reg =
+		dev_read_bool(dev, "st,eth_ref_clk_sel");
+
+	syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+	if (!syscfg)
+		return -ENODEV;
+
+	switch (interface_type) {
+	case PHY_INTERFACE_MODE_MII:
+		value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
+			SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+		log_debug("PHY_INTERFACE_MODE_MII\n");
+		break;
+	case PHY_INTERFACE_MODE_GMII:
+		if (eth_clk_sel_reg)
+			value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
+				SYSCFG_PMCSETR_ETH_CLK_SEL;
+		else
+			value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
+		log_debug("PHY_INTERFACE_MODE_GMII\n");
+		break;
+	case PHY_INTERFACE_MODE_RMII:
+		if (eth_ref_clk_sel_reg)
+			value = SYSCFG_PMCSETR_ETH_SEL_RMII |
+				SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+		else
+			value = SYSCFG_PMCSETR_ETH_SEL_RMII;
+		log_debug("PHY_INTERFACE_MODE_RMII\n");
+		break;
+	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_ID:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+	case PHY_INTERFACE_MODE_RGMII_TXID:
+		if (eth_clk_sel_reg)
+			value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
+				SYSCFG_PMCSETR_ETH_CLK_SEL;
+		else
+			value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
+		log_debug("PHY_INTERFACE_MODE_RGMII\n");
+		break;
+	default:
+		log_debug("Do not manage %d interface\n",
+			  interface_type);
+		/* Do not manage others interfaces */
+		return -EINVAL;
+	}
+
+	/* clear and set ETH configuration bits */
+	writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
+	       SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
+	       syscfg + SYSCFG_PMCCLRR);
+	writel(value, syscfg + SYSCFG_PMCSETR);
+
+	return 0;
+}
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+	u32 bootmode = get_bootmode();
+
+	if (prio)
+		return ENVL_UNKNOWN;
+
+	switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
+	case BOOT_FLASH_SD:
+	case BOOT_FLASH_EMMC:
+		if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+			return ENVL_MMC;
+		else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
+			return ENVL_EXT4;
+		else
+			return ENVL_NOWHERE;
+
+	case BOOT_FLASH_NAND:
+	case BOOT_FLASH_SPINAND:
+		if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
+			return ENVL_UBI;
+		else
+			return ENVL_NOWHERE;
+
+	case BOOT_FLASH_NOR:
+		if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+			return ENVL_SPI_FLASH;
+		else
+			return ENVL_NOWHERE;
+
+	default:
+		return ENVL_NOWHERE;
+	}
+}
+
+const char *env_ext4_get_intf(void)
+{
+	u32 bootmode = get_bootmode();
+
+	switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
+	case BOOT_FLASH_SD:
+	case BOOT_FLASH_EMMC:
+		return "mmc";
+	default:
+		return "";
+	}
+}
+
+const char *env_ext4_get_dev_part(void)
+{
+	static char *const env_dev_part =
+#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
+		CONFIG_ENV_EXT4_DEVICE_AND_PART;
+#else
+		"";
+#endif
+	static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
+
+	if (strlen(env_dev_part) > 0)
+		return env_dev_part;
+
+	u32 bootmode = get_bootmode();
+
+	return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
+}
+
+int mmc_get_env_dev(void)
+{
+	u32 bootmode;
+
+	if (CONFIG_SYS_MMC_ENV_DEV >= 0)
+		return CONFIG_SYS_MMC_ENV_DEV;
+
+	bootmode = get_bootmode();
+
+	/* use boot instance to select the correct mmc device identifier */
+	return (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
+}
+
+static int olinuxino_load_overlay(void *blob, char *overlay)
+{
+	char cmd[128];
+	int ret;
+
+	printf("Applying overlay: \'%s\'...\n", overlay);
+
+	/* Load file */
+	sprintf(cmd, "load ${devtype} ${devnum}:${distro_bootpart} 0xc4300000 %s", overlay);
+	ret = run_command(cmd, 0);
+	if (ret)
+		printf("Failed to load overlay.\n");
+
+	return ret;
+}
+
+static void olinuxino_load_overlays(void *blob)
+{
+	int ret;
+	char cmd[128];
+	char *overlay;
+	void *backup;
+
+	overlay = strtok(env_get("fdtoverlays"), " ");
+	if (!overlay)
+		return;
+
+	/* Remove optional new line */
+	if (*(overlay + strlen(overlay) - 1) == '\n')
+		*(overlay + strlen(overlay) - 1) = 0;
+
+	/* Make a backup of the original blob */
+	backup = malloc(fdt_totalsize(blob));
+	if (!backup) {
+		printf("Failed to make backup copy.\n");
+		return;
+	}
+	memcpy(backup, blob, fdt_totalsize(blob));
+
+	/* Increase size */
+	ret = fdt_increase_size(blob, 0x1000);
+	if (ret) {
+		printf("Failed to increase FDT blob size.\n");
+		return;
+	}
+
+	while (overlay) {
+		ret = olinuxino_load_overlay(blob, overlay);
+		if (ret)
+			goto err;
+
+		/* Apply */
+		ret = run_command("fdt apply 0xc4300000", 0);
+		if (ret) {
+			printf("Failed to apply overlay.\n");
+
+			printf("Restoring the original FDT blob...\n");
+			memcpy(blob, backup, fdt_totalsize(backup));
+			fdt_set_totalsize(blob, fdt_totalsize(backup));
+			return;
+		}
+err:
+		overlay = strtok(NULL, " ");
+	}
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	static const struct node_info nodes[] = {
+		{ "st,stm32f469-qspi",		MTD_DEV_TYPE_NOR,  },
+		{ "st,stm32f469-qspi",		MTD_DEV_TYPE_SPINAND},
+		{ "st,stm32mp15-fmc2",		MTD_DEV_TYPE_NAND, },
+		{ "st,stm32mp1-fmc2-nfc",	MTD_DEV_TYPE_NAND, },
+	};
+	char *boot_device;
+
+	/* Check the boot-source and don't update MTD for serial or usb boot */
+	boot_device = env_get("boot_device");
+	if (!boot_device ||
+	    (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
+		if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
+			fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+
+	olinuxino_load_overlays(blob);
+
+	return 0;
+}
+#endif
+
+static void board_copro_image_process(ulong fw_image, size_t fw_size)
+{
+	int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
+
+	if (!rproc_is_initialized())
+		if (rproc_init()) {
+			log_err("Remote Processor %d initialization failed\n",
+				id);
+			return;
+		}
+
+	ret = rproc_load(id, fw_image, fw_size);
+	log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
+		id, fw_image, fw_size, ret ? " Failed!" : " Success!");
+
+	if (!ret)
+		rproc_start(id);
+}
+
+U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);
diff --git a/common/iomux.c b/common/iomux.c
index b9088aa3b58..c428f7110a7 100644
--- a/common/iomux.c
+++ b/common/iomux.c
@@ -158,8 +158,12 @@ int iomux_replace_device(const int console, const char *old, const char *new)
 			return -ENOMEM;
 		}
 
-		strcat(tmp, ",");
-		strcat(tmp, name);
+		if (arg) {
+			strcat(tmp, ",");
+			strcat(tmp, name);
+		}
+		else
+			strcpy(tmp, name);
 
 		arg = tmp;
 		size = strlen(tmp) + 1;
diff --git a/configs/A10-OLinuXino_defconfig b/configs/A10-OLinuXino_defconfig
index 9258456789f..78bbb20bd47 100644
--- a/configs/A10-OLinuXino_defconfig
+++ b/configs/A10-OLinuXino_defconfig
@@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_MTD=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
 
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_EXT4=y
 CONFIG_ENV_EXT4_INTERFACE="mmc"
 CONFIG_ENV_EXT4_DEVICE_AND_PART=""
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index a05d25441ad..f782dac9061 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN5I=y
 CONFIG_DRAM_CLK=360
 CONFIG_DRAM_EMR1=0
+CONFIG_DRAM_ODT_EN=y
 CONFIG_MMC0_CD_PIN="PG0"
 CONFIG_USB0_VBUS_DET="PG1"
 CONFIG_USB1_VBUS_PIN="PG11"
@@ -34,6 +35,7 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_ENV_FAT_DEVICE_AND_PART=""
 
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_EXT4=y
 CONFIG_ENV_EXT4_INTERFACE="mmc"
 CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto"
diff --git a/configs/A20-OLinuXino_defconfig b/configs/A20-OLinuXino_defconfig
index 317b5986a72..2692336a52c 100644
--- a/configs/A20-OLinuXino_defconfig
+++ b/configs/A20-OLinuXino_defconfig
@@ -56,6 +56,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
 
 CONFIG_ENV_FAT_DEVICE_AND_PART=""
 
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_EXT4=y
 CONFIG_ENV_EXT4_INTERFACE="mmc"
 CONFIG_ENV_EXT4_DEVICE_AND_PART=""
diff --git a/configs/A64-OLinuXino_defconfig b/configs/A64-OLinuXino_defconfig
index 06d41a06643..568b6489069 100644
--- a/configs/A64-OLinuXino_defconfig
+++ b/configs/A64-OLinuXino_defconfig
@@ -18,6 +18,8 @@ CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+
+CONFIG_ENV_OVERWRITE=y
 # CONFIG_ENV_IS_IN_FAT is not set
 CONFIG_ENV_IS_IN_EXT4=y
 CONFIG_ENV_EXT4_INTERFACE="mmc"
diff --git a/configs/S3-OLinuXino_defconfig b/configs/S3-OLinuXino_defconfig
new file mode 100644
index 00000000000..e58d6a0095b
--- /dev/null
+++ b/configs/S3-OLinuXino_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN8I_V3S=y
+CONFIG_SUNXI_DRAM_DDR3_1333=y
+CONFIG_DRAM_CLK=504
+CONFIG_DRAM_ODT_EN=y
+CONFIG_I2C0_ENABLE=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-olinuxino"
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_NETDEVICES is not set
+CONFIG_AXP209_POWER=y
+CONFIG_AXP_DCDC2_VOLT=1200
+CONFIG_AXP_DCDC3_VOLT=3300
+CONFIG_CONS_INDEX=2
diff --git a/configs/STM32-OLinuXino-LIME_defconfig b/configs/STM32-OLinuXino-LIME_defconfig
new file mode 100644
index 00000000000..01b2dba40f7
--- /dev/null
+++ b/configs/STM32-OLinuXino-LIME_defconfig
@@ -0,0 +1,155 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STM32MP=y
+CONFIG_SYS_MALLOC_F_LEN=0x3000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_OFFSET=0x280000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_SPL=y
+#CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_TARGET_OLIMEX_STM32MP1=y
+CONFIG_ENV_OFFSET_REDUND=0x2C0000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+# CONFIG_ARMV7_VIRT is not set
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SYS_PROMPT="STM32MP> "
+# CONFIG_CMD_POWEROFF is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_USB_MASS_STORAGE is not set
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+# CONFIG_CMD_PMIC is not set
+# CONFIG_CMD_REGULATOR is not set
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_UBI=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="stm32mp1-olinuxino-lime"
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_EXT4=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_ENV_EXT4_INTERFACE="mmc"
+CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto"
+CONFIG_ENV_EXT4_FILE="/uboot.env"
+CONFIG_ENV_UBI_PART="UBI"
+CONFIG_ENV_UBI_VOLUME="uboot_config"
+CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=-1
+CONFIG_STM32_ADC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_MTD=y
+CONFIG_DFU_VIRT=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
+# CONFIG_FASTBOOT_BUF_ADDR is not set
+# CONFIG_FASTBOOT_BUF_SIZE is not set
+# CONFIG_FASTBOOT_USB_DEV is not set
+# CONFIG_FASTBOOT_FLASH is not set
+# CONFIG_FASTBOOT_FLASH_MMC_DEV is not set
+CONFIG_DM_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_STM32=y
+CONFIG_DM_I2C=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_STM32_IPCC=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_STM32_SDMMC2=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_STM32_FMC2=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_PHY=y
+CONFIG_PHY_STM32_USBPHYC=y
+CONFIG_PINCONF=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_STMFX=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+# CONFIG_PMIC_STPMIC1 is not set
+CONFIG_AXP_PMIC_BUS=y
+CONFIG_AXP209_POWER=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_DM_REGULATOR_STM32_VREFBUF is not set 
+# CONFIG_DM_REGULATOR_STPMIC1 is not set
+CONFIG_REMOTEPROC_STM32_COPRO=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_STM32MP1=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_STM32=y
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_STM32_QSPI=y
+CONFIG_STM32_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+# CONFIG_USB_GADGET is not set
+CONFIG_DM_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=1280
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_FDT_FIXUP_PARTITIONS=y
+
+CONFIG_DM_MDIO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/STM32-OLinuXino-SOM_defconfig b/configs/STM32-OLinuXino-SOM_defconfig
new file mode 100644
index 00000000000..903296bdf0f
--- /dev/null
+++ b/configs/STM32-OLinuXino-SOM_defconfig
@@ -0,0 +1,154 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STM32MP=y
+CONFIG_SYS_MALLOC_F_LEN=0x3000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_OFFSET=0x280000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_SPL=y
+CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_ENV_OFFSET_REDUND=0x2C0000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+# CONFIG_ARMV7_VIRT is not set
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SYS_PROMPT="STM32MP> "
+# CONFIG_CMD_POWEROFF is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_USB_MASS_STORAGE is not set
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+# CONFIG_CMD_PMIC is not set
+# CONFIG_CMD_REGULATOR is not set
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_UBI=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="stm32mp1-olinuxino-som"
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_EXT4=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_ENV_EXT4_INTERFACE="mmc"
+CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto"
+CONFIG_ENV_EXT4_FILE="/uboot.env"
+CONFIG_ENV_UBI_PART="UBI"
+CONFIG_ENV_UBI_VOLUME="uboot_config"
+CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=-1
+CONFIG_STM32_ADC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_MTD=y
+CONFIG_DFU_VIRT=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
+# CONFIG_FASTBOOT_BUF_ADDR is not set
+# CONFIG_FASTBOOT_BUF_SIZE is not set
+# CONFIG_FASTBOOT_USB_DEV is not set
+# CONFIG_FASTBOOT_FLASH is not set
+# CONFIG_FASTBOOT_FLASH_MMC_DEV is not set
+CONFIG_DM_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_STM32=y
+CONFIG_DM_I2C=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_STM32_IPCC=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_STM32_SDMMC2=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_STM32_FMC2=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_PHY=y
+CONFIG_PHY_STM32_USBPHYC=y
+CONFIG_PINCONF=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_STMFX=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+# CONFIG_PMIC_STPMIC1 is not set
+CONFIG_AXP_PMIC_BUS=y
+CONFIG_AXP209_POWER=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_DM_REGULATOR_STM32_VREFBUF is not set 
+# CONFIG_DM_REGULATOR_STPMIC1 is not set
+CONFIG_REMOTEPROC_STM32_COPRO=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_STM32MP1=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_STM32=y
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_STM32_QSPI=y
+CONFIG_STM32_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+# CONFIG_USB_GADGET is not set
+CONFIG_DM_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=1280
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_FDT_FIXUP_PARTITIONS=y
+
+CONFIG_DM_MDIO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/debian/bin/u-boot-install b/debian/bin/u-boot-install
index 4f209324bc4..88a4ffe9f09 100755
--- a/debian/bin/u-boot-install
+++ b/debian/bin/u-boot-install
@@ -18,11 +18,11 @@ function get_root_device
 		esac
 	done
 	[[ -z ${UUID} ]] && return ""
-
 	local PARTITION=$(blkid | grep "${UUID#PARTUUID=}" | cut -d':' -f1)
-	[[ -z ${PARTITION} ]] && return ""
-
-	# The following doesn't work on debian sid.
+	if [[ -z ${PARTITION} ]] ; then
+		local PARTITION=$(cat /proc/mounts  |grep " / " | cut -d' ' -f1)
+		[[ -z ${PARTITION} ]] && return ""
+	fi
 	DEVICE=$(lsblk -n -o PKNAME "${PARTITION}" | head -n1)
 
 	# Try regex expression
@@ -72,12 +72,56 @@ function install_sunxi
 
 }
 
+function install_stm32mp1xx
+{
+	DEV=$1
+
+	SPL="/usr/lib/u-boot-olinuxino/${TARGET}/u-boot-spl.stm32"
+
+	if [[ ! -e ${SPL} ]]; then
+		echo >&2 "$0: the file \'${SPL}\' is missing"
+		exit 1
+	fi
+
+	UBOOT="/usr/lib/u-boot-olinuxino/${TARGET}/u-boot.img"
+
+	if [[ ! -e ${UBOOT} ]]; then
+		echo >&2 "$0: the file \'${UBOOT}\' is missing"
+		exit 1
+	fi
+
+	# Try to detect the root device
+	if [[ -z ${DEV} ]]; then
+		DEV=$(get_root_device)
+		if [[ -z ${DEV} ]]; then
+			echo >&2 "$0: failed to detect the root device"
+			exit 1
+		fi
+	fi
+
+	if [[ ! -w ${DEV} ]]; then
+		echo >&2 "$0: device/image ($DEV) must be writable"
+		exit 1
+	fi
+
+	echo "Writing u-boot-spl.stm32"
+	dd if=${SPL} of=${DEV}p1
+	dd if=${SPL} of=${DEV}p2
+
+	echo "Writing u-boot.img"
+	dd if=${UBOOT} of=${DEV}p3
+
+}
+
 # Detect family
 for comp in $(cat "/proc/device-tree/compatible" | tr '\0' '\n'); do
 	if [[ "${comp}" == "allwinner,sun"* ]]; then
 		soc=$(cut -d',' -f2 <<< ${comp})
-	elif [[ "${comp}" == "olimex,"* ]]; then
-		board="${comp}"
+	elif [[ "${comp}" == "st,stm32mp1"* ]]; then
+		soc=$(cut -d',' -f2 <<< ${comp})
+	fi
+	if [[ "${comp}" == "olimex,"* ]]; then
+		board=$(cut -d',' -f2 <<< ${comp})
 	fi
 done
 
@@ -108,6 +152,16 @@ if [[ -z "${TARGET}" ]]; then
 			INSTALL_FUNC=install_sunxi
 			;;
 
+		"stm32mp1"*)
+			if [[ "${board}" == "stm32mp1xx-olinuxino-lime" ]] ; then
+				TARGET="stm32mp1-olinuxino-lime"
+			fi
+			if [[ "${board}" == "stm32mp1xx-olinuxino-som" ]] ; then
+				TARGET="stm32mp1-olinuxino-som"
+			fi
+			INSTALL_FUNC=install_stm32mp1xx
+			;;
+
 		*)
 			echo >&2 "$0: Unsupported sunxi family: ${soc}."
 			exit 1;
diff --git a/debian/targets b/debian/targets
index 41ac48a298d..e2ed4b7028a 100644
--- a/debian/targets
+++ b/debian/targets
@@ -4,3 +4,5 @@ armhf	a20-olinuxino	A20-OLinuXino	u-boot-sunxi-with-spl.bin
 armhf	a10-olinuxino	A10-OLinuXino	u-boot-sunxi-with-spl.bin
 armhf	a13-olinuxino	A13-OLinuXino	u-boot-sunxi-with-spl.bin
 arm64	a64-olinuxino	A64-OLinuXino	u-boot-sunxi-with-spl.bin
+armhf   stm32mp1-olinuxino-lime STM32-OLinuXino-LIME u-boot.img u-boot-spl.stm32
+armhf   stm32mp1-olinuxino-som STM32-OLinuXino-SOM u-boot.img u-boot-spl.stm32
diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c
index 73058cf40b4..90bf4b84ffa 100644
--- a/drivers/gpio/axp_gpio.c
+++ b/drivers/gpio/axp_gpio.c
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <asm/gpio.h>
 #include <axp_pmic.h>
 #include <dm.h>
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index 02d859a0398..15e6e1dd2b0 100644
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -364,6 +364,7 @@ static int stm32_usbphyc_probe(struct udevice *dev)
 	}
 
 	/* get usbphyc regulator */
+#if defined(CONFIG_PMIC_STPMIC1)
 	ret = device_get_supply_regulator(dev, "vdda1v1-supply",
 					  &usbphyc->vdda1v1);
 	if (ret) {
@@ -377,6 +378,7 @@ static int stm32_usbphyc_probe(struct udevice *dev)
 		dev_err(dev, "Can't get vdda1v8-supply regulator\n");
 		return ret;
 	}
+#endif
 
 	/*
 	 * parse all PHY subnodes in order to populate regulator associated
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index c5fbf1f832a..f849d0117a9 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -8,9 +8,15 @@ source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
 
+config AXP_PMIC_BUS
+	bool "Sunxi AXP PMIC bus access helpers"
+	help
+	  Select this PMIC bus access helpers for Sunxi platform PRCM or other
+	  AXP family PMIC devices.
+
 choice
 	prompt "Select Sunxi PMIC Variant"
-	depends on ARCH_SUNXI
+	depends on ARCH_SUNXI || ARCH_STM32MP
 	default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 	default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
 	default AXP305_POWER if MACH_SUN50I_H616
@@ -33,7 +39,7 @@ config AXP152_POWER
 
 config AXP209_POWER
 	bool "axp209 pmic support"
-	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_V3S
+	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_V3S || ARCH_STM32MP
 	select AXP_PMIC_BUS
 	select CMD_POWEROFF
 	---help---
diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
index d6e36125c12..3eb60ce4ecd 100644
--- a/drivers/power/axp152.c
+++ b/drivers/power/axp152.c
@@ -5,7 +5,7 @@
  */
 #include <common.h>
 #include <command.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <axp_pmic.h>
 
 static u8 axp152_mvolt_to_target(int mvolt, int min, int max, int div)
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index ade531940b9..6ab7aa5bf88 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <command.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <axp_pmic.h>
 #include <linux/delay.h>
 
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index 3446fe7365d..e35a8765787 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <command.h>
 #include <errno.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <axp_pmic.h>
 
 static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div)
diff --git a/drivers/power/axp305.c b/drivers/power/axp305.c
index 0191e4d427e..bfadea6e000 100644
--- a/drivers/power/axp305.c
+++ b/drivers/power/axp305.c
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <command.h>
 #include <errno.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <axp_pmic.h>
 
 #define AXP305_DCDC4_1600MV_OFFSET 46
diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c
index 6323492b66d..e438a13509f 100644
--- a/drivers/power/axp809.c
+++ b/drivers/power/axp809.c
@@ -14,7 +14,7 @@
 #include <command.h>
 #include <errno.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <axp_pmic.h>
 
 static u8 axp809_mvolt_to_cfg(int mvolt, int min, int max, int div)
diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c
index 0531707c8aa..df69927c841 100644
--- a/drivers/power/axp818.c
+++ b/drivers/power/axp818.c
@@ -14,7 +14,7 @@
 #include <command.h>
 #include <errno.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/pmic_bus.h>
+#include <power/pmic_bus.h>
 #include <axp_pmic.h>
 
 static u8 axp818_mvolt_to_cfg(int mvolt, int min, int max, int div)
diff --git a/include/configs/olimex_stm32mp1.h b/include/configs/olimex_stm32mp1.h
new file mode 100644
index 00000000000..8f864e6f5a9
--- /dev/null
+++ b/include/configs/olimex_stm32mp1.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ *
+ * Configuration settings for the DH STM32MP15x SoMs
+ */
+
+#ifndef __CONFIG_OLIMEX_STM32MP1_H__
+#define __CONFIG_OLIMEX_STM32MP1_H__
+
+#include <configs/stm32mp1.h>
+
+#define OLINUXINO_EEPROM_BUS		0
+#endif
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index db2117a3d7c..9a8a61a6156 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp1.h
@@ -77,6 +77,8 @@
 /*****************************************************************************/
 #ifdef CONFIG_DISTRO_DEFAULTS
 /*****************************************************************************/
+#define OLINUXINO_EEPROM_BUS 0
+#define OLINUXINO_EEPROM_ADDRESS 0x50
 
 #if !defined(CONFIG_SPL_BUILD)
 
@@ -128,7 +130,6 @@
 	"if test ${boot_device} = serial || test ${boot_device} = usb;" \
 	"then stm32prog ${boot_device} ${boot_instance}; " \
 	"else " \
-		"run env_check;" \
 		"if test ${boot_device} = mmc;" \
 		"then env set boot_targets \"mmc${boot_instance}\"; fi;" \
 		"if test ${boot_device} = nand ||" \
diff --git a/include/configs/stm32mp1_olinuxino.h b/include/configs/stm32mp1_olinuxino.h
new file mode 100644
index 00000000000..1d62f229d0b
--- /dev/null
+++ b/include/configs/stm32mp1_olinuxino.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ *
+ * Configuration settings for the DH STM32MP15x SoMs
+ */
+
+#ifndef __CONFIG_STM32MP1_OLINUXINO_H__
+#define __CONFIG_STM32MP1_OLINUXINO_H__
+
+#include <configs/stm32mp1.h>
+
+//#define CONFIG_SPL_TARGET		"u-boot.itb"
+#define OLINUXINO_EEPROM_BUS 0
+#define OLINUXINO_EEPROM_ADDRESS 0x50
+#endif
diff --git a/arch/arm/include/asm/arch-sunxi/pmic_bus.h b/include/power/pmic_bus.h
similarity index 100%
rename from arch/arm/include/asm/arch-sunxi/pmic_bus.h
rename to include/power/pmic_bus.h