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adding one-hot FSM prac

Jasonliuuuupushed 2 commits to main • 61dbb35…b9a1099 • 
8 days ago

Lemmings 2 practice again

Jasonliuuuupushed 1 commit to main • abeed5a…61dbb35 • 
24 days ago

Lemmings 1 practice again

Jasonliuuuupushed 1 commit to main • 6b65b2e…abeed5a • 
26 days ago

Create file for clarify

Jasonliuuuupushed 1 commit to main • 14be746…6b65b2e • 
on Jan 7

FSM - lemmings practice upload

Jasonliuuuupushed 1 commit to main • e65dd9e…14be746 • 
on Dec 10, 2024

FSM_2 update

Jasonliuuuupushed 1 commit to main • ce4d6a0…e65dd9e • 
on Dec 9, 2024

FSM begin

Jasonliuuuupushed 1 commit to main • 77ce301…ce4d6a0 • 
on Dec 9, 2024

Counter upload

Jasonliuuuupushed 1 commit to main • 533c11c…77ce301 • 
on Dec 1, 2024

Practice K map and sequentail circuit

Jasonliuuuupushed 1 commit to main • c1d55e5…533c11c • 
on Nov 30, 2024

Multiplexers & Arithmetic Circuits finished

Jasonliuuuupushed 1 commit to main • 5be904d…c1d55e5 • 
on Nov 16, 2024

Combinational Logic - Basic Gates upload

Jasonliuuuupushed 1 commit to main • 4bec893…5be904d • 
on Nov 14, 2024

Add Procedures and More Verilog Features

Jasonliuuuupushed 1 commit to main • 62e54a4…4bec893 • 
on Nov 11, 2024

Readme instruction

Jasonliuuuupushed 1 commit to main • c679824…62e54a4 • 
on Nov 10, 2024

Initial commit

Jasonliuuuupushed 1 commit to main • ab5c0f3…c679824 • 
on Nov 10, 2024

Initial commit

Jasonliuuuucreated main • ab5c0f3 • 
on Nov 10, 2024