Interfacing Graphic Displays with Parallel Port to the SPI Bus

[GeorgHelmut]

SPI Interface for TFT.pdf
Connecting Graphic displays with parallel interface to the SPI without loosing speed but reducing the number of IOs. Is this possible? Yes, I developed some interface converters for this job. See the attached PDF.

[Bodmer]

That is how typical Raspberry Pi TFT's work, they use a 16 bit shift register but design issues with the way the write strobe is generated in that design limits the speed to 20Mbps.
The MHS 4.0 Raspberry Pi TFT uses a bespoke serial to parallel chip and that works very well at 80Mbps.
Generally SPI is slower than direct parallel. A SPI to parallel interface would however be of benefit for displays that only accept low bit rates since these displays accept higher bit rates in parallel mode.

[Bodmer]

Incidentally, I modified a Raspberry Pi TFT so it had a GPIO controlled write strobe. This means that for a block fill, a colour can be loaded into the 16 bit shift register and the WR toggled very fast N times, where N Is the number of pixels to write. This means a 320x480 screen can be cleared in less that 10ms.

[GeorgHelmut]

I fully agree with your statements. In my region the parallel port displays are available on very reasonable prices. But often those can not be used in low cost applications as the number of IOs is not available. This is the reason for starting this development. As the idea is the merging of reasonable displays to low cost systems the interface must also consist of reasonable components only. For the frequency used by the Arduions the speed of the 74HC is more than sufficient.
As per the specification of 74HC they should also work on higher frequency, but I never tested the limits.