From 00f6bc68272fabd2b5b718e2ca4372992316bae9 Mon Sep 17 00:00:00 2001 From: Rahul Krishna Date: Sun, 20 Sep 2020 21:36:12 +0530 Subject: [PATCH] sdm660-common: Update NFC configs * from UL-ASUS_X01BD-WW-17.2018.2004.424-user build * Uprev nfc hal Change-Id: Ic96e04c05ba230a96bc8e1b042faf1b0d5ded5db --- configs/nfc/libnfc-nci.conf | 43 +-- configs/nfc/libnfc-nxp.conf | 345 ++++++++++++------ manifest.xml | 20 +- rootdir/etc/init.qcom.asus.rc | 5 - sdm660.mk | 2 +- sepolicy/vendor/hal_secure_element_default.te | 1 - 6 files changed, 257 insertions(+), 159 deletions(-) delete mode 100644 sepolicy/vendor/hal_secure_element_default.te diff --git a/configs/nfc/libnfc-nci.conf b/configs/nfc/libnfc-nci.conf index ced224c3..4cbe3694 100644 --- a/configs/nfc/libnfc-nci.conf +++ b/configs/nfc/libnfc-nci.conf @@ -1,4 +1,4 @@ -###################### Start of libnfc-nci.conf ####################### +###################### Start of libnfc-common.conf ####################### ############################################################################### # Application options @@ -9,12 +9,7 @@ NFC_DEBUG_ENABLED=0x01 ############################################################################### # File used for NFA storage -NFA_STORAGE="/data/vendor/nfc" - -############################################################################### -# Configure the default Destination Gate used by HCI (the default is 4, which -# is the ETSI loopback gate. -NFA_HCI_DEFAULT_DEST_GATE=0xF0 +NFA_STORAGE="/data/nfc" ############################################################################### # Force UICC to only listen to the following technology(s). @@ -22,6 +17,11 @@ NFA_HCI_DEFAULT_DEST_GATE=0xF0 # Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F UICC_LISTEN_TECH_MASK=0x07 +############################################################################### +# Configure the default Destination Gate used by HCI (the default is 4, which +# is the ETSI loopback gate. +NFA_HCI_DEFAULT_DEST_GATE=0xF0 + ############################################################################### # Forcing HOST to listen for a selected protocol # 0x00 : Disable Host Listen @@ -51,11 +51,18 @@ AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00} SCREEN_OFF_POWER_STATE=1 ############################################################################### -# Maximum Number of Credits to be allowed by the NFCC -# This value overrides what the NFCC specifices allowing the host to have -# the control to work-around transport limitations. If this value does -# not exist or is set to 0, the NFCC will provide the number of credits. -MAX_RF_DATA_CREDITS=1 +# Firmware patch format, Only 1 and 5 should be set +# 0 -> NFC Default +# 1 -> EMVCO Default +# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process +# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF +# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF +NFA_CONFIG_FORMAT=1 + +############################################################################### +# Default poll duration (in ms) +# The defualt is 500ms if not set (see nfc_target.h) +#NFA_DM_DISC_DURATION_POLL=333 ############################################################################### # Force tag polling for the following technology(s). @@ -91,17 +98,9 @@ P2P_LISTEN_TECH_MASK=0xC5 PRESERVE_STORAGE=0x01 ############################################################################### -# Override the stack default for NFA_EE_MAX_EE_SUPPORTED set in nfc_target.h. -# The value is set assumeing discovery of 0x00(Host), 0xC0(Ese) and 0x80(UICC). -# If a platform will exclude and SE, this value can be reduced so that the stack -# will not wait any longer than necessary. -# Maximum EE supported number -NFA_MAX_EE_SUPPORTED=0x02 - -############################################################################## # Deactivate notification wait time out in seconds used in ETSI Reader mode # 0 - Infinite wait -NFA_DM_DISC_NTF_TIMEOUT=100 +NFA_DM_DISC_NTF_TIMEOUT=0 ############################################################################### # AID_MATCHING constants @@ -109,3 +108,5 @@ NFA_DM_DISC_NTF_TIMEOUT=100 # AID_MATCHING_EXACT_OR_PREFIX 0x01 # AID_MATCHING_PREFIX_ONLY 0x02 AID_MATCHING_MODE=0x01 + +############################################################################### \ No newline at end of file diff --git a/configs/nfc/libnfc-nxp.conf b/configs/nfc/libnfc-nxp.conf index 7d908fe3..18f11622 100644 --- a/configs/nfc/libnfc-nxp.conf +++ b/configs/nfc/libnfc-nxp.conf @@ -25,15 +25,11 @@ MIFARE_READER_ENABLE=0x01 ############################################################################### # Vzw Feature enable -# Disabled - 0x00 -# Enabled - 0x01 -VZW_FEATURE_ENABLE=0x00 +VZW_FEATURE_ENABLE=0x01 ############################################################################### -# Firmware file type -#.so file 0x01 -#.bin file 0x02 -NXP_FW_TYPE=0x01 +# File name for Firmware +NXP_FW_NAME="libpn553_fw.so" ############################################################################### # System clock source selection configuration @@ -73,9 +69,7 @@ NXP_NFC_MERGE_RF_PARAMS={20, 02, 04, 01, 85, 01, 01} ############################################################################### # Standby enable settings -# Disabled - 0x00 -# Enabled - 0x01 -NXP_CORE_STANDBY={2F, 00, 01, 01} +#NXP_CORE_STANDBY={2F, 00, 01, 01} ############################################################################### # NXP TVDD configurations settings @@ -90,60 +84,67 @@ NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, ############################################################################### #config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM, #monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms -NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, F2, 00, BA, 1E, 15, 00, D0, 0C} +NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C} ############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform +# DPC deactivated NXP_RF_CONF_BLK_1={ - 20, 02, E7, 1B, - A0, 0D, 06, 06, 37, 08, 76, 00, 00, - A0, 0D, 03, 24, 03, 7C, - A0, 0D, 06, 02, 35, 00, 3E, 00, 00, - A0, 0D, 06, 04, 35, F4, 05, 70, 02, - A0, 0D, 06, C2, 35, 00, 3E, 00, 03, - A0, 0D, 06, 04, 42, F8, 40, FF, FF, - A0, 0D, 04, 32, 42, F8, 40, - A0, 0D, 04, 46, 42, 68, 40, - A0, 0D, 04, 56, 42, 78, 40, - A0, 0D, 04, 5C, 42, 80, 40, - A0, 0D, 04, CA, 42, 68, 40, - A0, 0D, 06, 06, 42, 00, 03, F2, F2, - A0, 0D, 06, 32, 4A, 53, 07, 00, 1B, - A0, 0D, 06, 46, 4A, 33, 07, 00, 07, - A0, 0D, 06, 56, 4A, 43, 07, 00, 07, - A0, 0D, 06, 5C, 4A, 11, 07, 01, 07, - A0, 0D, 06, 34, 44, 77, 0A, 00, 00, - A0, 0D, 06, 48, 44, 65, 0A, 00, 00, - A0, 0D, 06, 58, 44, 55, 08, 00, 00, - A0, 0D, 06, 5E, 44, 55, 08, 00, 00, - A0, 0D, 06, CA, 44, 65, 0A, 00, 00, - A0, 0D, 06, 06, 44, 04, 04, C4, 00, - A0, 0D, 06, 34, 2D, DC, 20, 04, 00, - A0, 0D, 06, 48, 2D, 15, 34, 1F, 01, - A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01, - A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01, - A0, 0D, 06, CA, 2D, 15, 34, 1F, 01 +20, 02, 5C, 01, A0, 0B, 58, 10, 90, 90, 78, 0F, 4E, 32, 00, 3D, 9F, 00, 00, 3D, +9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, +9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, +9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, +9F, 00, 00, A7, 1F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00 } - - +############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform +# DLMA Deactivated NXP_RF_CONF_BLK_2={ - 20, 02, D6, 01, - A0, 34, D2, 23, 04, 18, 07, 40, 00, 20, 40, 00, BE, 23, 60, 00, 2B, 13, 40, 00, B8, 21, 60, 00, 38, 35, 00, 00, 18, 46, 08, 00, DE, 54, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 07, 00, 20, 40, 00, BE, 23, 60, 00, 2B, 13, 40, 00, B8, 21, 60, 00, 38, 35, 00, 00, 18, 46, 08, 00, DE, 54, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00 +20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 07, 40, 00, 20, 40, 00, BE, 23, 60, 00, +2B, 13, 40, 00, B8, 21, 60, 00, 38, 35, 00, 00, 18, 46, 08, 00, DE, 54, 08, 02, +00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, +00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, +00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, +00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 07, 00, 20, 40, +00, BE, 23, 60, 00, 2B, 13, 40, 00, B8, 21, 60, 00, 38, 35, 00, 00, 18, 46, 08, +00, DE, 54, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, +02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, +01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, +00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00 } +############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform +#NXP_RF_CONF_BLK_3={ +#} -NXP_RF_CONF_BLK_3={ - 20, 02, 5B, 01, - A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00 -} +############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform +#NXP_RF_CONF_BLK_4={ +#} + +############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform +#NXP_RF_CONF_BLK_5={ +#} + +############################################################################### +# NXP RF configuration ALM/PLM settings +# This section needs to be updated with the correct values based on the platform +#NXP_RF_CONF_BLK_6={ +#} ############################################################################### # Set configuration optimization decision setting # Enable = 0x01 # Disable = 0x00 -NXP_SET_CONFIG_ALWAYS=0x01 - - +NXP_SET_CONFIG_ALWAYS=0x00 ############################################################################### # Core configuration extensions @@ -155,25 +156,23 @@ NXP_SET_CONFIG_ALWAYS=0x01 # PbF settings A008 # Clock timeout settings A004 # eSE (SVDD) PWR REQ settings A0F2 +# Window size A0D8 +# DWP Speed A0D5 # How eSE connected to PN553 A012 # UICC2 bit rate A0D1 # SWP1A interface A0D4 -# DWP intf behavior config, SVDD Load activated by default if set to 0x31 - A037 -NXP_CORE_CONF_EXTN={20, 02, 43, 0E, +# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037 +NXP_CORE_CONF_EXTN={20, 02, 29, 0A, A0, EC, 01, 01, - A0, ED, 01, 00, + A0, ED, 01, 01, A0, 5E, 01, 01, A0, 12, 01, 02, - A0, 40, 01, 00, - A0, 41, 01, 04, - A0, 42, 01, 19, - A0, 43, 01, 05, - A0, DD, 01, 2D, + A0, 40, 01, 01, A0, D1, 01, 02, A0, D4, 01, 01, A0, 37, 01, 35, - A0, 38, 04, 14, 0B, 0B, 00, - A0, 3A, 08, 5A, 00, 5A, 00, 5A, 00, 5A, 00 + A0, D8, 01, 02, + A0, D5, 01, 0A } # A0, F2, 01, 01, # A0, 40, 01, 01, @@ -184,36 +183,36 @@ NXP_CORE_CONF_EXTN={20, 02, 43, 0E, # A0, 07, 01, 03, # A0, 08, 01, 01 # } + ############################################################################### # Core configuration rf field filter settings to enable set to 01 to disable set # to 00 last bit NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 } +############################################################################### +# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set +# to 0x00 +NXP_I2C_FRAGMENTATION_ENABLED=0x00 + ############################################################################### # Core configuration settings -NXP_CORE_CONF={ 20, 02, 31, 0F, - 01, 01, 03, - 18, 01, 01, - 21, 01, 00, +NXP_CORE_CONF={ 20, 02, 2E, 0E, 28, 01, 00, + 21, 01, 00, 30, 01, 08, 31, 01, 03, - 32, 01, 20, - 33, 04, 01, 02, 03, 04, + 32, 01, 60, 38, 01, 01, - 50, 01, 02, + 33, 04, 01, 02, 03, 04, 54, 01, 06, + 50, 01, 02, 5B, 01, 00, 80, 01, 01, 81, 01, 01, - 82, 01, 0E + 82, 01, 0E, + 18, 01, 01 } -############################################################################### -# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set -# to 0x00 -NXP_I2C_FRAGMENTATION_ENABLED=0x00 - ############################################################################### # Mifare Classic Key settings #NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5, @@ -221,15 +220,25 @@ NXP_I2C_FRAGMENTATION_ENABLED=0x00 # A0, 53, 06, FF, FF, FF, FF, FF, FF, # A0, 54, 06, 00, 00, 00, 00, 00, 00} - ############################################################################### # Default SE Options # No secure element 0x00 # eSE 0x01 # UICC 0x02 # UICC2 0x04 +NXP_DEFAULT_SE=0x07 -NXP_DEFAULT_SE=0x02 +############################################################################### +# Force ESE to only listen to the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F +NXP_ESE_LISTEN_TECH_MASK=0x07 + +############################################################################### +#set autonomous mode +# disable autonomous 0x00 +# enable autonomous 0x01 +NXP_CORE_SCRN_OFF_AUTONOMOUS_ENABLE=0x00 ############################################################################### #Enable SWP full power mode when phone is power off @@ -245,7 +254,7 @@ NXP_SWP_FULL_PWR_ON=0x00 #PN67T 0x06 #PN553 0x07 #PN80T 0x08 -NXP_NFC_CHIP=0x07 +NXP_NFC_CHIP=0x08 ############################################################################### # CE when Screen state is locked @@ -256,19 +265,19 @@ NXP_NFC_CHIP=0x07 NXP_CE_ROUTE_STRICT_DISABLE=0x01 ############################################################################### +# amt_bsp modify timeout value to 0 to solve the problem of opening nfc slowly 2020/01/13 begin #Timeout in secs to get NFCEE Discover notification -NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20 - -############################################################################### -NXP_DEFAULT_NFCEE_TIMEOUT=20 +# NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20 +NXP_DEFAULT_NFCEE_DISC_TIMEOUT=0 ############################################################################### -#Timeout in secs -NXP_SWP_RD_START_TIMEOUT=0x0A +# NXP_DEFAULT_NFCEE_TIMEOUT=20 +NXP_DEFAULT_NFCEE_TIMEOUT=0 +# amt_bsp modify timeout value to 0 to solve the problem of opening nfc slowly 2020/01/13 end ############################################################################### #Timeout in secs -NXP_SWP_RD_TAG_OP_TIMEOUT=0x01 +NXP_SWP_RD_TAG_OP_TIMEOUT=0x20 ############################################################################### #Set the default AID route Location : @@ -277,25 +286,42 @@ NXP_SWP_RD_TAG_OP_TIMEOUT=0x01 # eSE 0x01 # UICC 0x02 # UICC2 0x03 -DEFAULT_AID_ROUTE=0x02 +DEFAULT_AID_ROUTE=0x00 ############################################################################### -#Set the Mifare Desfire route Location : -#This settings will be used when application does not set this parameter +# Configure the default NfcA/IsoDep techology and protocol route. Can be +# either a secure element (e.g. 0xF4) or the host (0x00) # host 0x00 # eSE 0x01 # UICC 0x02 -# UICC2 0x03 -DEFAULT_DESFIRE_ROUTE=0x02 +DEFAULT_ROUTE=0x00 ############################################################################### -#Set the Mifare CLT route Location : -#This settings will be used when application does not set this parameter +# Configure the single default SE to use. The default is to use the first +# SE that is detected by the stack. This value might be used when the phone +# supports multiple SE (e.g. 0xC0 and 0x80) but you want to force it to use +# one of them (e.g. 0xC0). # host 0x00 # eSE 0x01 # UICC 0x02 -# UICC2 0x03 -DEFAULT_MIFARE_CLT_ROUTE=0x02 +DEFAULT_OFFHOST_ROUTE=0x01 + +############################################################################### +# Configure the single default SE to use. The default is to use the first +# SE that is detected by the stack. This value might be used when the phone +# supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use +# one of them (e.g. 0xF4). +# host 0x00 +# eSE 0x01 +# UICC 0x02 +DEFAULT_NFCF_ROUTE=0x01 + +############################################################################### +#Set the default Felica T3T System Code OffHost route Location : +#This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0xC0 +DEFAULT_SYS_CODE_ROUTE=0xC0 ############################################################################### #Set the default AID Power state : @@ -305,7 +331,7 @@ DEFAULT_MIFARE_CLT_ROUTE=0x02 # bit pos 2 = Battery Off # bit pos 3 = Screen Lock # bit pos 4 = Screen Off -DEFAULT_AID_PWR_STATE=0x1B +DEFAULT_AID_PWR_STATE=0x19 ############################################################################### #Set the Mifare Desfire Power state : @@ -315,7 +341,7 @@ DEFAULT_AID_PWR_STATE=0x1B # bit pos 2 = Battery Off # bit pos 3 = Screen Lock # bit pos 4 = Screen Off -DEFAULT_DESFIRE_PWR_STATE=0x1B +DEFAULT_ROUTE_PWR_STATE=0x1B ############################################################################### #Set the Mifare CLT Power state : @@ -325,25 +351,40 @@ DEFAULT_DESFIRE_PWR_STATE=0x1B # bit pos 2 = Battery Off # bit pos 3 = Screen Lock # bit pos 4 = Screen Off -DEFAULT_MIFARE_CLT_PWR_STATE=0x1B +DEFAULT_OFFHOST_PWR_STATE=0x1B ############################################################################### -#Set the Felica CLT route Location : +#Set the Felica CLT Power state : #This settings will be used when application does not set this parameter -# eSE 0x01 -# UICC 0x02 -# UICC2 0x03 -DEFAULT_FELICA_CLT_ROUTE=0x02 +# bit pos 0 = Switch On +# bit pos 1 = Switch Off +# bit pos 2 = Battery Off +# bit pos 3 = Screen Lock +# bit pos 4 = Screen Off +DEFAULT_FELICA_CLT_PWR_STATE=0x1B ############################################################################### -#Set the Felica CLT Power state : +#Set the SYS_CODE Power state : #This settings will be used when application does not set this parameter # bit pos 0 = Switch On # bit pos 1 = Switch Off # bit pos 2 = Battery Off # bit pos 3 = Screen Lock # bit pos 4 = Screen Off -DEFAULT_FELICA_CLT_PWR_STATE=0x1B +DEFAULT_SYS_CODE_PWR_STATE=0x1B + +############################################################################### +# Configure the NFC Extras to open and use a static pipe. If the value is +# not set or set to 0, then the default is use a dynamic pipe based on a +# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value +# for each UICC (where F3="UICC0" and F4="UICC1") +OFF_HOST_ESE_PIPE_ID=0x19 +OFF_HOST_SIM_PIPE_ID=0x0A + +############################################################################### +# Bail out mode +# If set to 1, NFCC is using bail out mode for either Type A or Type B poll. +NFA_POLL_BAIL_OUT_MODE=0x01 ############################################################################### # AID Matching platform options @@ -426,7 +467,7 @@ NXP_ESE_WIRED_PRT_MASK=0x00 #set mask = 0 NXP_UICC_WIRED_PRT_MASK=0x00 -############################################################################### +################################################################################ #RF field true delay Wired Mode # delay wired mode = 1 # allow wired mode = 0 @@ -450,6 +491,20 @@ NXP_CP_TIMEOUT={00, 77} # Enable 0x01 NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01 +############################################################################### +# SVDD sync off Delay in ms it can be max 20 ms +# If out of range timeout used, default delay of 10ms will be set +NXP_SVDD_SYNC_OFF_DELAY=10 + +############################################################################### +#NXP_CN_TRANSIT_CMA_BYPASSMODE_ENABLE +#Enable this config it prevents EMVCo PICC compliancy and Mifare backward compatibility works +#Disable this config EMVCo PICC compliancy works and Mifare backward compatibility will not work +#Default config is Disable +#Enable 0x01 +#Disable 0x00 +NXP_CN_TRANSIT_CMA_BYPASSMODE_ENABLE=0x00 + ############################################################################### #NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE #Enable/Disable block number checks for china transit use case @@ -475,26 +530,70 @@ NXP_NCI_PARSER_LIBRARY=0x00 #L1 & L2 & Felica 0x05 #NXP_CORE_PROP_SYSTEM_DEBUG=0x00 +############################################################################### +# Wired mode resume timeout vaule in wired mode resume feature enable +# DWP resume time out in ms( 4 bytes hex value and LSB first) +#example 1000 = 0x03E8 +#exmaple 2000 = 0x07D0 +#example 500 = 0x01F4 +NXP_WIREDMODE_RESUME_TIMEOUT={E8,03,00,00} + +############################################################################### +# Power to eSE is controlled by DH or PMU depending on following configurations +#define DH_PWR_CONTROL 1 +#define PMU_PWR_CONTROL 2 +NXP_ESE_POWER_DH_CONTROL=1 + +############################################################################### +# Timeout value in milliseconds for wired mode resume after RF field event timeout +NXP_NFCC_RF_FIELD_EVENT_TIMEOUT=3000 + +############################################################################### +# NXP PMU Support configuration is sent if PMU_PWR_CONTROL is configured +# External PMU available in phone ON and phone OFF case if NXP_ESE_POWER_EXT_PMU=1 +# External PMU available only in phone ON case if NXP_ESE_POWER_EXT_PMU=2 +NXP_ESE_POWER_EXT_PMU=2 + +############################################################################### +# Whether to allow wired mode in desfire and mifare CLT +# Disable 0x00 +# Enable 0x01 +NXP_ALLOW_WIRED_IN_MIFARE_DESFIRE_CLT=0x00 + ############################################################################### # Enable/Disable Block Route feature. # Block Route will restrict routing to first matched rule # Block Route enable 0x01 # Block Route disable 0x00 -NFA_BLOCK_ROUTE=0x00 +AID_BLOCK_ROUTE=0x00 + +############################################################################### +# Send DWP interface reset command as part of SE open +# Disable 0x00 +# Enable 0x01 +NXP_DWP_INTF_RESET_ENABLE=0x00 + +############################################################################### +# Timeout value in milliseconds for JCOP OS download to complete +OS_DOWNLOAD_TIMEOUT_VALUE=60000 ############################################################################### # Timeout value in milliseconds to send response for Felica command received NXP_HCEF_CMD_RSP_TIMEOUT_VALUE=5000 ############################################################################### +# Maximum WTX requests entertained by MW +NXP_WM_MAX_WTX_COUNT=50 -# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1. -# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm -# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block -# 2 NFA_RW_PRES_CHK_RESET; Deactivate to Sleep, then re-activate -# 3 NFA_RW_PRES_CHK_RB_CH0; Type-4 tag protocol's ReadBinary command on channel 0 -# 4 NFA_RW_PRES_CHK_RB_CH3; Type-4 tag protocol's ReadBinary command on channel 3 -PRESENCE_CHECK_ALGORITHM=1 +############################################################################### +# HAL library path for selftest +NXP_HAL_PATH="/vendor/lib64/hw/nfc_nci.pn54x.so" + +############################################################################### +# Enable or Disable RF_STATUS_UPDATE to EseHal module +# Disable 0x00 +# Enable 0x01 +RF_STATUS_UPDATE_ENABLE=0x00 ############################################################################### # Vendor Specific Proprietary Protocol & Discovery Configuration @@ -508,6 +607,28 @@ PRESENCE_CHECK_ALGORITHM=1 # byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO # byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME # byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME -NFA_PROPRIETARY_CFG={05:FF:FF:06:81:80:70:FF:FF} +NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, 70, FF, FF} + +############################################################################### +#White list of Hosts +#This values will be the Hosts(NFCEEs) in the HCI Network. +DEVICE_HOST_WHITE_LIST={C0, 02} + +############################################################################### +# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1. +# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm +# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block +# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check +PRESENCE_CHECK_ALGORITHM=2 + +############################################################################### +# Extended APDU length for ISO_DEP +ISO_DEP_MAX_TRANSCEIVE=0xFEFF + +############################################################################### +# Disable Mifare CLT for JCOP4.1 +# Enable 0x01 +# Disable 0x00 +#NXP_MF_CLT_JCOP_CFG=0x01 ############################################################################### diff --git a/manifest.xml b/manifest.xml index 0900331e..ba5080e1 100644 --- a/manifest.xml +++ b/manifest.xml @@ -185,7 +185,7 @@ android.hardware.nfc hwbinder - 1.1 + 1.2 INfc default @@ -438,24 +438,6 @@ default - - vendor.nxp.nxpese - hwbinder - 1.0 - - INxpEse - default - - - - vendor.nxp.nxpnfc - hwbinder - 1.0 - - INxpNfc - default - - vendor.qti.data.factory hwbinder diff --git a/rootdir/etc/init.qcom.asus.rc b/rootdir/etc/init.qcom.asus.rc index 2743c9ca..7f074693 100644 --- a/rootdir/etc/init.qcom.asus.rc +++ b/rootdir/etc/init.qcom.asus.rc @@ -37,11 +37,6 @@ on boot chown system system /sys/class/power_supply/battery/device/smartchg_stop_charging chmod 0660 /sys/class/power_supply/battery/device/smartchg_stop_charging -on post-fs-data - # NFC local data and nfcee xml storage - mkdir /data/vendor/nfc 0770 nfc nfc - mkdir /data/vendor/nfc/param 0770 nfc nfc - on boot # Tap to wake node chown system system /proc/tpd_gesture diff --git a/sdm660.mk b/sdm660.mk index 4d527c6c..1e1045c3 100644 --- a/sdm660.mk +++ b/sdm660.mk @@ -256,7 +256,7 @@ PRODUCT_COPY_FILES += \ $(LOCAL_PATH)/configs/nfc/libnfc-nxp.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-nxp.conf PRODUCT_PACKAGES += \ - android.hardware.nfc@1.1-service + android.hardware.nfc@1.2-service PRODUCT_PACKAGES += \ com.android.nfc_extras \ diff --git a/sepolicy/vendor/hal_secure_element_default.te b/sepolicy/vendor/hal_secure_element_default.te deleted file mode 100644 index 6173ad36..00000000 --- a/sepolicy/vendor/hal_secure_element_default.te +++ /dev/null @@ -1 +0,0 @@ -allow hal_secure_element_default nxpese_hwservice:hwservice_manager { add find };