From f3209ded76e87ccde21ade105feb25b5c32e898b Mon Sep 17 00:00:00 2001 From: Kyle Date: Tue, 14 Apr 2020 17:16:55 +0100 Subject: [PATCH] Updated the use of the Bluetooth trademark to ensure that we are compliant (#888) --- consumer/aiml/getting-started/README.md | 2 +- consumer/avenger96/getting-started/README.md | 4 +- consumer/b2260/getting-started/README.md | 2 +- .../hardware-docs/hardware-user-manual.md | 4 +- .../bubblegum-96/getting-started/README.md | 4 +- .../chameleon96/getting-started/README.md | 4 +- .../getting-started/audio-kit/README.md | 2 +- .../getting-started/aws-kit/README.md | 2 +- .../getting-started/basic-kit/README.md | 2 +- .../hardware-docs/hardware-user-manual.md | 6 +- .../getting-started/rb3-kit/README.md | 6 +- .../hardware-docs/hardware-user-manual.md | 10 +- .../hikey/hikey620/getting-started/README.md | 4 +- consumer/hikey/hikey620/guides/README.md | 2 +- consumer/hikey/hikey620/guides/bluetooth.md | 8 +- .../hikey620/hardware-docs/hardware-notes.md | 2 +- .../hardware-docs/hardware-user-manual.md | 2 +- .../hardware-docs/hardware-user-manual.md | 4 +- .../hikey/hikey970/getting-started/README.md | 4 +- .../mediatekx20/getting-started/README.md | 2 +- .../hardware-docs/TestHWUserManual.rst | 362 +++++++++--------- .../hardware-docs/hardware-notes.md | 8 +- .../hardware-docs/hardware-user-manual.md | 16 +- .../mediatekx20pro/getting-started/README.md | 2 +- .../hardware-docs/hardware-notes.md | 8 +- .../hardware-docs/hardware-user-manual.md | 26 +- .../rock/rock960/getting-started/README.md | 2 +- .../hardware-docs/hardware-user-manual.md | 4 +- .../rock/rock960c/getting-started/README.md | 2 +- .../hardware-docs/hardware-user-manual.md | 6 +- .../sophon-edge/getting-started/README.md | 8 +- consumer/thor96/getting-started/README.md | 2 +- .../ultra96-v1/getting-started/README.md | 4 +- .../ultra96-v2/getting-started/README.md | 2 +- enterprise/ficus/getting-started/README.md | 2 +- .../hardware-docs/hardware-user-manual.md | 4 +- .../poplar-hoperun/getting-started/README.md | 2 +- enterprise/poplar-hoperun/guides/README.md | 2 +- .../hardware-docs/hw-user-manual.md | 6 +- enterprise/poplar/getting-started/README.md | 2 +- .../poplar/hardware-docs/hw-user-manual.md | 8 +- iot/README.md | 2 +- iot/carbon/getting-started/README.md | 4 +- .../hardware-docs/hardware-user-manual.md | 2 +- iot/ivy5661/getting-started/README.md | 8 +- iot/nitrogen/getting-started/README.md | 4 +- .../hardware-docs/hardware-user-manual.md | 8 +- 47 files changed, 291 insertions(+), 291 deletions(-) diff --git a/consumer/aiml/getting-started/README.md b/consumer/aiml/getting-started/README.md index 13bd009a2..a132c4677 100644 --- a/consumer/aiml/getting-started/README.md +++ b/consumer/aiml/getting-started/README.md @@ -39,7 +39,7 @@ In the Box you can find the AI_ML as well as a microSD card which comes with a p | RAM | 2 GB LPDDR4 @ 1,600 MHz Industrial Temp by Micron | | Storage | microSD Socket
512 Mb NOR FLASH on Octal-SPI
256 Kb EEPROM | | Ethernet Port | 10/100/1000 Mbit/s | -| Wireless | Cypress’ industry-leading 802.11ac Wi-Fi and Dual-Mode Bluetooth wireless connectivity | +| Wireless | Cypress’ industry-leading 802.11ac Wi-Fi and Dual-Mode _Bluetooth_® wireless technology | | USB | Host: 2x USB Type-A 3.0
OTG: 1x type micro-AB, 2.0 high-speed | | Display | HDMI Output
Dual MIPI DSI Support | | Expansion Interface | 96Boards Compliant:
40-Pin Low Speed Header
60-Pin High Speed Header | diff --git a/consumer/avenger96/getting-started/README.md b/consumer/avenger96/getting-started/README.md index 85cc71958..6c3cd25a0 100644 --- a/consumer/avenger96/getting-started/README.md +++ b/consumer/avenger96/getting-started/README.md @@ -39,7 +39,7 @@ In the Box you can find the Avenger96 as well as a microSD card which comes with | RAM | 1024 Mbyte @ 533MHz | | Storage | eMMC v4.51: 8 Gbyte
QSPI: 2Mbyte
EEPROM: 128 byte
microSD Socket: UHS-1 v3.01 | | Ethernet Port | 10/100/1000 Mbit/s, IEEE 802.3 Compliant | -| Wireless | WiFi: 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
Bluetooth®v4.2 (BR/EDR/BLE)
PCB Antenna | +| Wireless | WiFi: 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
_Bluetooth_® wireless technology v4.2 (BR/EDR/BLE)
PCB Antenna | | USB | Host: 2x type A, 2.0 high-speed
OTG: 1x type micro-AB, 2.0 high-speed | | Display | HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4 | | Audio | Over HDMI | @@ -58,7 +58,7 @@ In the Box you can find the Avenger96 as well as a microSD card which comes with This short guide leads you through the first steps to start exploring your Avenger96. **Easy Setup Guide** -- Make sure the boot switch is set to boot from the “SD-Card(Standard)” +- Make sure the boot switch is set to boot from the “SD-Card(Standard)” | Switch 1 | Switch 2 | Switch 3 | |:--------:|:--------:|:--------:| diff --git a/consumer/b2260/getting-started/README.md b/consumer/b2260/getting-started/README.md index 8bd83cfdc..e7afe3f7f 100644 --- a/consumer/b2260/getting-started/README.md +++ b/consumer/b2260/getting-started/README.md @@ -57,7 +57,7 @@ The B2260 is supplied with Micro SD card containig a preinstalled version of Deb | PMU | None | | Storage | Built-in MicroSD card reader | | Ethernet Port | Up to 1 Gb/s | -| Wireless | Wi-Fi 802.11 g/n, Bluetooth 4.0 LE | +| Wireless | Wi-Fi 802.11 g/n, _Bluetooth_® wireless technology 4.0 LE | | USB | 2 x USB2.0 Host (TypeA), 1x USB3.0 DRD Salve (Type micro AB), 1 x USB 2.0 host (on high-speed expansion connector) | | Display | 1 x HDMI 1.4 up to 1080p60 (TypeA) | | Video | Software video codecs | diff --git a/consumer/b2260/hardware-docs/hardware-user-manual.md b/consumer/b2260/hardware-docs/hardware-user-manual.md index dc5605f67..13194c674 100644 --- a/consumer/b2260/hardware-docs/hardware-user-manual.md +++ b/consumer/b2260/hardware-docs/hardware-user-manual.md @@ -27,14 +27,14 @@ The following table lists its key features: - Micro SD card slot - **Video** - Video Hardware/Software encoder/decoder -- **Audio** +- **Audio** - Audio Software encoder/decoder - Outputs: USB (digital), HDMI and PCM/I2S (via Low-speed expansion connector) - Inputs: USB (digital), PCM/I2S(via Low-speed expansion connector) - **Connectivity** - Ethernet Port Up to 1 GB - Wi-Fi 802.11 g/n - - Bluetooth 4.0 LE + - _Bluetooth_® wireless technology 4.0 LE - One USB 2.0 micro AB (host and device mode supported) - Two USB 2.0 (host mode only) - **I/O Interfaces** diff --git a/consumer/bubblegum-96/getting-started/README.md b/consumer/bubblegum-96/getting-started/README.md index 6aafe47ce..00ae1905b 100644 --- a/consumer/bubblegum-96/getting-started/README.md +++ b/consumer/bubblegum-96/getting-started/README.md @@ -53,7 +53,7 @@ The following subsections should describe how to get started with the Bubblegum- | PMU | ATC2609 | | Storage | 8GB eMMC 4.51 on board storage MicroSD card slot | | Ethernet Port | USB 2.0 expansion | -| Wireless | Wi-Fi 802.11 b/g/n 2.4GHz Dual-mode bluetooth and bluetooth low energy | +| Wireless | Wi-Fi 802.11 b/g/n 2.4GHz Dual-mode _Bluetooth_® wireless technology and Bluetooth low energy | | USB | 1 x USB2.0, 1 x USB3.0, 1 x USB 2.0 OTG | | Display | HDMI 1.4b with HDCP (HDMI connector type A/C), up to 4k Ultra | | Video | 1080p@60fps HD video playback and capture with H.264 (AVC), 4096*2304@30fps playback with H.265 (HEVC) | @@ -100,4 +100,4 @@ If you are already familiar with the Bubblegum-96 board and would like to change Back to the [Bubblegum-96 documentation home page](../) -*** +*** diff --git a/consumer/chameleon96/getting-started/README.md b/consumer/chameleon96/getting-started/README.md index befc7e129..e07837deb 100644 --- a/consumer/chameleon96/getting-started/README.md +++ b/consumer/chameleon96/getting-started/README.md @@ -42,7 +42,7 @@ The following subsections should describe how to get started with the Chameleon9 | GPU | Graphics based on Intel Video Suite for FPGA | | RAM | 512MB DDR3L (support to 1GByte) | | PMU | 4 to 64 GByte microSD | -| Connectivity | WLAN 802.11 b/g/n 2.4GHz, Bluetooth 4.1, One USB 2.0 OTG micro AB, Two USB 2.0 HOST +| Connectivity | WLAN 802.11 b/g/n 2.4GHz, _Bluetooth_® wireless technology 4.1, One USB 2.0 OTG micro AB, Two USB 2.0 HOST 1 USB 2.0 Host via expansion connector, Integrated USB-Blaster II JTAG cable | | USB | | | Display | Up to 1080p@60fps HD video through a HDMI interface | @@ -74,4 +74,4 @@ Back to the [Chameleon96 documentation home page](../) -*** +*** diff --git a/consumer/dragonboard/dragonboard410c/getting-started/audio-kit/README.md b/consumer/dragonboard/dragonboard410c/getting-started/audio-kit/README.md index c84518af6..af438e51c 100644 --- a/consumer/dragonboard/dragonboard410c/getting-started/audio-kit/README.md +++ b/consumer/dragonboard/dragonboard410c/getting-started/audio-kit/README.md @@ -59,7 +59,7 @@ The following subsections should describe how to get started with the DragonBoar | PMU | ??? | | Storage | 8GB eMMC 4.51 on board storage and MicroSD card slot | | Ethernet Port | USB 2.0 expansion | -| Wireless | WLAN 802.11 b/g/n 2.4 GHz, Bluetooth 4.1, GPS. On board GPS, BT and WLAN antennas | +| Wireless | WLAN 802.11 b/g/n 2.4 GHz, _Bluetooth_® wireless technology 4.1, GPS. On board GPS, BT and WLAN antennas | | USB | 2 x USB 2.0 Host 1 x USB 2.0 OTG | | Display | 1 x HDMI 1.4 (Type A - full) 1 x MIPI-DSI HDMI output up to FHD 1080P | | Video | 1080p@30fps HD video playback and capture with H.264 (AVC), and 720p playback with H.265 (HEVC) | diff --git a/consumer/dragonboard/dragonboard410c/getting-started/aws-kit/README.md b/consumer/dragonboard/dragonboard410c/getting-started/aws-kit/README.md index b7835c298..9da8349a5 100644 --- a/consumer/dragonboard/dragonboard410c/getting-started/aws-kit/README.md +++ b/consumer/dragonboard/dragonboard410c/getting-started/aws-kit/README.md @@ -57,7 +57,7 @@ The following subsections should describe how to get started with the DragonBoar | PMU | ??? | | Storage | 8GB eMMC 4.51 on board storage and MicroSD card slot | | Ethernet Port | USB 2.0 expansion | -| Wireless | WLAN 802.11 b/g/n 2.4 GHz, Bluetooth 4.1, GPS. On board GPS, BT and WLAN antennas | +| Wireless | WLAN 802.11 b/g/n 2.4 GHz, _Bluetooth_® wireless technology 4.1, GPS. On board GPS, BT and WLAN antennas | | USB | 2 x USB 2.0 Host 1 x USB 2.0 OTG | | Display | 1 x HDMI 1.4 (Type A - full) 1 x MIPI-DSI HDMI output up to FHD 1080P | | Video | 1080p@30fps HD video playback and capture with H.264 (AVC), and 720p playback with H.265 (HEVC) | diff --git a/consumer/dragonboard/dragonboard410c/getting-started/basic-kit/README.md b/consumer/dragonboard/dragonboard410c/getting-started/basic-kit/README.md index e58acf678..800dca5ee 100644 --- a/consumer/dragonboard/dragonboard410c/getting-started/basic-kit/README.md +++ b/consumer/dragonboard/dragonboard410c/getting-started/basic-kit/README.md @@ -56,7 +56,7 @@ The following subsections should describe how to get started with the DragonBoar | PMU | ??? | | Storage | 8GB eMMC 4.51 on board storage and MicroSD card slot | | Ethernet Port | USB 2.0 expansion | -| Wireless | WLAN 802.11 b/g/n 2.4 GHz, Bluetooth 4.1, GPS. On board GPS, BT and WLAN antennas | +| Wireless | WLAN 802.11 b/g/n 2.4 GHz, _Bluetooth_® wireless technology 4.1, GPS. On board GPS, BT and WLAN antennas | | USB | 2 x USB 2.0 Host 1 x USB 2.0 OTG | | Display | 1 x HDMI 1.4 (Type A - full) 1 x MIPI-DSI HDMI output up to FHD 1080P | | Video | 1080p@30fps HD video playback and capture with H.264 (AVC), and 720p playback with H.265 (HEVC) | diff --git a/consumer/dragonboard/dragonboard410c/hardware-docs/hardware-user-manual.md b/consumer/dragonboard/dragonboard410c/hardware-docs/hardware-user-manual.md index 35276c48b..b9e90c1cf 100644 --- a/consumer/dragonboard/dragonboard410c/hardware-docs/hardware-user-manual.md +++ b/consumer/dragonboard/dragonboard410c/hardware-docs/hardware-user-manual.md @@ -121,7 +121,7 @@ The following table lists it's key features: - PCM/AAC+/MP3/WMA, ECNS, Audio+ post-processing (optional) - **Connectivity**: - WLAN 802.11 b/g/n 2.4GHz - - Bluetooth 4.1 + - _Bluetooth_® wireless technology 4.1 - One USB 2.0 micro B (device mode only) - Two USB 2.0 (host mode only) - GPS @@ -242,7 +242,7 @@ boot up. ### Processor -The Snapdragon 410 APQ8016 is a quad 64-bit ARM Cortex-A53 MPcore Harvard Superscalar core, supports both LP-DDR2 / LP-DDR3 SDRAM interface, Hexagon QDSP6, 13.5 MP camera input support, Adreno 306 GPU, 1080p video encode/decode, gpsOneGen 8C with GLONASS, Bluetooth 4.1, OpenGL ES 3.0, DirectX, OpenCL, Renderscript Compute, FlexRender support. +The Snapdragon 410 APQ8016 is a quad 64-bit ARM Cortex-A53 MPcore Harvard Superscalar core, supports both LP-DDR2 / LP-DDR3 SDRAM interface, Hexagon QDSP6, 13.5 MP camera input support, Adreno 306 GPU, 1080p video encode/decode, gpsOneGen 8C with GLONASS, _Bluetooth_® wireless technology 4.1, OpenGL ES 3.0, DirectX, OpenCL, Renderscript Compute, FlexRender support. ### Memory (DRAM) @@ -577,7 +577,7 @@ SYS_DCIN: Can serves as the board’s main power source or can receive power fro |USB_HS_D_M_EXP | USB_D- |53 |54 | CSI1_C+ | MIPI_CSI1_CLK_P | |GND | GND |55 |56 | CSI1_C- | MIPI_CSI1_CLK_M | |N.C. | HSIC_STR |57 |58 | GND | GND | -|N.C. | HSIC_DATA |59 |60 | RESERVED | N.C. | +|N.C. | HSIC_DATA |59 |60 | RESERVED | N.C. | #### MIPI DSI 0 diff --git a/consumer/dragonboard/dragonboard845c/getting-started/rb3-kit/README.md b/consumer/dragonboard/dragonboard845c/getting-started/rb3-kit/README.md index c94ace388..318f34dda 100644 --- a/consumer/dragonboard/dragonboard845c/getting-started/rb3-kit/README.md +++ b/consumer/dragonboard/dragonboard845c/getting-started/rb3-kit/README.md @@ -29,7 +29,7 @@ Learn about your DragonBoard 845c board as well as how to prepare and set up for - Camera Modules - OV8856 - OV7251 - - ToF + - ToF - SLMCamera - Cellular Mezzanine board - This board supports LTE module for a better communication experience @@ -55,7 +55,7 @@ Coming Soon... | RAM | 4GB LPDDR4x SDRAM @ 1866 MHz | | Storage | 64GB UFS 2.1 on-boardstorage and1 x MicroSD card slot | | Ethernet Port | 1x GbE Ethernet | -| Wireless | WLAN 802.11a/b/g/n/ac 2.4/5GHz 2×2 MIMO & Bluetooth 5.0,on-boardWLAN/BT/GPSantennas | +| Wireless | WLAN 802.11a/b/g/n/ac 2.4/5GHz 2×2 MIMO & _Bluetooth_® wireless technology 5.0,on-boardWLAN/BT/GPSantennas | | USB | 1 x USB 2.0 Micro B (Debug only ),
1 x USB 3.0 Type C (OTGmode),
2x USB 3.0 Type A (Host mode only) | | Display | Two 4-lane DSI, D-PHY 1.2 or C-PHY 1.0; VESA DSC 1.1
1 x HDMI 1.4 (Type A -full) connector | | Video | 4K60 decode for H.264 High Profile, H.265 Main 10 Profile and VP9 Profile 2,
4K60 encode for H.264 High Profile, H.265 Main 10 Profile | @@ -87,7 +87,7 @@ Coming Soon... - Step 6: Press and release the power button on the device,and user yellow Led0 should illuminate. The board will start the booting process, and you should see Login Credentials displayed on the host PC: -- sda845 login: root +- sda845 login: root - Password:123456 *** diff --git a/consumer/fcue/hardware-docs/hardware-user-manual.md b/consumer/fcue/hardware-docs/hardware-user-manual.md index b477dfaf5..40a6eaf35 100644 --- a/consumer/fcue/hardware-docs/hardware-user-manual.md +++ b/consumer/fcue/hardware-docs/hardware-user-manual.md @@ -100,7 +100,7 @@ The Board-X Development Board is a 96Boards compliant community board based on M - Audio decoding:WAV,MP3,MP2,AAC,AMR-NB,AMR-WB,MIDI,Vorbis,APE,AAC-plus v1/2,FLAC,WMA,ADPCM - **Connectivity**: - WLAN 802.11a/b/g/n 2.4GHz and 5GHz(On-board BT and WLAN antenna ) - - Bluetooth 4.1 +HS compliant + - _Bluetooth_® wireless technology 4.1 +HS compliant - GPS (with antenna connector) - One USB 2.0 micro B (device mode only) - Two USB 2.0 (host mode only) @@ -243,7 +243,7 @@ To start the board, follow these simple steps: < A short section describing the properties of the application processor > -MT6797 is a highly integrated application processor which uses an industry-leading Tri-Cluster Deca-Core CPU Architecture. The chip integrates Dual-core ARM@Cortex-A72 MPCoreTM operating at up to 2.3GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.85GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.4GHz, Quad-core Mail T880 operating at up to 700MHz and an ARM@Cortex-R4 MCU . In addition, an extensive set of interfaces and connectivity peripherals are included to interface to cameras, touch-screen displays and MMC/SD cards.MT6797 also embodies wireless communication device, including WLAN, Bluetooth and GPS. +MT6797 is a highly integrated application processor which uses an industry-leading Tri-Cluster Deca-Core CPU Architecture. The chip integrates Dual-core ARM@Cortex-A72 MPCoreTM operating at up to 2.3GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.85GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.4GHz, Quad-core Mail T880 operating at up to 700MHz and an ARM@Cortex-R4 MCU . In addition, an extensive set of interfaces and connectivity peripherals are included to interface to cameras, touch-screen displays and MMC/SD cards.MT6797 also embodies wireless communication device, including WLAN, _Bluetooth_® wireless technology and GPS. ### PMIC @@ -343,7 +343,7 @@ The Helio X20 Development Board supports a USB device port and three USB host po The Helio X20 Development Board supports three USB host port via a USB2.0 hub (U6401 USB2513-AEZG). Its upstream signal is connected to USB_P0 interface of MT6797. -- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. +- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. - Port 2 of the USB HUB is routed to CON6402, a Type ‘A’ USB Host connector. A current limited controller (U6403) sets the Power Current limit to 1.18A. - Port 3 of the USB HUB is routed to the High Speed Expansion connector. No current limited controller is implemented on the board for this channel. @@ -508,7 +508,7 @@ The Helio X20 board implements this requirement. All GPIOs are routed to the MT6 - GPIO A -Connects to EINT16 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO B -Connects to EINT5 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO C -Connects to EINT4 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -- GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +- GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO E -Connects to EINT2 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO F -Connects to EINT1 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO G -Connects to DSI_TE of MT6797 SoC, can serves as DSI_TE or GPIO179. It is a 1.8V signal. @@ -530,7 +530,7 @@ The Helio X20 board implements this requirement. All GPIOs are routed to the MT6 < Example > - The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -- The Helio X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. +- The Helio X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. ### Power and Reset diff --git a/consumer/hikey/hikey620/getting-started/README.md b/consumer/hikey/hikey620/getting-started/README.md index ca16bcb01..d4ddc987d 100644 --- a/consumer/hikey/hikey620/getting-started/README.md +++ b/consumer/hikey/hikey620/getting-started/README.md @@ -55,7 +55,7 @@ The following subsections should describe how to get started with the HiKey usin | PMU | HI6553V100 | | Storage | 8GB eMMC on board storage MicroSD card slot | | Ethernet Port | USB2.0 expansion | -| Wireless | Wi-Fi 802.11 b/g/n 2.4GHz Dual-mode bluetooth and bluetooth low energy | +| Wireless | Wi-Fi 802.11 b/g/n 2.4GHz Dual-mode _Bluetooth_® wireless technology and Bluetooth low energy | | USB | 2 x USB2.0 Host 1 x USB 2.0 OTG | | Display | 1 x HDMI 1.4 (Type A - full) 1 x MIPI-DSI HDMI output up to FHD 1080P | | Video | 1080p@30 fps HD video encoding, supporting 1080p@30 fps HD camera 1080p@30 fps HD video decoding Supports H.264, SVC, MPEG1/2/4, H.263, VC-1, WMV9, DivX, RV8/9/10, AVS, VP8 | @@ -108,4 +108,4 @@ If you are already familiar with the HiKey board and would like to change out th Back to the [HiKey documentation home page](../) -*** +*** diff --git a/consumer/hikey/hikey620/guides/README.md b/consumer/hikey/hikey620/guides/README.md index 7a63b83fb..d025e6e30 100644 --- a/consumer/hikey/hikey620/guides/README.md +++ b/consumer/hikey/hikey620/guides/README.md @@ -18,7 +18,7 @@ Execute unique configurations to customize your HiKey experience. - [Clock](clock.md) - The HiKey board does not support a battery powered RTC. Learn how to install a "fake clock" here - [Bluetooth](bluetooth.md) - - Bluetooth audio devices are supported on HiKey. + - _Bluetooth_® wireless technology audio devices are supported on HiKey. - [USB](usb.md) - For more information on using the USB utility included on your HiKey board. - [System LEDs](system-leds.md) diff --git a/consumer/hikey/hikey620/guides/bluetooth.md b/consumer/hikey/hikey620/guides/bluetooth.md index 80dba4deb..1ed5c5aa0 100644 --- a/consumer/hikey/hikey620/guides/bluetooth.md +++ b/consumer/hikey/hikey620/guides/bluetooth.md @@ -6,15 +6,15 @@ redirect_from: --- # Bluetooth -The HiKey board includes built-in Bluetooth 4.0 LE support. +The HiKey board includes built-in _Bluetooth_® wireless technology 4.0 LE support. -To setup a Bluetooth device open the Bluetooth Manager from the Preferences menu. If a “Bluetooth Turned Off” popup appears then select “Enable Bluetooth”. Click on "Search" to search for devices. Try with your bluetooth audio and bluetooth keyboard/mouse. If you make the device trusted then this should operate over a reboot of the board. +To setup a Bluetooth device open the Bluetooth Manager from the Preferences menu. If a “Bluetooth Turned Off” popup appears then select “Enable Bluetooth”. Click on "Search" to search for devices. Try with your Bluetooth audio and Bluetooth keyboard/mouse. If you make the device trusted then this should operate over a reboot of the board. -The blue LED between the microUSB and the Type A USB on the front board edge indicates bluetooth activity. +The blue LED between the microUSB and the Type A USB on the front board edge indicates Bluetooth activity. ### Audio Device -Bluetooth audio devices are supported on HiKey. Follow normal procedures of connecting a bluetooth device to connect to your board. +Bluetooth audio devices are supported on HiKey. Follow normal procedures of connecting a Bluetooth device to connect to your board. Once Bluetooth sound sink is connected, you can open the LXMusic player from the Sound & Video menu. Create a playlist from your music files. Supported audio formats are .mp3 and .ogg. You should now be able to play from the LXMusic player. diff --git a/consumer/hikey/hikey620/hardware-docs/hardware-notes.md b/consumer/hikey/hikey620/hardware-docs/hardware-notes.md index 3837bfe49..2ae878611 100644 --- a/consumer/hikey/hikey620/hardware-docs/hardware-notes.md +++ b/consumer/hikey/hikey620/hardware-docs/hardware-notes.md @@ -100,7 +100,7 @@ Alternatively, you can modify grub.cfg in the boot image to switch to other UART The following are known issues on the current release. 1. **Not Yet Supported** - - HDMI and Expansion bus audio. (At present only Bluetooth audio is supported) + - HDMI and Expansion bus audio. (At present only _Bluetooth_® wireless technology audio is supported) - Some video formats are not decoded in Android, and will not be played with the current release - HDMI hotplug detection (HPD) is not supported. (Note: You can still plug in HDMI cable after the board booted, which make HDMI work through two candidate modes: 1280x720p and 800x600p. However these are not HPD, they is built-in default.) - Behaviors of power on button not following hardware user guide. [bug #160](https://bugs.96boards.org/show_bug.cgi?id=160) diff --git a/consumer/hikey/hikey620/hardware-docs/hardware-user-manual.md b/consumer/hikey/hikey620/hardware-docs/hardware-user-manual.md index 0b34c4ba6..edfc3cdd7 100644 --- a/consumer/hikey/hikey620/hardware-docs/hardware-user-manual.md +++ b/consumer/hikey/hikey620/hardware-docs/hardware-user-manual.md @@ -92,7 +92,7 @@ Cortex-A53 64-bit CPU up to 1.2GHz . - WMA/MP3/AAC/EVS audio encoding and decoding - **Connectivity**: - WLAN 802.11 b/g/n 2.4GHz - - Bluetooth 4.0 LE + - _Bluetooth_® wireless technology 4.0 LE - One USB 2.0 micro B (device mode only) - Two USB 2.0 (host mode only) - HDMI diff --git a/consumer/hikey/hikey960/hardware-docs/hardware-user-manual.md b/consumer/hikey/hikey960/hardware-docs/hardware-user-manual.md index c64961dc5..d8787a1c5 100644 --- a/consumer/hikey/hikey960/hardware-docs/hardware-user-manual.md +++ b/consumer/hikey/hikey960/hardware-docs/hardware-user-manual.md @@ -128,7 +128,7 @@ The HiKey960 Development Board is a 96Boards compliant community board based on | 7 | USB 3.0 | | 8 | 4 leds | | 9 | 60 PIN High speed | -| 10 | WLAN And bluetooth | +| 10 | WLAN And Bluetooth | | 11 | BOOT Select | | 12 | DEBUG Uart | | 13 | POWER/RESET | @@ -215,7 +215,7 @@ The Hikey960 Development Board boots up from the UFS. #### Bluetooth -- Bluetooth 4.1 Compliance and CSA2 Support. +- _Bluetooth_® wireless technology 4.1 Compliance and CSA2 Support. - Host Controller Interface (HCI) Transport for Bluetooth Over UART. - Dedicated Audio Processor Support of SBC Encoding + A2DP. - Dual-Mode Bluetooth and Bluetooth LE. diff --git a/consumer/hikey/hikey970/getting-started/README.md b/consumer/hikey/hikey970/getting-started/README.md index 7cbe8454b..dccf431f9 100644 --- a/consumer/hikey/hikey970/getting-started/README.md +++ b/consumer/hikey/hikey970/getting-started/README.md @@ -49,7 +49,7 @@ The following subsections should describe how to get started with the HiKey970 u | GPU: | ARM Mali-G72 MP12 GPU | | RAM: | 6GB LPDDR4X 1866MHz | | Storage: | 64GB UFS 2.1, Micro SD | -| Connectivity: | Bluetooth/WIFI/GPS | +| Connectivity: | _Bluetooth_® wireless technology/WIFI/GPS | | Video: | 1080p@60Hz HDMI, 4 line MIPI/LCD port | | Camera: | 4 line MIPI port, 2 line MIPI port | | Expansion Interface: | One 40-pin Low Speed (LS) expansion connector
UART, SPI, I2S, I2C x2, GPIO x12, DC power
One 60-pin High Speed (HS) expansion connector
4L-MIPI DSI, USB, I2C x2, 2L+4L-MIPI CSI | @@ -87,4 +87,4 @@ If you are already familiar with the HiKey970 board and would like to change out Back to the [HiKey970 documentation home page](../) -*** +*** diff --git a/consumer/mediatekx20/getting-started/README.md b/consumer/mediatekx20/getting-started/README.md index e5930c4fe..febc2434b 100644 --- a/consumer/mediatekx20/getting-started/README.md +++ b/consumer/mediatekx20/getting-started/README.md @@ -53,7 +53,7 @@ The following subsections should describe how to get started with the MediaTek X | PMU | MT6351 | | Storage | 8GB eMMC5.1 on board storage MicroSD card slot | | Ethernet Port | USB2.0 expansion | -| Wireless | Wi-Fi 802.11 a/b/g/n + Bluetooth 4.1 | +| Wireless | Wi-Fi 802.11 a/b/g/n + _Bluetooth_® wireless technology 4.1 | | USB | 2 x USB2.0 Host 1 x USB 2.0 OTG | | Display | 1 x HDMI 1.4 (Type A - full) 1 x MIPI-DSI HDMI output up to FHD 1080P | | Video | 1080p@30 fps HD video encoding, supporting 1080p@30 fps HD camera 1080p@30 fps HD video decoding Supports H.264, SVC, MPEG1/2/4, H.263, VC-1, WMV9, DivX, RV8/9/10, AVS, VP8 | diff --git a/consumer/mediatekx20/hardware-docs/TestHWUserManual.rst b/consumer/mediatekx20/hardware-docs/TestHWUserManual.rst index f1c216ee7..9cd04df41 100644 --- a/consumer/mediatekx20/hardware-docs/TestHWUserManual.rst +++ b/consumer/mediatekx20/hardware-docs/TestHWUserManual.rst @@ -30,7 +30,7 @@ The MediaTek X20 Development Board is a 96Boards compliant community board based :align: right :height: 160px :alt: alternate text - + * **Processor**: * MediaTek X20 MT6797 * Dual-core ARM@Cortex-A72 MPCoreTM operating at up to 2.3GHz @@ -82,7 +82,7 @@ The MediaTek X20 Development Board is a 96Boards compliant community board based * 2 -for radios (BT and WLAN activity) * **OS Support**: * Android 6.0 -* **Mechanical**: +* **Mechanical**: * Dimensions: 54mm by 85mm meeting 96Boards™ Consumer Edition standard dimensions specifications. * **Environmental**: * Operating Temp: -20°C to +45°C @@ -123,31 +123,31 @@ Board Overview ============== ========= ================= =========================================================== - Position Reference Description + Position Reference Description --------- ----------------- ----------------------------------------------------------- - 1 CON7001 Low Speed Expansion Connector - 2 U4001 8GB EMMC - 3 U1001 MediaTek X20 MT6797 Soc + 2GB LPDDR3 - 4 U2001 PMIC MT6351 - 5 U1001 Analog Expansion Connector - 6 U5003 WLAN/Bluetooth/GPS - 7 J901 Power Outlet - 8 CON4101 Micro SD Card Socket - 9 CON6501 HDMI Type A Port - 10 CON7101 High Speed Connector - 11 CON6403 Micro USB Type B Connecto - 12 LED3201-LED3204 Can be defined by user - LED3205 LED3205 is WLAN LED - LED3206 LED3206 is Bluetooth LED - 13 CON6402 USB Host2 Connector - 14 CON6401 USB Host1 Connector - 15 SW3201 Power Button - SW3202 Vol up Button - SW3203 Vol down Button - SW3204 Reset Button - 16 ANT5001 Bluetooth/WLAN Antenna - 17 CON5006 GPS Antenna connector - 18 SW3205 Switch for Auto boot and USB HOST set + 1 CON7001 Low Speed Expansion Connector + 2 U4001 8GB EMMC + 3 U1001 MediaTek X20 MT6797 Soc + 2GB LPDDR3 + 4 U2001 PMIC MT6351 + 5 U1001 Analog Expansion Connector + 6 U5003 WLAN/Bluetooth/GPS + 7 J901 Power Outlet + 8 CON4101 Micro SD Card Socket + 9 CON6501 HDMI Type A Port + 10 CON7101 High Speed Connector + 11 CON6403 Micro USB Type B Connecto + 12 LED3201-LED3204 Can be defined by user + LED3205 LED3205 is WLAN LED + LED3206 LED3206 is Bluetooth LED + 13 CON6402 USB Host2 Connector + 14 CON6401 USB Host1 Connector + 15 SW3201 Power Button + SW3202 Vol up Button + SW3203 Vol down Button + SW3204 Reset Button + 16 ANT5001 Bluetooth/WLAN Antenna + 17 CON5006 GPS Antenna connector + 18 SW3205 Switch for Auto boot and USB HOST set ========= ================= =========================================================== .. image:: https://i.imgur.com/ydQmi5t.png @@ -201,15 +201,15 @@ Before you power up your MediaTek X20 Development Board for the first time you w - A computer keyboard with USB interface. - A computer mouse with USB interface. -Starting the board for the first time +Starting the board for the first time ------------------------------------- -To start the board, follow these simple steps: +To start the board, follow these simple steps: -1. Connect the HDMI cable to the MediaTek X20 Development Board connector (marked CON6501) and to the LCD Monitor. -2. Set the the third pin (USB HOST SET) of switch SW3205 to the position ON and connect the keyboard to USB connector marked CON6402 and the mouse to the USB connector marked CON6401. (It doesn’t matter which order you connect them in. ) +1. Connect the HDMI cable to the MediaTek X20 Development Board connector (marked CON6501) and to the LCD Monitor. +2. Set the the third pin (USB HOST SET) of switch SW3205 to the position ON and connect the keyboard to USB connector marked CON6402 and the mouse to the USB connector marked CON6401. (It doesn’t matter which order you connect them in. ) 3. Plug the power supply into the power outlet. -4. Press down the button (marked SW3201), and keep more than 3 seconds, the Android system will start. +4. Press down the button (marked SW3201), and keep more than 3 seconds, the Android system will start. > Note: If set the first pin (AUTO_BOOT_SET) of switch SW3205 to the position ON, the Android system will start automatically when the power supply is plugged into the power outlet. @@ -231,7 +231,7 @@ PMIC ---- There are a PMIC and two dedicated DC - DC converters for MT6797 platform. -- MT6351 is a power management system chip, containing 8 buck converters and 31 LDOs. +- MT6351 is a power management system chip, containing 8 buck converters and 31 LDOs. - DA9214 is a 4-phase high efficiency buck converter. It is applied to offer the kernel power of APU. - FAN53555 is high efficiency step-down switching regulator. It is applied to offer the DVDD power of GPU. @@ -280,28 +280,28 @@ GPS The GPS implementation is based on MTK connectivity chip MT6631 (U5003) supporting GPS, Galileo, Glonass and Beidou. It can receive GPS, Galileo, Beidou / Glonass simultaneously for more accurate positioning. But there is no GPS antenna on the board. You need to connect an external antenna to the RF connector CON5006. -HDMI +HDMI ---- - The 96Boards specification calls for an HDMI port to be present on the board. The MT6797 doesn’t include a built-in HDMI interface. -- The MediaTek X20 Development Board deploys the built-in DPI interface as the source for the HDMI output. A peripheral Bridge IC (U6502, MT8193) performs this task and it supports a resolution from 480i to 1080p at 30Hz. +- The MediaTek X20 Development Board deploys the built-in DPI interface as the source for the HDMI output. A peripheral Bridge IC (U6502, MT8193) performs this task and it supports a resolution from 480i to 1080p at 30Hz. MIPI-DSI -------- -- The 96Boards specification calls for a MIPI-DSI implementation via the High Speed Expansion Connector. +- The 96Boards specification calls for a MIPI-DSI implementation via the High Speed Expansion Connector. - The MediaTek X20 Development Board implements a 4-lane MIPI_DSI interface meeting this requirement. It can support up to FHD(1080p@60fps). The MediaTek X20 Development Board routes the MIPI_DSI interface signals to the DSI-0 interface of the MT6797. Camera Interface ---------------- - The 96Boards specification calls for two camera interfaces. -- The MediaTek X20 Development Board supports two camera interfaces, one with a 4-lane MIPI_CSI interface and one with 2-lane MIPI_CSI interface, meeting this requirement. The 4-lane MIPI_CSI interface can support 25M camera and the 2-lane MIPI_CSI interface can support 8M camera. +- The MediaTek X20 Development Board supports two camera interfaces, one with a 4-lane MIPI_CSI interface and one with 2-lane MIPI_CSI interface, meeting this requirement. The 4-lane MIPI_CSI interface can support 25M camera and the 2-lane MIPI_CSI interface can support 8M camera. USB Ports --------- -The MediaTek X20 Development Board supports a USB device port and three USB host ports via a USB MUX(U6503). The input channel( D+/D-) of USB MUX is connected to the P0 port of the SOC MT6797, and the two output channels(1D+/1D-,2D+/2D-) are connected to micro USB port and USB hub respectively. The three USB host ports are connected to the downstream ports of the USB hub.The control of U6503 is done via a software controlled GPIO (USB_SW_SEL, EINT9 from the SOC MT6797). When this signal is logic low, ‘0’, the USB data lines are routed to the Micro USB connector and the MT6797 P0 port is set to device mode. When ‘USB_SW_SEL’ is logic level high, ‘1’, the USB data lines are routed to U6401 (a 3-port USB HUB) and the MT6797 P0 port is set to host mode. The user can overwrite the software control by sliding switch 3 of dip-switch SW3205 to the ‘ON’ position. That action forces the USB–MUX (U6503) to route the USB data lines to the USB HUB. The overwrite option exists for the host mode only, you cannot hardware overwrite the MUX to force device mode. +The MediaTek X20 Development Board supports a USB device port and three USB host ports via a USB MUX(U6503). The input channel( D+/D-) of USB MUX is connected to the P0 port of the SOC MT6797, and the two output channels(1D+/1D-,2D+/2D-) are connected to micro USB port and USB hub respectively. The three USB host ports are connected to the downstream ports of the USB hub.The control of U6503 is done via a software controlled GPIO (USB_SW_SEL, EINT9 from the SOC MT6797). When this signal is logic low, ‘0’, the USB data lines are routed to the Micro USB connector and the MT6797 P0 port is set to device mode. When ‘USB_SW_SEL’ is logic level high, ‘1’, the USB data lines are routed to U6401 (a 3-port USB HUB) and the MT6797 P0 port is set to host mode. The user can overwrite the software control by sliding switch 3 of dip-switch SW3205 to the ‘ON’ position. That action forces the USB–MUX (U6503) to route the USB data lines to the USB HUB. The overwrite option exists for the host mode only, you cannot hardware overwrite the MUX to force device mode. .. image:: https://i.imgur.com/IUigl3x.png :width: 250px @@ -315,16 +315,16 @@ USB Host ports The MediaTek X20 Development Board supports three USB host port via a USB2.0 hub (U6401 USB2513-AEZG). Its upstream signal is connected to USB_P0 interface of MT6797. -- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. -- Port 2 of the USB HUB is routed to CON6402, a Type ‘A’ USB Host connector. A current limited controller (U6403) sets the Power Current limit to 1.18A. -- Port 3 of the USB HUB is routed to the High Speed Expansion connector. No current limited controller is implemented on the board for this channel. +- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. +- Port 2 of the USB HUB is routed to CON6402, a Type ‘A’ USB Host connector. A current limited controller (U6403) sets the Power Current limit to 1.18A. +- Port 3 of the USB HUB is routed to the High Speed Expansion connector. No current limited controller is implemented on the board for this channel. USB Device ports ---------------- The MediaTek X20 Development Board implements a device port. The port is located at CON6403, a Micro USB type B. It is routed to USB_P0 interface of MT6797. -> Note: the board can work in one mode at a time, Host mode or Device mode, not both. +> Note: the board can work in one mode at a time, Host mode or Device mode, not both. Audio ----- @@ -336,7 +336,7 @@ DC Power The MediaTek X20 Development Board can be powered by two ways: -- 8V to 18V supply from a dedicated DC jack(J901) +- 8V to 18V supply from a dedicated DC jack(J901) - 8V to 18V supply from the DC_IN pins on the Low Speed Expansion Connector(CON7001) Power Measurement @@ -345,11 +345,11 @@ Power Measurement The MediaTek X20 Development Board has three current sense resistors R916\ R923\ R924. =========== ========= ==================================================== - Reference Net Description + Reference Net Description ----------- --------- ---------------------------------------------------- - R916 DC_IN To measure the current of total base board power - R923 SYS_5V To measure the current of SYS_5V power - R924 VBAT To measure the current of VBAT power + R916 DC_IN To measure the current of total base board power + R923 SYS_5V To measure the current of SYS_5V power + R924 VBAT To measure the current of VBAT power =========== ========= ==================================================== External Fan Connection @@ -367,10 +367,10 @@ Buttons The MediaTek X20 Development Board presents four buttons. They are Power key,VOL up key,VOL down key and Reset key. The power ON/OFF and RESET signals are also routed to the Low Speed Expansion connector. -Power Button +Power Button ^^^^^^^^^^^^ -The push-button SW3201 serves as the power-on/sleep button. Upon applying power to the board, press the power button for more than 3 seconds, the board will boot up. Once the board is running you can turn power-off by pressing the power button for more than 3 seconds. If the board is in a sleep mode, pressing the power bottom will wake up the board. Oppositely, if the board is in an active mode, pressing the power bottom will change the board into sleep mode. +The push-button SW3201 serves as the power-on/sleep button. Upon applying power to the board, press the power button for more than 3 seconds, the board will boot up. Once the board is running you can turn power-off by pressing the power button for more than 3 seconds. If the board is in a sleep mode, pressing the power bottom will wake up the board. Oppositely, if the board is in an active mode, pressing the power bottom will change the board into sleep mode. Reset Button ^^^^^^^^^^^^ @@ -379,21 +379,21 @@ The push-button SW3204 serves as the hardware reset button. press the button for Volume up ^^^^^^^^^ -The Volume UP button is used to control the output speaker volume of the MediaTek X20 Development Board. +The Volume UP button is used to control the output speaker volume of the MediaTek X20 Development Board. Volume down ^^^^^^^^^^^ -The Volume Down button is used to control the output speaker volume of the MediaTek X20 Development Board. +The Volume Down button is used to control the output speaker volume of the MediaTek X20 Development Board. Dip-switch ^^^^^^^^^^ There is a four-channel dip-switch(SW3205) on the board. -- Channel 1:”AUTO BOOT”,used to boot the board automatically. If set the switch on , the system will start automatically when the power supply is plugged into the power outlet. +- Channel 1:”AUTO BOOT”,used to boot the board automatically. If set the switch on , the system will start automatically when the power supply is plugged into the power outlet. - Channel 2:NC. -- Channel 3:”USB HOST SET”,The user can overwrite the software control by sliding the switch to the ‘ON’ position.The overwrite option exists for the host mode only, you cannot hardware overwrite the MUX to force device mode. +- Channel 3:”USB HOST SET”,The user can overwrite the software control by sliding the switch to the ‘ON’ position.The overwrite option exists for the host mode only, you cannot hardware overwrite the MUX to force device mode. - Channel 4: NC @@ -405,8 +405,8 @@ The MediaTek X20 Development Board has six LEDs. Two activity LEDs ^^^^^^^^^^^^^^^^^ -- WiFi activity LED –The MediaTek X20 Development Board drives this Yellow LED via BPI_BUS12, an IO from MT6797. -- BT activity LED –The MediaTek X20 Development Board drives this Blue LED via BPI_BUS13, an IO from MT6797. +- WiFi activity LED –The MediaTek X20 Development Board drives this Yellow LED via BPI_BUS12, an IO from MT6797. +- BT activity LED –The MediaTek X20 Development Board drives this Blue LED via BPI_BUS13, an IO from MT6797. Four User LEDs ^^^^^^^^^^^^^^ @@ -431,97 +431,97 @@ Low Speed Expansion Connector ----------------------------- ======================== =================== ======= ======= ==================== ======================== - MediaTek X20 Signals 96Boards Signals PIN PIN 96Boards Signals MediaTek X20 Signals + MediaTek X20 Signals 96Boards Signals PIN PIN 96Boards Signals MediaTek X20 Signals ------------------------ ------------------- ------- ------- -------------------- ------------------------ - GND GND 1 2 GND GND - UCTS0 UART0_CTS 3 4 PWR_BTN_N PWRKEY - UTXD0 UART0_TxD 5 6 RST_BTN_N SYSRSTB - URXD0 UART0_RxD 7 8 SPI0_SCLK SPI0_CK - URTS0 UART0_RTS 9 10 SPI0_DIN SPI0_MI - UTXD1 UART1_TxD 11 12 SPI0_CS SPI0_CS - URXD1 UART1_RxD 13 14 SPI0_DOUT SPI0_MO - SCL4 I2C0_SCL 15 16 PCM_FS PCM0_SYNC - SDA4 I2C0_SDA 17 18 PCM_CLK PCM0_CLK - SCL5 I2C1_SCL 19 20 PCM_DO PCM0_DO - SDA5 I2C1_SDA 21 22 PCM_DI PCM0_DI - EINT16 GPIO-A 23 24 GPIO-B EINT5 - EINT4 GPIO-C 25 26 GPIO-D EINT3 - EINT2 GPIO-E 27 28 GPIO-F EINT1 - DSI_TE GPIO-G 29 30 GPIO-H LCM_RST - CAM_RST0 GPIO-I 31 32 GPIO-J CAM_PDN0 - CAM_RST1 GPIO-K 33 34 GPIO-L CAM_PDN1 - VIO18_PMU +1V8 35 36 SYS_DCIN DC_IN - SYS_5V +5V 37 38 SYC_DCIN DC_IN - GND GND 39 40 GND GND + GND GND 1 2 GND GND + UCTS0 UART0_CTS 3 4 PWR_BTN_N PWRKEY + UTXD0 UART0_TxD 5 6 RST_BTN_N SYSRSTB + URXD0 UART0_RxD 7 8 SPI0_SCLK SPI0_CK + URTS0 UART0_RTS 9 10 SPI0_DIN SPI0_MI + UTXD1 UART1_TxD 11 12 SPI0_CS SPI0_CS + URXD1 UART1_RxD 13 14 SPI0_DOUT SPI0_MO + SCL4 I2C0_SCL 15 16 PCM_FS PCM0_SYNC + SDA4 I2C0_SDA 17 18 PCM_CLK PCM0_CLK + SCL5 I2C1_SCL 19 20 PCM_DO PCM0_DO + SDA5 I2C1_SDA 21 22 PCM_DI PCM0_DI + EINT16 GPIO-A 23 24 GPIO-B EINT5 + EINT4 GPIO-C 25 26 GPIO-D EINT3 + EINT2 GPIO-E 27 28 GPIO-F EINT1 + DSI_TE GPIO-G 29 30 GPIO-H LCM_RST + CAM_RST0 GPIO-I 31 32 GPIO-J CAM_PDN0 + CAM_RST1 GPIO-K 33 34 GPIO-L CAM_PDN1 + VIO18_PMU +1V8 35 36 SYS_DCIN DC_IN + SYS_5V +5V 37 38 SYC_DCIN DC_IN + GND GND 39 40 GND GND ======================== =================== ======= ======= ==================== ======================== -UART {0/1} +UART {0/1} ---------- -The 96Boards specifications calls for a 4-wire UART implementation, UART0 and an optimal second 2-wire UART, UART1 on the Low Speed Expansion Connector. -- The MediaTek X20 Development Board implements UART0 as a 4-wire UART that connects directly to the MT6797 SoC. These signals are driven at 1.8V. -- The MediaTek X20 Development Board implements UART1 as a 2-wire UART that connects directly to the MT6797 SoC. These signals are driven at 1.8V. +The 96Boards specifications calls for a 4-wire UART implementation, UART0 and an optimal second 2-wire UART, UART1 on the Low Speed Expansion Connector. +- The MediaTek X20 Development Board implements UART0 as a 4-wire UART that connects directly to the MT6797 SoC. These signals are driven at 1.8V. +- The MediaTek X20 Development Board implements UART1 as a 2-wire UART that connects directly to the MT6797 SoC. These signals are driven at 1.8V. -I2C {0/1} +I2C {0/1} --------- -The 96Boards specification calls for two I2C interfaces to be implemented on the Low Speed Expansion Connector. +The 96Boards specification calls for two I2C interfaces to be implemented on the Low Speed Expansion Connector. The MediaTek X20 Development Board implements both interfaces named I2C4 and I2C5. They connect directly to the MT6797 SoC. Each of the I2C lines is pulled up to VIO18_PMU via 4.7K resistor. -GPIO {A-L} +GPIO {A-L} ---------- -The 96Boards specification calls for 12 GPIO lines to be implemented on the Low Speed Expansion Connector. Some of these GPIOs may support alternate functions for DSI/CSI control +The 96Boards specification calls for 12 GPIO lines to be implemented on the Low Speed Expansion Connector. Some of these GPIOs may support alternate functions for DSI/CSI control -The MediaTek X20 board implements this requirement. All GPIOs are routed to the MT6797 SoC. +The MediaTek X20 board implements this requirement. All GPIOs are routed to the MT6797 SoC. * GPIO A -Connects to EINT16 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -* GPIO B -Connects to EINT5 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -* GPIO C -Connects to EINT4 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -* GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -* GPIO E -Connects to EINT2 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -* GPIO F -Connects to EINT1 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -* GPIO G -Connects to DSI_TE of MT6797 SoC, can serves as DSI_TE or GPIO179. It is a 1.8V signal. -* GPIO H -Connects to LCM_RST of MT6797 SoC, can serves as LCM_RST or GPIO180. It is a 1.8V signal. -* GPIO I -Connects to CAM_RST0 of MT6797 SoC, can serves as CAM_RST0 or GPIO32. It is a 1.8V signal. -* GPIO J -Connects to CAM_PDN0 of MT6797 SoC, can serves as CAM_PDN0 or GPIO28. It is a 1.8V signal. -* GPIO K -Connects to CAM_RST1 of MT6797 SoC, can serves as CAM_RST1 or GPIO33. It is a 1.8V signal. -* GPIO L -Connects to CAM_PDN1 of MT6797 SoC, can serves as CAM_PDN1 or GPIO29. It is a 1.8V signal. - -SPI 0 +* GPIO B -Connects to EINT5 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +* GPIO C -Connects to EINT4 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +* GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +* GPIO E -Connects to EINT2 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +* GPIO F -Connects to EINT1 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +* GPIO G -Connects to DSI_TE of MT6797 SoC, can serves as DSI_TE or GPIO179. It is a 1.8V signal. +* GPIO H -Connects to LCM_RST of MT6797 SoC, can serves as LCM_RST or GPIO180. It is a 1.8V signal. +* GPIO I -Connects to CAM_RST0 of MT6797 SoC, can serves as CAM_RST0 or GPIO32. It is a 1.8V signal. +* GPIO J -Connects to CAM_PDN0 of MT6797 SoC, can serves as CAM_PDN0 or GPIO28. It is a 1.8V signal. +* GPIO K -Connects to CAM_RST1 of MT6797 SoC, can serves as CAM_RST1 or GPIO33. It is a 1.8V signal. +* GPIO L -Connects to CAM_PDN1 of MT6797 SoC, can serves as CAM_PDN1 or GPIO29. It is a 1.8V signal. + +SPI 0 ----- -The 96Boards specification calls for one SPI bus master to be provided on the Low Speed Expansion Connector. -The MediaTek X20 Development Board implements a full SPI master with 4 wires, CLK, CS, MOSI and MISO. The signals are connected directly to the MT6797 SoC and driven at 1.8V. +The 96Boards specification calls for one SPI bus master to be provided on the Low Speed Expansion Connector. +The MediaTek X20 Development Board implements a full SPI master with 4 wires, CLK, CS, MOSI and MISO. The signals are connected directly to the MT6797 SoC and driven at 1.8V. PCM/I2S ------- -The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -The MediaTek X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. +The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. +The MediaTek X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. -Power and Reset +Power and Reset --------------- -The 96Boards specification calls for a signal on the Low Speed Expansion Connector that can power on/off the board and a signal that serves as a board reset signal. -The MediaTek X20 Development Board routes the PWR_BTN_N (named PWRKEY on schematic) signal to the PWRKEY pin of the PMIC MT6351. This signal is driven by SW3201 as well, the on-board power on push-button switch. A mezzanine implementation of this signals should not drive it with any voltage, the only allowed operation is to force it to GND to start the board from a sleep mode. +The 96Boards specification calls for a signal on the Low Speed Expansion Connector that can power on/off the board and a signal that serves as a board reset signal. +The MediaTek X20 Development Board routes the PWR_BTN_N (named PWRKEY on schematic) signal to the PWRKEY pin of the PMIC MT6351. This signal is driven by SW3201 as well, the on-board power on push-button switch. A mezzanine implementation of this signals should not drive it with any voltage, the only allowed operation is to force it to GND to start the board from a sleep mode. The MediaTek X20 Development Board routes the RST_BTN_N (named SYSRSTB on schematic) signal to the SYSRSTB pin of the PMIC MT6351. -Power Supplies +Power Supplies -------------- -The 96Boards specification calls for three power rails to be present on the Low Speed Expansion Connector: -- +1.8V Max of 100mA -- +5V Provide a minimum of 5W of power (1A). +The 96Boards specification calls for three power rails to be present on the Low Speed Expansion Connector: +- +1.8V Max of 100mA +- +5V Provide a minimum of 5W of power (1A). -SYS_DCIN 8-18V input with enough current to support all the board functions or the output DCIN from on-board DC Connector able to provide a minimum of 7W of power. +SYS_DCIN 8-18V input with enough current to support all the board functions or the output DCIN from on-board DC Connector able to provide a minimum of 7W of power. -The MediaTek X20 Development Board supports these requirements as follows: +The MediaTek X20 Development Board supports these requirements as follows: - +1.8V Driven by PMIC MT6351 up to 1000mA. It is the system IO power (VIO18_PMU), and it can supply power up to 200mA to the Low Speed Expansion Connector. - +5V Driven by a 6A DC-DC buck converter (U901). It also provides the VBUS power to the two USB host connectors (CON6401, CON6402) and the HDMI 5V power to the HDMI connector (CON6501).The remaining capacity provides a max current of 2A to the Low Speed Expansion Connector, for a total of 10W which meets the 96Boards requirements. - -- SYS_DCIN Can serves as the board’s main power source or can receive power from the board. + +- SYS_DCIN Can serves as the board’s main power source or can receive power from the board. `Back to top`_ @@ -531,84 +531,84 @@ High Speed Expansion Connector ============================== ======================= ====================== ======= ======= ==================== ============================================== - MediaTek X20 Signals 96Boards Signals PIN PIN 96Boards Signals MediaTek X20 Signals + MediaTek X20 Signals 96Boards Signals PIN PIN 96Boards Signals MediaTek X20 Signals ----------------------- ---------------------- ------- ------- -------------------- ---------------------------------------------- - SPI1_MO SD_DAT0/SPI1_DOUT 1 2 CSI0_C+ RCP - NC SD_DAT1 3 4 CSI0_C- RCN - NC SD_DAT2 5 6 GND GND - SPI1_CS SD_DAT3/SPI1_CS 7 8 CSI0_D0+ RDP0 - SPI1_CK SD_SCLK/SPI1_SCLK 9 10 CSI0_D0- RDN0 - SPI1_MI SD_CMD/SPI1_DIN 11 12 GND GND - GND GND 13 14 CSI0_D1+ RDP1 - CAM_CLK0 CLK0/CSI0_MCLK 15 16 CCSI0_D1- RDN1 - CAM_CLK1 CLK1/CSI1_MCLK 17 18 GND GND - GND GND 19 20 CSI0_D2+ RDP2 - TCP DSI_CLK+ 21 22 CSI0_D2- RDN2 - TCN DSI_CLK- 23 24 GND GND - GND GND 25 26 CSI0_D3+ RDP3 - TDP0 DSI_D0+ 27 28 CSI0_D3- RDN3 - TDN0 DSI_D0- 29 30 GND GND - GND GND 31 32 I2C2_SCL SCL2 - TDP1 DSI_D1+ 33 34 I2C2_SCL SDA2 - TDN1 DSI_D1- 35 36 I2C3_SDA SCL3 - GND GND 37 38 I2C3_SDA SDA3 - TDP2 DSI_D2+ 39 40 GND GND - TDN2 DSI_D2- 41 42 CSI1_D0+ RDP0_A - GND GND 43 44 CSI1_D0- RDN0_A - TDP3 DSI_D3+ 45 46 GND GND - TDN3 DSI_D3- 47 48 CSI1_D1+ RDP1_A - GND GND 49 50 CSI1_D1- RDN1_A - USB_DP_P1_EXP USB_D+ 51 52 GND GND - USB_DM_P1_EXP USB_D- 53 54 CSI1_C+ RCP_A - GND GND 55 56 CSI1_C- RCN_A - NC HSIC_STR 57 58 GND GND - NC HSIC_DATA 59 60 RESERVED Pull-up to VIO18_PMU
via 100K resistor + SPI1_MO SD_DAT0/SPI1_DOUT 1 2 CSI0_C+ RCP + NC SD_DAT1 3 4 CSI0_C- RCN + NC SD_DAT2 5 6 GND GND + SPI1_CS SD_DAT3/SPI1_CS 7 8 CSI0_D0+ RDP0 + SPI1_CK SD_SCLK/SPI1_SCLK 9 10 CSI0_D0- RDN0 + SPI1_MI SD_CMD/SPI1_DIN 11 12 GND GND + GND GND 13 14 CSI0_D1+ RDP1 + CAM_CLK0 CLK0/CSI0_MCLK 15 16 CCSI0_D1- RDN1 + CAM_CLK1 CLK1/CSI1_MCLK 17 18 GND GND + GND GND 19 20 CSI0_D2+ RDP2 + TCP DSI_CLK+ 21 22 CSI0_D2- RDN2 + TCN DSI_CLK- 23 24 GND GND + GND GND 25 26 CSI0_D3+ RDP3 + TDP0 DSI_D0+ 27 28 CSI0_D3- RDN3 + TDN0 DSI_D0- 29 30 GND GND + GND GND 31 32 I2C2_SCL SCL2 + TDP1 DSI_D1+ 33 34 I2C2_SCL SDA2 + TDN1 DSI_D1- 35 36 I2C3_SDA SCL3 + GND GND 37 38 I2C3_SDA SDA3 + TDP2 DSI_D2+ 39 40 GND GND + TDN2 DSI_D2- 41 42 CSI1_D0+ RDP0_A + GND GND 43 44 CSI1_D0- RDN0_A + TDP3 DSI_D3+ 45 46 GND GND + TDN3 DSI_D3- 47 48 CSI1_D1+ RDP1_A + GND GND 49 50 CSI1_D1- RDN1_A + USB_DP_P1_EXP USB_D+ 51 52 GND GND + USB_DM_P1_EXP USB_D- 53 54 CSI1_C+ RCP_A + GND GND 55 56 CSI1_C- RCN_A + NC HSIC_STR 57 58 GND GND + NC HSIC_DATA 59 60 RESERVED Pull-up to VIO18_PMU
via 100K resistor ======================= ====================== ======= ======= ==================== ============================================== -MIPI DSI 0 +MIPI DSI 0 ---------- -The 96Boards specification calls for a MIPI-DSI to be present on the High Speed Expansion Connector. A minimum of one lane is required and up to four lanes can be accommodated on the connector. -The MediaTek X20 Development Board implementation supports a full four lane (1.2Gbps/lane) MIPI-DSI interface that is routed to the High Speed Expansion Connector. The MIPI-DSI signals are directly connected to DSI-0 of MT6797. +The 96Boards specification calls for a MIPI-DSI to be present on the High Speed Expansion Connector. A minimum of one lane is required and up to four lanes can be accommodated on the connector. +The MediaTek X20 Development Board implementation supports a full four lane (1.2Gbps/lane) MIPI-DSI interface that is routed to the High Speed Expansion Connector. The MIPI-DSI signals are directly connected to DSI-0 of MT6797. -MIPI CSI {0/1} +MIPI CSI {0/1} -------------- -The 96Boards specification calls for two MIPI-CSI interfaces to be present on the High Speed Expansion Connector. Both interfaces are optional. CSI0 interface can be up to four lanes while CSI1 is up to two lanes. +The 96Boards specification calls for two MIPI-CSI interfaces to be present on the High Speed Expansion Connector. Both interfaces are optional. CSI0 interface can be up to four lanes while CSI1 is up to two lanes. The MediaTek X20 Development Board implementation supports a full four lane MIPI-CSI interface on CSI0 and two lanes of MIPI-CSI on CSI1. All MIPI-CSI signals are routed directly to/from the MT6797SoC. CSI0 can support up to 25M@30fps and CSI1 can support up to 8M@30fps. The max data rate of each lane is 2.5Gbps. -I2C {2/3} +I2C {2/3} --------- -The 96Boards specification calls for two I2C interfaces to be present on the High Speed Expansion Connector. Both interfaces are optional unless a MIPI-CSI interface has been implemented. Then an I2C interface shall be implemented. +The 96Boards specification calls for two I2C interfaces to be present on the High Speed Expansion Connector. Both interfaces are optional unless a MIPI-CSI interface has been implemented. Then an I2C interface shall be implemented. The MediaTek X20 Development Board implementation supports two MIPI-CSI interfaces and therefore must support two I2C interfaces. For MIPI-CSI0 the companion I2C2 is routed directly from the MT6797SoC. For MIPI-CSI1, the companion I2C is I2C3. Each of the I2C lines is pulled up to VIO18_PMU via 4.7K resistor. -SD/SPI +SD/SPI ------ -The 96Boards specification calls for an SD interface or a SPI port to be part of the High Speed Expansion Connector. -The MediaTek X20 Development Board implements a full SPI master with 4 wires (96Boards SPI Configuration), CLK, CS, MOSI and MISO. All the signals are connected directly to the MT6797 SoC. These signals are driven at 1.8V. +The 96Boards specification calls for an SD interface or a SPI port to be part of the High Speed Expansion Connector. +The MediaTek X20 Development Board implements a full SPI master with 4 wires (96Boards SPI Configuration), CLK, CS, MOSI and MISO. All the signals are connected directly to the MT6797 SoC. These signals are driven at 1.8V. -Clocks +Clocks ------ -The 96Boards specification calls for one or two programmable clock interfaces to be provided on the High Speed Expansion Connector. These clocks may have a secondary function of being CSI0_MCLK and CSI1_MCLK. If these clocks can’t be supported by the SoC than an alternative GPIO or No-Connect is allowed by the specifications. -The MediaTek X20 Development Board implements two CSI clocks which are connected directly to the MT6797 SoC. These signals are driven at 1.8V. +The 96Boards specification calls for one or two programmable clock interfaces to be provided on the High Speed Expansion Connector. These clocks may have a secondary function of being CSI0_MCLK and CSI1_MCLK. If these clocks can’t be supported by the SoC than an alternative GPIO or No-Connect is allowed by the specifications. +The MediaTek X20 Development Board implements two CSI clocks which are connected directly to the MT6797 SoC. These signals are driven at 1.8V. USB --- -The 96Boards specification calls for a USB Data line interface to be present on the High Speed Expansion Connector. -The MediaTek X20 Development Board implements this requirement by routing USB channel 3 from the USB HUB to the High Speed Expansion Connector. +The 96Boards specification calls for a USB Data line interface to be present on the High Speed Expansion Connector. +The MediaTek X20 Development Board implements this requirement by routing USB channel 3 from the USB HUB to the High Speed Expansion Connector. -HSIC +HSIC ---- -The 96Boards specification calls for an optional MIPI-HSIC interface to be present on the High Speed Expansion Connector. -The MediaTek X20 Development Board implementation doesn’t support this optional requirement. +The 96Boards specification calls for an optional MIPI-HSIC interface to be present on the High Speed Expansion Connector. +The MediaTek X20 Development Board implementation doesn’t support this optional requirement. -Reserved +Reserved -------- The pin 60 of the High Speed Expansion Connector is pulled up to VIO18_PMU via 100K resistor. @@ -621,24 +621,24 @@ Analog Expansion Connector ========================== ======= ======================== ======================================================= - PIN MediaTek X20 Signals MediaTek X20 Signals + PIN MediaTek X20 Signals MediaTek X20 Signals ------- ------------------------ ------------------------------------------------------- - 1 AU_LOLP Positive output of line-out buffer from MT6351 - 2 AU_LOLN Negative output of line-out buffer from MT6351 - 3 MICBIAS0 Microphone bias 0 from MT6351 - 4 GND Ground - 5 AUDREFN Audio reference ground - 6 MICBIAS1 Microphone bias 1 from MT6351 - 7 AU_VIN0_P Microphone channel 0 positive input - 8 AU_HPR Earphone right channel output - 9 AU_VIN0_N Microphone channel 0 negative input - 10 AU_HPL Earphone left channel output - 11 GND Ground - 12 ACCDET1 Accessory detection 1 input - 13 FM_ANT FM antenna positive input - 14 AU_HSP Headset positive output - 15 FM_RX_N_6631 FM antenna negative output - 16 AU_HSN Headset negative output + 1 AU_LOLP Positive output of line-out buffer from MT6351 + 2 AU_LOLN Negative output of line-out buffer from MT6351 + 3 MICBIAS0 Microphone bias 0 from MT6351 + 4 GND Ground + 5 AUDREFN Audio reference ground + 6 MICBIAS1 Microphone bias 1 from MT6351 + 7 AU_VIN0_P Microphone channel 0 positive input + 8 AU_HPR Earphone right channel output + 9 AU_VIN0_N Microphone channel 0 negative input + 10 AU_HPL Earphone left channel output + 11 GND Ground + 12 ACCDET1 Accessory detection 1 input + 13 FM_ANT FM antenna positive input + 14 AU_HSP Headset positive output + 15 FM_RX_N_6631 FM antenna negative output + 16 AU_HSN Headset negative output ======= ======================== ======================================================= `Back to top`_ @@ -663,8 +663,8 @@ Block Diagram DC Power Input -------------- -- An 8V to 18V power from a dedicated DC jack J901. -- An 8V to 18V power from the SYS_DCIN pins on the Low Speed Expansion Connector CON7001. +- An 8V to 18V power from a dedicated DC jack J901. +- An 8V to 18V power from the SYS_DCIN pins on the Low Speed Expansion Connector CON7001. > Note: Please refer to the mechanical size of the DC plug below.The inside diameter of the plug is 1.7mm，the outer diameter of the plug is 4.75mm.The positive electrode of the DC plug is in the inside, and the negative pole is outside. diff --git a/consumer/mediatekx20/hardware-docs/hardware-notes.md b/consumer/mediatekx20/hardware-docs/hardware-notes.md index e298d1692..3291bcbd4 100644 --- a/consumer/mediatekx20/hardware-docs/hardware-notes.md +++ b/consumer/mediatekx20/hardware-docs/hardware-notes.md @@ -20,9 +20,9 @@ Note also that these modes are preferred and will be tried (in this order) first | Resolution | Ratio | Usually on | |:------------------------|:-----------------------|:-----------------------| -| 1920*1080 | 16:9 | TV | -| 1280*720 | 16:9 | TV | -| 720*480 | 4:3 | Monitor | +| 1920*1080 | 16:9 | TV | +| 1280*720 | 16:9 | TV | +| 720*480 | 4:3 | Monitor | ### USB Ports @@ -54,7 +54,7 @@ MediaTek X20 supports a UART Port used for debugging, the Baud Rate for this int The following are known issues on the current release. 1. **Not Yet Supported** - - Expansion bus audio. (At present Bluetooth audio and HDMI are supported) + - Expansion bus audio. (At present _Bluetooth_® wireless technology audio and HDMI are supported) - Some video formats are not decoded in Android, and will not be played with the current release. - HDMI display sometimes goes off when in AOSP. 2. **Apple Bluetooth Keyboards/Mice/Trackpads do not work.** diff --git a/consumer/mediatekx20/hardware-docs/hardware-user-manual.md b/consumer/mediatekx20/hardware-docs/hardware-user-manual.md index c8aa08b01..3e362bd9d 100644 --- a/consumer/mediatekx20/hardware-docs/hardware-user-manual.md +++ b/consumer/mediatekx20/hardware-docs/hardware-user-manual.md @@ -92,7 +92,7 @@ The MediaTek X20 Development Board is a 96Boards compliant community board based - Audio decoding:WAV,MP3,MP2,AAC,AMR-NB,AMR-WB,MIDI,Vorbis,APE,AAC-plus v1/2,FLAC,WMA,ADPCM - **Connectivity**: - WLAN 802.11a/b/g/n 2.4GHz and 5GHz(On-board BT and WLAN antenna ) - - Bluetooth 4.1 +HS compliant + - _Bluetooth_® wireless technology 4.1 +HS compliant - GPS (with antenna connector) - One USB 2.0 micro B (device mode only) - Two USB 2.0 (host mode only) @@ -208,7 +208,7 @@ To start the board, follow these simple steps: ## Component Details ### Processor -MT6797 is a highly integrated application processor which uses an industry-leading Tri-Cluster Deca-Core CPU Architecture. The chip integrates Dual-core ARM@Cortex-A72 MPCoreTM operating at up to 2.3GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.85GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.4GHz, Quad-core Mali-T880 operating at up to 700MHz and an ARM@Cortex-R4 MCU . In addition, an extensive set of interfaces and connectivity peripherals are included to interface to cameras, touch-screen displays and MMC/SD cards.MT6797 also embodies wireless communication device, including WLAN, Bluetooth and GPS. +MT6797 is a highly integrated application processor which uses an industry-leading Tri-Cluster Deca-Core CPU Architecture. The chip integrates Dual-core ARM@Cortex-A72 MPCoreTM operating at up to 2.3GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.85GHz, Quad-core ARM@Cortex-A53 MPCoreTM operating at up to 1.4GHz, Quad-core Mali-T880 operating at up to 700MHz and an ARM@Cortex-R4 MCU . In addition, an extensive set of interfaces and connectivity peripherals are included to interface to cameras, touch-screen displays and MMC/SD cards.MT6797 also embodies wireless communication device, including WLAN, _Bluetooth_® wireless technology and GPS. ### PMIC @@ -279,7 +279,7 @@ The MediaTek X20 Development Board supports a USB device port and three USB host The MediaTek X20 Development Board supports three USB host port via a USB2.0 hub (U6401 USB2513-AEZG). Its upstream signal is connected to USB_P0 interface of MT6797. -- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. +- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. - Port 2 of the USB HUB is routed to CON6402, a Type ‘A’ USB Host connector. A current limited controller (U6403) sets the Power Current limit to 1.18A. - Port 3 of the USB HUB is routed to the High Speed Expansion connector. No current limited controller is implemented on the board for this channel. @@ -416,7 +416,7 @@ The MediaTek X20 board implements this requirement. All GPIOs are routed to the - GPIO A -Connects to EINT16 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO B -Connects to EINT5 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO C -Connects to EINT4 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -- GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +- GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO E -Connects to EINT2 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO F -Connects to EINT1 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO G -Connects to DSI_TE of MT6797 SoC, can serves as DSI_TE or GPIO179. It is a 1.8V signal. @@ -434,7 +434,7 @@ The MediaTek X20 Development Board implements a full SPI master with 4 wires, CL ### PCM/I2S The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -The MediaTek X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. +The MediaTek X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. ### Power and Reset @@ -578,8 +578,8 @@ The main parameters are list in table below. ### Mic -The microphone signals are routed to the MT6351 built-in Audio CODEC. It is an uplink input channel and it can be connected to a MIC or a codec line out. The signals are: -- AU_VIN0_P +The microphone signals are routed to the MT6351 built-in Audio CODEC. It is an uplink input channel and it can be connected to a MIC or a codec line out. The signals are: +- AU_VIN0_P - AU_VIN0_N - MICBIAS0(The bias voltage output step size is 0.1V, the range is 1.7~2.1V/2.5~2.7V) @@ -588,7 +588,7 @@ The earphone signals are routed from the MT6351 built-in Audio CODEC. It can sup - AU_HPL - AU_HPR - ACCDET1 -- AU_VIN0_P +- AU_VIN0_P - AU_VIN0_N - MICBIAS0 diff --git a/consumer/mediatekx20pro/getting-started/README.md b/consumer/mediatekx20pro/getting-started/README.md index d8db16f05..ec212607b 100644 --- a/consumer/mediatekx20pro/getting-started/README.md +++ b/consumer/mediatekx20pro/getting-started/README.md @@ -53,7 +53,7 @@ The following subsections should describe how to get started with the MediaTek X | PMU | MT6351 | | Storage | 8GB eMMC5.1 on board storage MicroSD card slot | | Ethernet Port | USB2.0 expansion | -| Wireless | Wi-Fi 802.11 a/b/g/n + Bluetooth 4.1 | +| Wireless | Wi-Fi 802.11 a/b/g/n + _Bluetooth_® wireless technology 4.1 | | USB | 2 x USB2.0 Host 1 x USB 2.0 OTG | | Display | 1 x HDMI 1.4 (Type A - full) 1 x MIPI-DSI HDMI output up to FHD 1080P | | Video | 1080p@30 fps HD video encoding, supporting 1080p@30 fps HD camera 1080p@30 fps HD video decoding Supports H.264, SVC, MPEG1/2/4, H.263, VC-1, WMV9, DivX, RV8/9/10, AVS, VP8 | diff --git a/consumer/mediatekx20pro/hardware-docs/hardware-notes.md b/consumer/mediatekx20pro/hardware-docs/hardware-notes.md index 1a65c0ee9..4f73987a3 100644 --- a/consumer/mediatekx20pro/hardware-docs/hardware-notes.md +++ b/consumer/mediatekx20pro/hardware-docs/hardware-notes.md @@ -19,9 +19,9 @@ Note also that these modes are preferred and will be tried (in this order) first | Resolution | Ratio | Usually on | |:------------------------|:-----------------------|:-----------------------| -| 1920*1080 | 16:9 | TV | -| 1280*720 | 16:9 | TV | -| 720*480 | 4:3 | Monitor | +| 1920*1080 | 16:9 | TV | +| 1280*720 | 16:9 | TV | +| 720*480 | 4:3 | Monitor | ### USB Ports @@ -53,7 +53,7 @@ MediaTek X20 supports a UART Port used for debugging, the Baud Rate for this int The following are known issues on the current release. 1. **Not Yet Supported** - - Expansion bus audio. (At present Bluetooth audio and HDMI are supported) + - Expansion bus audio. (At present _Bluetooth_® wireless technology audio and HDMI are supported) - Some video formats are not decoded in Android, and will not be played with the current release. - HDMI display sometimes goes off when in AOSP. 2. **Apple Bluetooth Keyboards/Mice/Trackpads do not work.** diff --git a/consumer/mediatekx20pro/hardware-docs/hardware-user-manual.md b/consumer/mediatekx20pro/hardware-docs/hardware-user-manual.md index 5c2ce0266..386ab98ab 100644 --- a/consumer/mediatekx20pro/hardware-docs/hardware-user-manual.md +++ b/consumer/mediatekx20pro/hardware-docs/hardware-user-manual.md @@ -100,7 +100,7 @@ X20 platform. It is an expansion board of the MediaTek X20 Development Board. We - FDD-LTE band 1,3 - **Connectivity**: - WLAN 802.11a/b/g/n 2.4GHz and 5GHz(On-board BT and WLAN antenna) - - Bluetooth 4.1 +HS compliant + - _Bluetooth_® wireless technology 4.1 +HS compliant - GPS (with external antenna connector) - One USB 2.0 micro B (device mode only) - Two USB 2.0 (host mode only) @@ -196,7 +196,7 @@ To start the board, follow these simple steps: 1. Connect the HDMI cable to the MediaTek X20 Professional Board connector (marked CON6501) and to the LCD Monitor. 2. Connect the keyboard to USB connector marked CON6402 and the mouse to the USB connector marked CON6401. (It doesn’t matter which order you connect them in. ) 3. Plug the power supply into the power outlet. -4. Press down the button (marked SW3201), and keep more than 3 seconds, the Android system will start. +4. Press down the button (marked SW3201), and keep more than 3 seconds, the Android system will start. Note: If set the first pin (AUTO_BOOT_SET) of switch SW3205 to the position ON, the Android system will start automatically when the power supply is plugged into the power outlet. @@ -222,7 +222,7 @@ MT6797 is a highly integrated application processor which uses an industry-leadi - Two ARM@Cortex-R4 processors with max. 800MHz for modem subsystem - FDD/TDD up to 300Mbps downlink,50Mbps uplink - 3G modem support most main features in 3GPP Release 7 and Release 8 -- Embody wireless communication device, including WLAN(2.4GHz and 5GHz), Bluetooth and GPS. +- Embody wireless communication device, including WLAN(2.4GHz and 5GHz), _Bluetooth_® wireless technology and GPS. - Portrait panel resolution up to WQXGA(2500*1600) - Integrated image signal processor supports 25MP@30fps @@ -264,7 +264,7 @@ The MediaTek X20 Professional Board also has a RF connector to connect the exter #### Bluetooth -- Bluetooth specification V2.1+EDR, 3.0+HS and 4.1+HS compliant +- _Bluetooth_® wireless technology specification V2.1+EDR, 3.0+HS and 4.1+HS compliant - Integrated PA with 8dBm (class 1) transmit power - Typical Rx sensitivity: GFSK -94dBm, DQPSK -93dBm, 8-DPSK -87.5dBm. @@ -310,7 +310,7 @@ If the switch 1 of the dip-switch SW3205 is on the 'ON' position and the switch The MediaTek X20 Professional Board supports three USB host port via a USB2.0 hub (U6401 USB2513-AEZG). -- Port 1 of the USB HUB is routed to CON6401, a Type A USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. +- Port 1 of the USB HUB is routed to CON6401, a Type A USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. - Port 2 of the USB HUB is routed to CON6402, a Type A USB Host connector. A current limited controller (U6403) sets the Power Current limit to 1.18A. - Port 3 of the USB HUB is routed to the High Speed Expansion connector. No current limited controller is implemented on the board for this channel. @@ -457,7 +457,7 @@ The MediaTek X20 Professional Board implements this requirement. All GPIOs are r - GPIO A -Connects to EINT16 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. - GPIO B -Connects to EINT5 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. - GPIO C -Connects to EINT4 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. -- GPIO D -Connects to EINT3 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. +- GPIO D -Connects to EINT3 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. - GPIO E -Connects to EINT2 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. - GPIO F -Connects to EINT1 of Soc MT6797, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the Soc. It is a 1.8V signal. - GPIO G -Connects to DSI_TE of Soc MT6797, can serves as DSI_TE or GPIO179. It is a 1.8V signal. @@ -478,7 +478,7 @@ The MediaTek X20 Professional Board implements a full SPI master with 4 wires, C The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -The MediaTek X20 Professional Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the Soc MT6797 and driven at 1.8V. +The MediaTek X20 Professional Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the Soc MT6797 and driven at 1.8V. ### Power and Reset @@ -609,7 +609,7 @@ The MediaTek X20 Professional Board implements this requirement by routing USB c ### HSIC The 96Boards specification calls for an optional MIPI-HSIC interface to be present on the High Speed Expansion Connector. -The MediaTek X20 Professional Board implementation doesn't support this optional requirement. +The MediaTek X20 Professional Board implementation doesn't support this optional requirement. ### Reserved @@ -651,7 +651,7 @@ Beside the 96Boards specification, the MediaTek X20 Professional Board also has | 16 | AU_HSN | Headset negative output | ### Speaker -The speaker signals are routed from the MT6351 built-in Audio CODEC. It should be connected to an external speaker amplifier. Do not connect it to speaker directly. The two signals are: +The speaker signals are routed from the MT6351 built-in Audio CODEC. It should be connected to an external speaker amplifier. Do not connect it to speaker directly. The two signals are: - AU_LOLP - AU_LOLN @@ -667,8 +667,8 @@ The main parameters are list in table below. ### Mic -The microphone signals are routed to the MT6351 built-in Audio CODEC. It is an uplink input channel and it can be connected to a MIC or a codec line out. The signals are: -- AU_VIN0_P +The microphone signals are routed to the MT6351 built-in Audio CODEC. It is an uplink input channel and it can be connected to a MIC or a codec line out. The signals are: +- AU_VIN0_P - AU_VIN0_N - MICBIAS0(The bias voltage output step size is 0.1V, the range is 1.7~2.1V/2.5~2.7V) @@ -677,7 +677,7 @@ The earphone signals are routed from the MT6351 built-in Audio CODEC. It can sup - AU_HPL - AU_HPR - ACCDET1 -- AU_VIN0_P +- AU_VIN0_P - AU_VIN0_N - MICBIAS0 @@ -710,7 +710,7 @@ The headset signals are routed from the MT6351 built-in Audio CODEC. It can supp - AU_HSN ### FM Antenna -The FM antenna signals are routed to the MT6631 (U5003), an integrated connectivity device. The two signals below should be kept in differential trace to audio jack. +The FM antenna signals are routed to the MT6631 (U5003), an integrated connectivity device. The two signals below should be kept in differential trace to audio jack. - FM_ANT - FM_RX_N_6631 diff --git a/consumer/rock/rock960/getting-started/README.md b/consumer/rock/rock960/getting-started/README.md index b066bf8a8..e7e3eccff 100644 --- a/consumer/rock/rock960/getting-started/README.md +++ b/consumer/rock/rock960/getting-started/README.md @@ -79,7 +79,7 @@ The package comes with a simple acrylic case, assemble it first: | PMU | RK805 | | Storage | 16/32GB eMMC 5.1 | | Ethernet Port | USB 2.0/3.0 expansion | -| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, Bluetooth 4.2. On board WLAN/BT antennas. | +| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, _Bluetooth_® wireless technology 4.2. On board WLAN/BT antennas. | | USB | 1 x USB 3.0 type A and 1 x USB 2.0 type A (host mode only) and 1 x USB 3.0 type C OTG | | Display | 1 x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz, 1 x 4L - MIPI DSI up to 1080p@60Hz, 1 x DP 1.2(Type C) up to 4Kx2K@60 | | Video | Inside decoder: H.264 10bit up to HP level 5.1 - 2160p@60fps (4096x2304), VP9 - 2160p@60fps(4096x2304), H.265/HEVC 10bit - 2160p@60fps(4096x2304), MPEG-1, MPEG-2, MPEG-4, H.263, VP8, VC-1. | diff --git a/consumer/rock/rock960/hardware-docs/hardware-user-manual.md b/consumer/rock/rock960/hardware-docs/hardware-user-manual.md index 611a9821a..ff2c8c1bf 100644 --- a/consumer/rock/rock960/hardware-docs/hardware-user-manual.md +++ b/consumer/rock/rock960/hardware-docs/hardware-user-manual.md @@ -72,7 +72,7 @@ The ROCK960 Development Board is a 96Boards compliant community board based on R | PMU | RK808-D | | Storage | 16/32GB eMMC 5.1 | | Ethernet Port | USB 2.0/3.0 expansion | -| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, Bluetooth 4.2. On board WLAN/BT antennas. | +| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, _Bluetooth_® wireless technology 4.2. On board WLAN/BT antennas. | | USB | 1 x USB 3.0 type A and 1 x USB 2.0 type A (host mode only) and 1 x USB 3.0 type C OTG | | Display | 1 x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz, 1 x 4L - MIPI DSI up to 1080p@60Hz, 1 x DP 1.2(Type C) up to 4Kx2K@60 | | Video | Inside decoder: H.264 10bit up to HP level 5.1 - 2160p@60fps (4096x2304), VP9 - 2160p@60fps(4096x2304), H.265/HEVC 10bit - 2160p@60fps(4096x2304), MPEG-1, MPEG-2, MPEG-4, H.263, VP8, VC-1. | @@ -367,7 +367,7 @@ The ROCK960 board implements this requirement. All GPIOs are routed to the RK339 ### PCM/I2S - The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -- The ROCK960 Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the RK3399 SoC and driven at 1.8V. +- The ROCK960 Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the RK3399 SoC and driven at 1.8V. ### Power and Reset diff --git a/consumer/rock/rock960c/getting-started/README.md b/consumer/rock/rock960c/getting-started/README.md index 5fcf4ddff..c4d10c2ac 100644 --- a/consumer/rock/rock960c/getting-started/README.md +++ b/consumer/rock/rock960c/getting-started/README.md @@ -90,7 +90,7 @@ The package comes with a simple acrylic case, assemble it first: | PMU | RK808-D | | Storage | Reserve eMMC socket on board, optional eMMC module up to 128GB, uSD card up to 128GB | | Ethernet Port | USB 2.0/3.0 expansion | -| Wireless | WLAN 802.11 ac/a/b/g/n, 2.4GHz and 5Ghz, Bluetooth 4.2. On board WLAN/BT antennas, optional IPEX antenna. | +| Wireless | WLAN 802.11 ac/a/b/g/n, 2.4GHz and 5Ghz, _Bluetooth_® wireless technology 4.2. On board WLAN/BT antennas, optional IPEX antenna. | | USB | 1 x USB 3.0 host type A, 1 x USB 3.0 OTG type A and 1 x USB 2.0 type C(host only) | | Display | 1 x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz, 1 x 4L - MIPI DSI up to 1080p@60Hz | | Video | Inside decoder: H.264 10bit up to HP level 5.1 - 2160p@60fps (4096x2304), VP9 - 2160p@60fps(4096x2304), H.265/HEVC 10bit - 2160p@60fps(4096x2304), MPEG-1, MPEG-2, MPEG-4, H.263, VP8, VC-1. | diff --git a/consumer/rock/rock960c/hardware-docs/hardware-user-manual.md b/consumer/rock/rock960c/hardware-docs/hardware-user-manual.md index 7b0d277a9..a1f2d05f2 100644 --- a/consumer/rock/rock960c/hardware-docs/hardware-user-manual.md +++ b/consumer/rock/rock960c/hardware-docs/hardware-user-manual.md @@ -71,7 +71,7 @@ The ROCK960 Development Board is a 96Boards compliant community board based on R | PMU | RK808-D | | Storage | None, one board eMMC socket reserved for optional 8/16/32/64/128GB eMMC module | | Ethernet Port | USB 2.0/3.0 expansion | -| Wireless | WLAN 802.11 ac/a/b/g/n, 2.4GHz and 5Ghz, Bluetooth 4.2. On board WLAN/BT antennas. | +| Wireless | WLAN 802.11 ac/a/b/g/n, 2.4GHz and 5Ghz, _Bluetooth_® wireless technology 4.2. On board WLAN/BT antennas. | | USB | 1 x USB 3.0 type A Host and 1 x USB 3.0 type A OTG and 1 x **USB 2.0** type C(Host only) | | Display | 1 x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz, 1 x 4L - MIPI DSI up to 1080p@60Hz | | Video | Inside decoder: H.264 10bit up to HP level 5.1 - 2160p@60fps (4096x2304), VP9 - 2160p@60fps(4096x2304), H.265/HEVC 10bit - 2160p@60fps(4096x2304), MPEG-1, MPEG-2, MPEG-4, H.263, VP8, VC-1. | @@ -222,7 +222,7 @@ RK3399 support HDMI 1.4 and 2.0, up to 10-bit depth color mode, up to 1080p at 1 ### MIPI-DSI - The 96Boards specification calls for a MIPI-DSI implementation via the High Speed Expansion Connector. -- The ROCK960 Board implements a 4-lane MIPI_DSI interface meeting this requirement. It can support up to FHD(1080p@60fps). The ROCK960 Board routes the MIPI_DSI interface signals to the MIPI_TX interface of the RK3399. +- The ROCK960 Board implements a 4-lane MIPI_DSI interface meeting this requirement. It can support up to FHD(1080p@60fps). The ROCK960 Board routes the MIPI_DSI interface signals to the MIPI_TX interface of the RK3399. ### Camera Interface @@ -380,7 +380,7 @@ The ROCK960 board implements this requirement. All GPIOs are routed to the RK339 ### PCM/I2S - The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -- The ROCK960 Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the RK3399 SoC and driven at 1.8V. +- The ROCK960 Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the RK3399 SoC and driven at 1.8V. ### Power and Reset diff --git a/consumer/sophon-edge/getting-started/README.md b/consumer/sophon-edge/getting-started/README.md index 7d12c2f47..09d65edc4 100644 --- a/consumer/sophon-edge/getting-started/README.md +++ b/consumer/sophon-edge/getting-started/README.md @@ -17,7 +17,7 @@ Learn about your Sophon Edge board as well as how to prepare and set up for basi - Board based on Sophon BM1880 - Power adapter - 12V @ 2A AC/DC converter compatible with the 96Boards specification - + *** # Out of the Box @@ -34,13 +34,13 @@ The following subsections describe how to get started with the Sophon Edge using | Processor | Sophon BM1880 | | System Memory | LPDDR4 1GB @ 3200Mhz | | Flash Memory | 8GB eMMC + micro SD card slot | -| Connectivity | Gigabit Ethernet(RJ-45), Wifi, Bluetooth | -| USB | USB 3.0 x 3 (support camera, U- disk..etc) | +| Connectivity | Gigabit Ethernet(RJ-45), Wifi, _Bluetooth_® wireless technology | +| USB | USB 3.0 x 3 (support camera, U- disk..etc) | | I/O Expansion | 40-pin 96Boards low-speed expansion header | | Audio | I2S x 2 (included in 40-pin header) | | H.264 decoder, MJPEG encoder/decoder | 1x 1080p @60fps or 2x 1080p @30fps H.264 decoder, 75fps for FHD images | | Power | 12V@2A | -| OS | Linux | +| OS | Linux | | Dimensions | 85mm x 54mm | **NOTE:** Many compliance items for this board were waived due to the nature of the chipset being used and the uniqueness of the board. The Edge BM1880 TPU ASIC accels in its AI and deep learning abilities, for this reason, the following items were waived in order to accomodate the Sophon Edge into the 96Boards ecosystem: diff --git a/consumer/thor96/getting-started/README.md b/consumer/thor96/getting-started/README.md index e84075f62..cf100dc85 100644 --- a/consumer/thor96/getting-started/README.md +++ b/consumer/thor96/getting-started/README.md @@ -38,7 +38,7 @@ In the Box you can find the Thor96 as well as a microSD card which comes with a | RAM | 1 2-GB LPDDR4 @ 1,600 MHz Industrial Temp by Micron | | Storage | microSD Socket: UHS-1 v3.01 | | Ethernet Port | 10/100/1000 Mbit/s | -| Wireless | Cypress’ industry-leading 802.11ac Wi-Fi and Dual-Mode Bluetooth wireless connectivity | +| Wireless | Cypress’ industry-leading 802.11ac Wi-Fi and Dual-Mode _Bluetooth_® wireless technology | | USB | Host: 2x USB Type-A 3.0
OTG: 1x type micro-AB, 2.0 high-speed | | Display | HDMI Output and DSI to HDMI | | Expansion Interface | 96Boards Compliant:
40-Pin Low Speed Header
60-Pin High Speed Header | diff --git a/consumer/ultra96/ultra96-v1/getting-started/README.md b/consumer/ultra96/ultra96-v1/getting-started/README.md index 7fe26892b..1a5d65495 100644 --- a/consumer/ultra96/ultra96-v1/getting-started/README.md +++ b/consumer/ultra96/ultra96-v1/getting-started/README.md @@ -33,7 +33,7 @@ Learn about your Ultra96 board as well as how to prepare and set up for basic us # Out of the Box -The following subsections describe how to get started with the Ultra96 using the release build shipped with your board. The Ultra96 is ready to use “out of the box” and comes with a pre-flashed microSD card which boots Linux. +The following subsections describe how to get started with the Ultra96 using the release build shipped with your board. The Ultra96 is ready to use “out of the box” and comes with a pre-flashed microSD card which boots Linux. @@ -45,7 +45,7 @@ The following subsections describe how to get started with the Ultra96 using the | SoC | Xilinx Zynq UltraScale+ MPSoC ZU3EG A484 | | RAM | Micron LPDDR4 memory provides 2 GB of RAM in a 512M x 32 configuration | | Storage | Delkin 16 GB microSD card + adapter | -| Wireless | 802.11b/g/n Wi-Fi and Bluetooth 4.2 (provides both Bluetooth Classic and Low Energy (BLE)) | +| Wireless | 802.11b/g/n Wi-Fi and _Bluetooth_® wireless technology 4.2 (provides both Bluetooth Classic and Low Energy (BLE)) | | USB | 1x USB 3.0 Type Micro-B upstream port
2x USB 3.0, 1x USB 2.0 Type A downstream ports | | Display | Mini DisplayPort (MiniDP or mDP) | | Expansion Interface | 40-pin 96Boards Low-speed expansion header
60-pin 96Boards High speed expansion header | diff --git a/consumer/ultra96/ultra96-v2/getting-started/README.md b/consumer/ultra96/ultra96-v2/getting-started/README.md index 80c051ada..ece360d5c 100644 --- a/consumer/ultra96/ultra96-v2/getting-started/README.md +++ b/consumer/ultra96/ultra96-v2/getting-started/README.md @@ -47,7 +47,7 @@ The following subsections describe how to get started with the Ultra96 using the | SoC | Xilinx Zynq UltraScale+ MPSoC ZU3EG A484 | | RAM | Micron LPDDR4 memory provides 2 GB of RAM in a 512M x 32 configuration | | Storage | Delkin 16 GB microSD card + adapter | -| Wireless | 802.11b/g/n Wi-Fi and Bluetooth 4.2 (provides both Bluetooth Classic and Low Energy (BLE)) | +| Wireless | 802.11b/g/n Wi-Fi and _Bluetooth_® wireless technology 4.2 (provides both Bluetooth Classic and Low Energy (BLE)) | | USB | 1x USB 3.0 Type Micro-B upstream port
2x USB 3.0, 1x USB 2.0 Type A downstream ports | | Display | Mini DisplayPort (MiniDP or mDP) | | Expansion Interface | 40-pin 96Boards Low-speed expansion header
60-pin 96Boards High speed expansion header | diff --git a/enterprise/ficus/getting-started/README.md b/enterprise/ficus/getting-started/README.md index fdd5ea41f..17f3e26da 100644 --- a/enterprise/ficus/getting-started/README.md +++ b/enterprise/ficus/getting-started/README.md @@ -79,7 +79,7 @@ The package comes with a simple acrylic case, assemble it first: | PMU | RK805 | | Storage | 16/32GB eMMC 5.1 | | Ethernet Port | USB 2.0/3.0 expansion | -| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, Bluetooth 4.2. On board WLAN/BT antennas. | +| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, _Bluetooth_® wireless technology 4.2. On board WLAN/BT antennas. | | USB | 1 x USB 3.0 type A and 1 x USB 2.0 type A (host mode only) and 1 x USB 3.0 type C OTG | | Display | 1 x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz, 1 x 4L - MIPI DSI up to 1080p@60Hz, 1 x DP 1.2(Type C) up to 4Kx2K@60 | | Video | Inside decoder: H.264 10bit up to HP level 5.1 - 2160p@60fps (4096x2304), VP9 - 2160p@60fps(4096x2304), H.265/HEVC 10bit - 2160p@60fps(4096x2304), MPEG-1, MPEG-2, MPEG-4, H.263, VP8, VC-1. | diff --git a/enterprise/ficus/hardware-docs/hardware-user-manual.md b/enterprise/ficus/hardware-docs/hardware-user-manual.md index 1503256f7..ba4262217 100644 --- a/enterprise/ficus/hardware-docs/hardware-user-manual.md +++ b/enterprise/ficus/hardware-docs/hardware-user-manual.md @@ -72,7 +72,7 @@ The ROCK960 Development Board is a 96Boards compliant community board based on R | PMU | RK805 | | Storage | 16/32GB eMMC 5.1 | | Ethernet Port | USB 2.0/3.0 expansion | -| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, Bluetooth 4.2. On board WLAN/BT antennas. | +| Wireless | WLAN 802.11 ac/a/b/g/n, 2xMIMO, 2.4GHz and 5Ghz, _Bluetooth_® wireless technology 4.2. On board WLAN/BT antennas. | | USB | 1 x USB 3.0 type A and 1 x USB 2.0 type A (host mode only) and 1 x USB 3.0 type C OTG | | Display | 1 x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz, 1 x 4L - MIPI DSI up to 1080p@60Hz, 1 x DP 1.2(Type C) up to 4Kx2K@60 | | Video | Inside decoder: H.264 10bit up to HP level 5.1 - 2160p@60fps (4096x2304), VP9 - 2160p@60fps(4096x2304), H.265/HEVC 10bit - 2160p@60fps(4096x2304), MPEG-1, MPEG-2, MPEG-4, H.263, VP8, VC-1. | @@ -367,7 +367,7 @@ The ROCK960 board implements this requirement. All GPIOs are routed to the RK339 ### PCM/I2S - The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -- The ROCK960 Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the RK3399 SoC and driven at 1.8V. +- The ROCK960 Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the RK3399 SoC and driven at 1.8V. ### Power and Reset diff --git a/enterprise/poplar-hoperun/getting-started/README.md b/enterprise/poplar-hoperun/getting-started/README.md index 55beef2b1..188156798 100644 --- a/enterprise/poplar-hoperun/getting-started/README.md +++ b/enterprise/poplar-hoperun/getting-started/README.md @@ -35,7 +35,7 @@ The following subsections should describe how to get started with the Poplar usi | RAM | 2GB DDR3 SDRAM | | Storage | 8GB eMMc on-board | | Ethernet Port | 10M\/100M\/1000M Gigabit Ethernet | -| Wireless | 802.11AC 2x2 with Bluetooth | +| Wireless | 802.11AC 2x2 with _Bluetooth_® wireless technology | | USB | One USB 2.0 port and One USB 3.0 port | | Console | microUSB port for console support | | PCIe | One PCIe 2.0 interface | diff --git a/enterprise/poplar-hoperun/guides/README.md b/enterprise/poplar-hoperun/guides/README.md index 188be7e9d..4e3b598f2 100644 --- a/enterprise/poplar-hoperun/guides/README.md +++ b/enterprise/poplar-hoperun/guides/README.md @@ -35,7 +35,7 @@ The following subsections should describe how to get started with the Poplar usi | RAM | 2GB DDR3 SDRAM | | Storage | 8GB eMMc on-board | | Ethernet Port | 10M\/100M\/1000M Gigabit Ethernet | -| Wireless | 802.11AC 2x2 with Bluetooth | +| Wireless | 802.11AC 2x2 with _Bluetooth_® wireless technology | | USB | One USB 2.0 port and One USB 3.0 port | | Console | microUSB port for console support | | PCIe | One PCIe 2.0 interface | diff --git a/enterprise/poplar-hoperun/hardware-docs/hw-user-manual.md b/enterprise/poplar-hoperun/hardware-docs/hw-user-manual.md index efd83051f..c4a9c6a20 100644 --- a/enterprise/poplar-hoperun/hardware-docs/hw-user-manual.md +++ b/enterprise/poplar-hoperun/hardware-docs/hw-user-manual.md @@ -24,7 +24,7 @@ permalink: /documentation/enterprise/poplar-hoperun/hardware-docs/hw-user-manual - Networking - LAN - WiFi - - Bluetooth + - _Bluetooth_® wireless technology - HDMI - USB Ports - Audio @@ -244,7 +244,7 @@ The 96Boards Poplar board has 8GB eMMC on-board storage. #### Micro SDHC -The microSDHC socket is on the bottom left corner of the PCB and is routed directly to the Hi3798C V200 SD 3.0 interface, and supports 1-bit and 4-bit modes (3 V and 1.8 V supported for the I/O device). The slot is a push-push type with a dedicated support for card detect signal. +The microSDHC socket is on the bottom left corner of the PCB and is routed directly to the Hi3798C V200 SD 3.0 interface, and supports 1-bit and 4-bit modes (3 V and 1.8 V supported for the I/O device). The slot is a push-push type with a dedicated support for card detect signal. ### Networking @@ -278,7 +278,7 @@ The WiFi hardware block Diagram is followed: The MT7668 bluetooth has following features: -- Bluetooth specification 2.1+EDR +- _Bluetooth_® wireless technology specification 2.1+EDR - Bluetooth 4.2 Low Energy (LE) - Bluetooth 5.0 - ANT/ANT+ diff --git a/enterprise/poplar/getting-started/README.md b/enterprise/poplar/getting-started/README.md index e108602a6..883c0a01f 100644 --- a/enterprise/poplar/getting-started/README.md +++ b/enterprise/poplar/getting-started/README.md @@ -39,7 +39,7 @@ The following subsections should describe how to get started with the Poplar usi | RAM | DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB on board | | Storage | 8GB eMMc On-Board storage | | Ethernet Port | 1 GBe Ethernet | -| Wireless | 802.11AC 2x2 with Bluetooth | +| Wireless | 802.11AC 2x2 with _Bluetooth_® wireless technology | | USB | Two USB 2.0 ports One USB 3.0 ports | | Console | USB-micro port for console support | | PCIe | One PCIe 2.0 interfaces | diff --git a/enterprise/poplar/hardware-docs/hw-user-manual.md b/enterprise/poplar/hardware-docs/hw-user-manual.md index a6f1d57c2..1f57e0d1c 100644 --- a/enterprise/poplar/hardware-docs/hw-user-manual.md +++ b/enterprise/poplar/hardware-docs/hw-user-manual.md @@ -24,7 +24,7 @@ redirect_from: /documentation/EnterpriseEdition/Poplar/HardwareDocs/HardwareUser ## Introduction -The 96Boards Poplar board is the first TV board to be certified 96Boards Enterprise Edition compatible from Tocoding Ltd., and it's based around the Hisilicon Hi3798C V200 SoC, with Quad-core ARM Cortex-A53 64-bit CPU up to 2.0GHz . +The 96Boards Poplar board is the first TV board to be certified 96Boards Enterprise Edition compatible from Tocoding Ltd., and it's based around the Hisilicon Hi3798C V200 SoC, with Quad-core ARM Cortex-A53 64-bit CPU up to 2.0GHz . - **Processor:** - HiSilicon Hi3798C V200 SoC @@ -90,7 +90,7 @@ The 96Boards Poplar board is the first TV board to be certified 96Boards Enterpr - HDMI audio output - **Connectivity:** - LAN Ethernet:10/100M, standard RJ-45 - - WLAN 802.11 ac/b/g/n 2.4GHz/5GHz Dual Band, Bluetooth 4.0/4.1, Transmission rate 1200Mbps + - WLAN 802.11 ac/b/g/n 2.4GHz/5GHz Dual Band, _Bluetooth_® wireless technology 4.0/4.1, Transmission rate 1200Mbps - One micro USB - Two USB 2.0 - One USB 3.0 @@ -212,7 +212,7 @@ The 96Boards Poplar board uses a 2GB LPDDR3 DRAM chip as the memory. a single em ### Micro SDHC -The microSDHC socket is on the bottom left corner of the PCB and is routed directly to the Hi3798C V200 SD 3.0 interface, and supports 1-bit and 4-bit modes (3 V and 1.8 V supported for the I/O device). The slot is a push-push type with a dedicated support for card detect signal. +The microSDHC socket is on the bottom left corner of the PCB and is routed directly to the Hi3798C V200 SD 3.0 interface, and supports 1-bit and 4-bit modes (3 V and 1.8 V supported for the I/O device). The slot is a push-push type with a dedicated support for card detect signal. ### Networking @@ -395,7 +395,7 @@ The Smart Card module board is optinal supplied. ### TS Connector -The tuner module board and is optionally supplied. +The tuner module board and is optionally supplied. diff --git a/iot/README.md b/iot/README.md index 41af1e907..92813c8a6 100644 --- a/iot/README.md +++ b/iot/README.md @@ -15,7 +15,7 @@ Select your IoT Edition 96Boards device to access all product related resources | 96Boards | About | Options | |:----------------------------------------:|:--------------------------------------------------------------------------:|:----------------------------------------:| |
**WisTrio** | Board based on the RAK5205 | [Documentation](wistrio/)
| -|
**Carbon** | Board based on the STM32F401RE Processor and
nRF51822 bluetooth controller | [Documentation](carbon/)
| +|
**Carbon** | Board based on the STM32F401RE Processor and
nRF51822 Bluetooth® wireless technology controller | [Documentation](carbon/)
| |
**Nitrogen** | Board based on the nRF52832 microcontroller | [Documentation](nitrogen/)
| |
**Orange Pi i96** | Board based on the RDA8810PL ARM Cortex-A5 | [Documentation](orangepi-i96/)
(beta) | diff --git a/iot/carbon/getting-started/README.md b/iot/carbon/getting-started/README.md index 1cd2bddb0..1fadfabb2 100644 --- a/iot/carbon/getting-started/README.md +++ b/iot/carbon/getting-started/README.md @@ -14,7 +14,7 @@ Learn about your Carbon board as well as how to prepare and set up for basic use **Need** - [Carbon](https://www.96boards.org/product/carbon/) - - Board based on the STM32F401RE Processor connected to a nRF51822 bluetooth controller + - Board based on the STM32F401RE Processor connected to a nRF51822 _Bluetooth_® wireless technology controller - USB to MicroUSB cable (x2) - This is needed for serial console interface and USB-OTG (including DFU support) - Switches @@ -85,4 +85,4 @@ It's time to see what your Carbon can do. From here you can learn how to build y Back to the [Carbon documentation home page](../) -*** +*** diff --git a/iot/carbon/hardware-docs/hardware-user-manual.md b/iot/carbon/hardware-docs/hardware-user-manual.md index d157c2803..7dd1e6523 100644 --- a/iot/carbon/hardware-docs/hardware-user-manual.md +++ b/iot/carbon/hardware-docs/hardware-user-manual.md @@ -96,7 +96,7 @@ The following table lists it's key features: 2. **LED Indicators** - USR1 - User controlled led, connected to PD2 - USR2 - User controlled led, connected to PA15 - - BT - Bluetooth indicator, connected to PB5. This led will light up when connect to a device. + - BT - _Bluetooth_® wireless technology indicator, connected to PB5. This led will light up when connect to a device. - PWR - Light up when Power on. - RX - Indicator of FT230X - RX - TX - Indicator of FT230X - TX diff --git a/iot/ivy5661/getting-started/README.md b/iot/ivy5661/getting-started/README.md index 00944d415..a1ee55d8e 100644 --- a/iot/ivy5661/getting-started/README.md +++ b/iot/ivy5661/getting-started/README.md @@ -31,14 +31,14 @@ The following subsections should describe how to get started with the Ivy5661 us | Clock speed | 416MHz | | Storage | 32Mbit | | Wi-Fi | IEEE802.11ac 2x2 | -| Bluetooth | Bluetooth 5 | +| _Bluetooth_® wireless technology | Bluetooth 5 | | USB | 2 x Micro USB | | Expansion Interface | UART, I2C, SPI, I2S, GPIO | | LED | 4 user LED | | Button | 2 reset and user button | | Power Source | Micro USB | -| OS Support | Zephyr | -| Size | 60 x 30mm | +| OS Support | Zephyr | +| Size | 60 x 30mm | For more information, please refer to the [Hardware User Manual](../hardware-docs) @@ -71,4 +71,4 @@ If you are already familiar with the Ivy5661 board and would like to change out Back to the [Ivy5661 documentation home page](../) -*** +*** diff --git a/iot/nitrogen/getting-started/README.md b/iot/nitrogen/getting-started/README.md index 70c9dff63..a05cbbcdd 100644 --- a/iot/nitrogen/getting-started/README.md +++ b/iot/nitrogen/getting-started/README.md @@ -38,7 +38,7 @@ The following subsections should describe how to get started with the Nitrogen u | Clock speed | 64MHz | | SRAM | 64KB | | Storage | 512KB onboard Flash | -| Wireless | In-built Bluetooth | +| Wireless | In-built _Bluetooth_® wireless technology | | USB | 1 x Micro USB | | Expansion Interface | 1 x 20pin 2.0mm pitch Low speed connector | | Digital Out Voltage | 1.8V | @@ -73,4 +73,4 @@ It's time to see what your Nitrogen can do. From here you can learn how to build Back to the [Nitrogen documentation home page](../) -*** +*** diff --git a/templates/board-template/hardware-docs/hardware-user-manual.md b/templates/board-template/hardware-docs/hardware-user-manual.md index be4628528..8b305783c 100644 --- a/templates/board-template/hardware-docs/hardware-user-manual.md +++ b/templates/board-template/hardware-docs/hardware-user-manual.md @@ -100,7 +100,7 @@ The Board-X Development Board is a 96Boards compliant community board based on X - Audio decoding:WAV,MP3,MP2,AAC,AMR-NB,AMR-WB,MIDI,Vorbis,APE,AAC-plus v1/2,FLAC,WMA,ADPCM - **Connectivity**: - WLAN 802.11a/b/g/n 2.4GHz and 5GHz(On-board BT and WLAN antenna ) - - Bluetooth 4.1 +HS compliant + - _Bluetooth_® wireless technology 4.1 +HS compliant - GPS (with antenna connector) - One USB 2.0 micro B (device mode only) - Two USB 2.0 (host mode only) @@ -343,7 +343,7 @@ The Helio X20 Development Board supports a USB device port and three USB host po The Helio X20 Development Board supports three USB host port via a USB2.0 hub (U6401 USB2513-AEZG). Its upstream signal is connected to USB_P0 interface of MT6797. -- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. +- Port 1 of the USB HUB is routed to CON6401, a Type ‘A’ USB Host connector. A current limited controller (U6402) sets the Power Current limit to 1.18A. - Port 2 of the USB HUB is routed to CON6402, a Type ‘A’ USB Host connector. A current limited controller (U6403) sets the Power Current limit to 1.18A. - Port 3 of the USB HUB is routed to the High Speed Expansion connector. No current limited controller is implemented on the board for this channel. @@ -508,7 +508,7 @@ The Helio X20 board implements this requirement. All GPIOs are routed to the MT6 - GPIO A -Connects to EINT16 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO B -Connects to EINT5 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO C -Connects to EINT4 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. -- GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. +- GPIO D -Connects to EINT3 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO E -Connects to EINT2 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO F -Connects to EINT1 of MT6797 SoC, can serves as external interrupt supporting the 96Boards requirements to create a wake-up event for the SoC. It is a 1.8V signal. - GPIO G -Connects to DSI_TE of MT6797 SoC, can serves as DSI_TE or GPIO179. It is a 1.8V signal. @@ -530,7 +530,7 @@ The Helio X20 board implements this requirement. All GPIOs are routed to the MT6 < Example > - The 96Boards specification calls for one PCM/I2S bus to be provided on the Low Speed Expansion Connector. The CLK, FS and DO signals are required while the DI is optional. -- The Helio X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. +- The Helio X20 Development Board implements a PCM/I2S interface with 4 wires, CLK, FS, DO and DI. The signals are connected directly to the MT6797 SoC and driven at 1.8V. ### Power and Reset