document OC_OUT1-3 / GPIO404-406

[orangecms]

The datasheet at https://cloud.3mdeb.com/index.php/s/HArgg8jrDmASWGp refers to the following (section "SPI header"):

OC pin	GPIO pin	function
OC_OUT1	GPIO406	enable SPI VCC
OC_OUT2	GPIO405	set SPI VCC to 3.3V
OC_OUT3	GPIO404	enable SPI lines

The schematics show the J11 header, which lists OC_OUT6 (pin 1), OC_OUT5 (pin 2), OC_OUT4 (pin 3). It seems like something is mixed up here.

[miczyg1]

These signals are controlled with E_GPA{4,5,6} which correspond to GPIO{404,405,406} seen in the Linux. The only error I see here is the first column which incorrectly states these are OC pins (which was probably true for older RTE revisions), but they are not, they are simply GPIOs from the I/O expander. @pkonkol could you please change the datasheet first column to something like this?

Signal
E_GPA6
E_GPA5
E_GPA4

[pietrushnic]

@macpijan I'm not sure if we rev-up datasheet, but at least we should have that fixed in official documentation: https://docs.dasharo.com/transparent-validation/rte/introduction/